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167 lines
5.7 KiB
167 lines
5.7 KiB
2 months ago
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From d851495f2fe614c4c860bda1bd3c80bfbe48360b Mon Sep 17 00:00:00 2001
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From: Jonas Paulsson <paulsson@linux.vnet.ibm.com>
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Date: Thu, 8 Oct 2020 13:18:29 +0200
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Subject: [PATCH] [SystemZ] Use LA instead of AGR in eliminateFrameIndex().
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Since AGR clobbers CC it should not be used here.
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Fixes https://bugs.llvm.org/show_bug.cgi?id=47736.
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Review: Ulrich Weigand
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Differential Revision: https://reviews.llvm.org/D89034
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---
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.../Target/SystemZ/SystemZRegisterInfo.cpp | 4 +--
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llvm/test/CodeGen/SystemZ/frame-14.ll | 26 +++++++++----------
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llvm/test/CodeGen/SystemZ/frame-16.ll | 4 +--
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3 files changed, 17 insertions(+), 17 deletions(-)
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diff --git a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
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index 53b06c6e7e6d..88212e52460f 100644
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--- a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
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+++ b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
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@@ -322,8 +322,8 @@ SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
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// Load the high offset into the scratch register and use it as
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// an index.
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TII->loadImmediate(MBB, MI, ScratchReg, HighOffset);
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- BuildMI(MBB, MI, DL, TII->get(SystemZ::AGR),ScratchReg)
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- .addReg(ScratchReg, RegState::Kill).addReg(BasePtr);
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+ BuildMI(MBB, MI, DL, TII->get(SystemZ::LA), ScratchReg)
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+ .addReg(BasePtr, RegState::Kill).addImm(0).addReg(ScratchReg);
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}
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// Use the scratch register as the base. It then dies here.
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diff --git a/llvm/test/CodeGen/SystemZ/frame-14.ll b/llvm/test/CodeGen/SystemZ/frame-14.ll
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index e70731249b42..193ff81123c5 100644
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--- a/llvm/test/CodeGen/SystemZ/frame-14.ll
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+++ b/llvm/test/CodeGen/SystemZ/frame-14.ll
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@@ -85,13 +85,13 @@ define void @f3() {
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define void @f4() {
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; CHECK-NOFP-LABEL: f4:
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; CHECK-NOFP: llilh %r1, 8
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-; CHECK-NOFP: agr %r1, %r15
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+; CHECK-NOFP: la %r1, 0(%r1,%r15)
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; CHECK-NOFP: mvi 0(%r1), 42
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f4:
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; CHECK-FP: llilh %r1, 8
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-; CHECK-FP: agr %r1, %r11
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+; CHECK-FP: la %r1, 0(%r1,%r11)
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; CHECK-FP: mvi 0(%r1), 42
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; CHECK-FP: br %r14
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%region1 = alloca [524104 x i8], align 8
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@@ -108,13 +108,13 @@ define void @f4() {
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define void @f5() {
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; CHECK-NOFP-LABEL: f5:
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; CHECK-NOFP: llilh %r1, 8
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-; CHECK-NOFP: agr %r1, %r15
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+; CHECK-NOFP: la %r1, 0(%r1,%r15)
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; CHECK-NOFP: mvi 4095(%r1), 42
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f5:
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; CHECK-FP: llilh %r1, 8
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-; CHECK-FP: agr %r1, %r11
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+; CHECK-FP: la %r1, 0(%r1,%r11)
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; CHECK-FP: mvi 4095(%r1), 42
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; CHECK-FP: br %r14
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%region1 = alloca [524104 x i8], align 8
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@@ -130,13 +130,13 @@ define void @f5() {
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define void @f6() {
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; CHECK-NOFP-LABEL: f6:
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; CHECK-NOFP: llilh %r1, 8
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-; CHECK-NOFP: agr %r1, %r15
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+; CHECK-NOFP: la %r1, 0(%r1,%r15)
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; CHECK-NOFP: mviy 4096(%r1), 42
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f6:
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; CHECK-FP: llilh %r1, 8
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-; CHECK-FP: agr %r1, %r11
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+; CHECK-FP: la %r1, 0(%r1,%r11)
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; CHECK-FP: mviy 4096(%r1), 42
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; CHECK-FP: br %r14
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%region1 = alloca [524104 x i8], align 8
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@@ -155,13 +155,13 @@ define void @f6() {
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define void @f7() {
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; CHECK-NOFP-LABEL: f7:
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; CHECK-NOFP: llilh %r1, 23
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-; CHECK-NOFP: agr %r1, %r15
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+; CHECK-NOFP: la %r1, 0(%r1,%r15)
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; CHECK-NOFP: mviy 65535(%r1), 42
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f7:
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; CHECK-FP: llilh %r1, 23
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-; CHECK-FP: agr %r1, %r11
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+; CHECK-FP: la %r1, 0(%r1,%r11)
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; CHECK-FP: mviy 65535(%r1), 42
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; CHECK-FP: br %r14
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%region1 = alloca [1048400 x i8], align 8
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@@ -178,13 +178,13 @@ define void @f7() {
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define void @f8() {
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; CHECK-NOFP-LABEL: f8:
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; CHECK-NOFP: llilh %r1, 24
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-; CHECK-NOFP: agr %r1, %r15
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+; CHECK-NOFP: la %r1, 0(%r1,%r15)
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; CHECK-NOFP: mvi 7(%r1), 42
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f8:
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; CHECK-FP: llilh %r1, 24
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-; CHECK-FP: agr %r1, %r11
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+; CHECK-FP: la %r1, 0(%r1,%r11)
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; CHECK-FP: mvi 7(%r1), 42
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; CHECK-FP: br %r14
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%region1 = alloca [1048408 x i8], align 8
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@@ -233,7 +233,7 @@ define void @f10(i32 *%vptr) {
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; CHECK-NOFP-LABEL: f10:
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; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15)
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; CHECK-NOFP: llilh [[REGISTER]], 8
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-; CHECK-NOFP: agr [[REGISTER]], %r15
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+; CHECK-NOFP: la [[REGISTER]], 0([[REGISTER]],%r15)
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; CHECK-NOFP: mvi 0([[REGISTER]]), 42
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; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15)
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; CHECK-NOFP: br %r14
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@@ -241,7 +241,7 @@ define void @f10(i32 *%vptr) {
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; CHECK-FP-LABEL: f10:
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; CHECK-FP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r11)
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; CHECK-FP: llilh [[REGISTER]], 8
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-; CHECK-FP: agr [[REGISTER]], %r11
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+; CHECK-FP: la [[REGISTER]], 0([[REGISTER]],%r11)
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; CHECK-FP: mvi 0([[REGISTER]]), 42
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; CHECK-FP: lg [[REGISTER]], [[OFFSET]](%r11)
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; CHECK-FP: br %r14
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@@ -273,7 +273,7 @@ define void @f11(i32 *%vptr) {
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; CHECK-NOFP: stmg %r6, %r15,
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; CHECK-NOFP: stg [[REGISTER:%r[1-9][0-4]?]], [[OFFSET:160|168]](%r15)
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; CHECK-NOFP: llilh [[REGISTER]], 8
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-; CHECK-NOFP: agr [[REGISTER]], %r15
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+; CHECK-NOFP: la [[REGISTER]], 0([[REGISTER]],%r15)
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; CHECK-NOFP: mvi 0([[REGISTER]]), 42
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; CHECK-NOFP: lg [[REGISTER]], [[OFFSET]](%r15)
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; CHECK-NOFP: lmg %r6, %r15,
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diff --git a/llvm/test/CodeGen/SystemZ/frame-16.ll b/llvm/test/CodeGen/SystemZ/frame-16.ll
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index ae8a041ae110..a95c58207afb 100644
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--- a/llvm/test/CodeGen/SystemZ/frame-16.ll
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+++ b/llvm/test/CodeGen/SystemZ/frame-16.ll
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@@ -311,13 +311,13 @@ define void @f11(i32 *%vptr, i8 %byte) {
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define void @f12(i8 %byte, i64 %index) {
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; CHECK-NOFP-LABEL: f12:
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; CHECK-NOFP: llilh %r1, 8
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-; CHECK-NOFP: agr %r1, %r15
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+; CHECK-NOFP: la %r1, 0(%r1,%r15)
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; CHECK-NOFP: stc %r2, 0(%r3,%r1)
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f12:
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; CHECK-FP: llilh %r1, 8
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-; CHECK-FP: agr %r1, %r11
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+; CHECK-FP: la %r1, 0(%r1,%r11)
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; CHECK-FP: stc %r2, 0(%r3,%r1)
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; CHECK-FP: br %r14
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%region1 = alloca [524104 x i8], align 8
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--
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2.26.2
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