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82 lines
2.8 KiB
82 lines
2.8 KiB
From 52976ab2fc78c32936c31a51972da79f46b8a424 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?=C3=8D=C3=B1igo=20Huguet?= <ihuguet@redhat.com>
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Date: Wed, 24 May 2023 15:00:23 +0200
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Subject: [PATCH 019/142] wifi: rtw89: 8852b: add HFC quota arrays
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Bugzilla: https://bugzilla.redhat.com/2207499
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commit 3e870b4817333a1a4b01805073da3e00449acf43
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Author: Ping-Ke Shih <pkshih@realtek.com>
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Date: Wed Oct 5 16:32:10 2022 +0800
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wifi: rtw89: 8852b: add HFC quota arrays
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HFC is short for HCI flow control. These arrays are used to set quota
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according to operating modes, which are SCC or download firmware.
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Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
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Signed-off-by: Kalle Valo <kvalo@kernel.org>
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Link: https://lore.kernel.org/r/20221005083212.45683-5-pkshih@realtek.com
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Signed-off-by: Íñigo Huguet <ihuguet@redhat.com>
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---
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drivers/net/wireless/realtek/rtw89/rtw8852b.c | 32 +++++++++++++++++++++++++++
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1 file changed, 32 insertions(+)
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diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852b.c b/drivers/net/wireless/realtek/rtw89/rtw8852b.c
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index e9bcea35a72a2..8424038d5338b 100644
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--- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c
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+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c
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@@ -11,6 +11,37 @@
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#include "rtw8852b_table.h"
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#include "txrx.h"
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+static const struct rtw89_hfc_ch_cfg rtw8852b_hfc_chcfg_pcie[] = {
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+ {5, 343, grp_0}, /* ACH 0 */
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+ {5, 343, grp_0}, /* ACH 1 */
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+ {5, 343, grp_0}, /* ACH 2 */
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+ {5, 343, grp_0}, /* ACH 3 */
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+ {0, 0, grp_0}, /* ACH 4 */
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+ {0, 0, grp_0}, /* ACH 5 */
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+ {0, 0, grp_0}, /* ACH 6 */
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+ {0, 0, grp_0}, /* ACH 7 */
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+ {4, 344, grp_0}, /* B0MGQ */
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+ {4, 344, grp_0}, /* B0HIQ */
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+ {0, 0, grp_0}, /* B1MGQ */
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+ {0, 0, grp_0}, /* B1HIQ */
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+ {40, 0, 0} /* FWCMDQ */
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+};
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+
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+static const struct rtw89_hfc_pub_cfg rtw8852b_hfc_pubcfg_pcie = {
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+ 448, /* Group 0 */
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+ 0, /* Group 1 */
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+ 448, /* Public Max */
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+ 0 /* WP threshold */
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+};
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+
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+static const struct rtw89_hfc_param_ini rtw8852b_hfc_param_ini_pcie[] = {
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+ [RTW89_QTA_SCC] = {rtw8852b_hfc_chcfg_pcie, &rtw8852b_hfc_pubcfg_pcie,
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+ &rtw89_mac_size.hfc_preccfg_pcie, RTW89_HCIFC_POH},
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+ [RTW89_QTA_DLFW] = {NULL, NULL, &rtw89_mac_size.hfc_preccfg_pcie,
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+ RTW89_HCIFC_POH},
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+ [RTW89_QTA_INVALID] = {NULL},
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+};
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+
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static const struct rtw89_dle_mem rtw8852b_dle_mem_pcie[] = {
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[RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size6,
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&rtw89_mac_size.ple_size6, &rtw89_mac_size.wde_qt6,
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@@ -561,6 +592,7 @@ const struct rtw89_chip_info rtw8852b_chip_info = {
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.ops = &rtw8852b_chip_ops,
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.fifo_size = 196608,
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.dle_scc_rsvd_size = 98304,
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+ .hfc_param_ini = rtw8852b_hfc_param_ini_pcie,
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.dle_mem = rtw8852b_dle_mem_pcie,
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.sec_ctrl_efuse_size = 4,
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.physical_efuse_size = 1216,
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--
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2.13.6
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