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91 lines
3.3 KiB
91 lines
3.3 KiB
1 year ago
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From 43ad0f51d78b5ddca2f7e7ae3251d6fa70a5c90c Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?=C3=8D=C3=B1igo=20Huguet?= <ihuguet@redhat.com>
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Date: Wed, 24 May 2023 15:00:40 +0200
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Subject: [PATCH 139/142] wifi: rtw89: phy: set TX power according to RF path
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number by chip
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Bugzilla: https://bugzilla.redhat.com/2207499
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commit ddf9a2ead1676db46abe8acca3f689fd572a44d1
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Author: Zong-Zhe Yang <kevin_yang@realtek.com>
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Date: Fri Feb 3 14:51:57 2023 +0800
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wifi: rtw89: phy: set TX power according to RF path number by chip
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Previously, all supported chips had two RF paths. Therefore, these
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codes used static number for TX power setting. Now, we are planning
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to support a new chip which has only one RF path. So, we refine the
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setting codes to refer to chip's RF path number at runtime.
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Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
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Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
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Signed-off-by: Kalle Valo <kvalo@kernel.org>
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Link: https://lore.kernel.org/r/20230203065157.8227-1-pkshih@realtek.com
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Signed-off-by: Íñigo Huguet <ihuguet@redhat.com>
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---
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drivers/net/wireless/realtek/rtw89/phy.c | 9 ++++++---
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1 file changed, 6 insertions(+), 3 deletions(-)
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diff --git a/drivers/net/wireless/realtek/rtw89/phy.c b/drivers/net/wireless/realtek/rtw89/phy.c
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index ca2b5c17d6da0..d9f61ba3d1765 100644
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--- a/drivers/net/wireless/realtek/rtw89/phy.c
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+++ b/drivers/net/wireless/realtek/rtw89/phy.c
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@@ -2042,6 +2042,7 @@ void rtw89_phy_set_txpwr_byrate(struct rtw89_dev *rtwdev,
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const struct rtw89_chan *chan,
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enum rtw89_phy_idx phy_idx)
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{
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+ u8 max_nss_num = rtwdev->chip->rf_path_num;
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static const u8 rs[] = {
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RTW89_RS_CCK,
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RTW89_RS_OFDM,
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@@ -2064,7 +2065,7 @@ void rtw89_phy_set_txpwr_byrate(struct rtw89_dev *rtwdev,
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BUILD_BUG_ON(rtw89_rs_idx_max[RTW89_RS_HEDCM] % 4);
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addr = R_AX_PWR_BY_RATE;
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- for (cur.nss = 0; cur.nss <= RTW89_NSS_2; cur.nss++) {
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+ for (cur.nss = 0; cur.nss < max_nss_num; cur.nss++) {
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for (i = 0; i < ARRAY_SIZE(rs); i++) {
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if (cur.nss >= rtw89_rs_nss_max[rs[i]])
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continue;
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@@ -2127,6 +2128,7 @@ void rtw89_phy_set_txpwr_limit(struct rtw89_dev *rtwdev,
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const struct rtw89_chan *chan,
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enum rtw89_phy_idx phy_idx)
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{
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+ u8 max_ntx_num = rtwdev->chip->rf_path_num;
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struct rtw89_txpwr_limit lmt;
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u8 ch = chan->channel;
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u8 bw = chan->band_width;
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@@ -2141,7 +2143,7 @@ void rtw89_phy_set_txpwr_limit(struct rtw89_dev *rtwdev,
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RTW89_TXPWR_LMT_PAGE_SIZE);
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addr = R_AX_PWR_LMT;
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- for (i = 0; i < RTW89_NTX_NUM; i++) {
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+ for (i = 0; i < max_ntx_num; i++) {
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rtw89_phy_fill_txpwr_limit(rtwdev, chan, &lmt, i);
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ptr = (s8 *)&lmt;
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@@ -2162,6 +2164,7 @@ void rtw89_phy_set_txpwr_limit_ru(struct rtw89_dev *rtwdev,
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const struct rtw89_chan *chan,
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enum rtw89_phy_idx phy_idx)
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{
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+ u8 max_ntx_num = rtwdev->chip->rf_path_num;
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struct rtw89_txpwr_limit_ru lmt_ru;
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u8 ch = chan->channel;
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u8 bw = chan->band_width;
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@@ -2176,7 +2179,7 @@ void rtw89_phy_set_txpwr_limit_ru(struct rtw89_dev *rtwdev,
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RTW89_TXPWR_LMT_RU_PAGE_SIZE);
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addr = R_AX_PWR_RU_LMT;
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- for (i = 0; i < RTW89_NTX_NUM; i++) {
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+ for (i = 0; i < max_ntx_num; i++) {
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rtw89_phy_fill_txpwr_limit_ru(rtwdev, chan, &lmt_ru, i);
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ptr = (s8 *)&lmt_ru;
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--
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2.13.6
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