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170 lines
6.3 KiB
170 lines
6.3 KiB
4 years ago
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From 4470dc0119dc1193bdced8bedfacca93bcc8d92b Mon Sep 17 00:00:00 2001
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From: Alaa Hleihel <ahleihel@redhat.com>
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Date: Sun, 10 May 2020 15:04:34 -0400
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Subject: [PATCH 110/312] [netdrv] net/mlx5: DR, Add support for Geneve packets
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SW steering
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Message-id: <20200510150452.10307-70-ahleihel@redhat.com>
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Patchwork-id: 306693
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Patchwork-instance: patchwork
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O-Subject: [RHEL8.3 BZ 1789380 v2 69/87] net/mlx5: DR, Add support for Geneve packets SW steering
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Bugzilla: 1789380
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RH-Acked-by: Kamal Heib <kheib@redhat.com>
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RH-Acked-by: Jarod Wilson <jarod@redhat.com>
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RH-Acked-by: Tony Camuso <tcamuso@redhat.com>
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RH-Acked-by: Jonathan Toppins <jtoppins@redhat.com>
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Bugzilla: http://bugzilla.redhat.com/1789380
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Upstream: v5.5-rc1
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commit b6d12238459d2f3c1140689c8fbb1bf1e0fe1927
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Author: Yevgeny Kliteynik <kliteyn@mellanox.com>
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Date: Mon Oct 28 17:22:06 2019 +0200
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net/mlx5: DR, Add support for Geneve packets SW steering
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Add support for SW steering matching on Geneve header fields:
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- VNI
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- OAM
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- protocol type
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- options length
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Signed-off-by: Yevgeny Kliteynik <kliteyn@mellanox.com>
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Reviewed-by: Alex Vesker <valex@mellanox.com>
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Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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Signed-off-by: Alaa Hleihel <ahleihel@redhat.com>
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Signed-off-by: Frantisek Hrbata <fhrbata@redhat.com>
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---
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.../mellanox/mlx5/core/steering/dr_matcher.c | 27 +++++++++++
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.../ethernet/mellanox/mlx5/core/steering/dr_ste.c | 53 ++++++++++++++++++++++
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.../mellanox/mlx5/core/steering/dr_types.h | 3 ++
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3 files changed, 83 insertions(+)
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diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c
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index f177c468b740..c6dbd856df94 100644
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--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c
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+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c
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@@ -125,6 +125,29 @@ dr_mask_is_flex_parser_tnl_vxlan_gpe_set(struct mlx5dr_match_param *mask,
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dr_matcher_supp_flex_parser_vxlan_gpe(&dmn->info.caps);
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}
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+static bool dr_mask_is_misc_geneve_set(struct mlx5dr_match_misc *misc)
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+{
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+ return misc->geneve_vni ||
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+ misc->geneve_oam ||
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+ misc->geneve_protocol_type ||
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+ misc->geneve_opt_len;
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+}
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+
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+static bool
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+dr_matcher_supp_flex_parser_geneve(struct mlx5dr_cmd_caps *caps)
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+{
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+ return caps->flex_protocols &
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+ MLX5_FLEX_PARSER_GENEVE_ENABLED;
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+}
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+
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+static bool
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+dr_mask_is_flex_parser_tnl_geneve_set(struct mlx5dr_match_param *mask,
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+ struct mlx5dr_domain *dmn)
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+{
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+ return dr_mask_is_misc_geneve_set(&mask->misc) &&
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+ dr_matcher_supp_flex_parser_geneve(&dmn->info.caps);
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+}
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+
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static bool dr_mask_is_flex_parser_icmpv6_set(struct mlx5dr_match_misc3 *misc3)
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{
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return (misc3->icmpv6_type || misc3->icmpv6_code ||
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@@ -275,6 +298,10 @@ static int dr_matcher_set_ste_builders(struct mlx5dr_matcher *matcher,
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mlx5dr_ste_build_flex_parser_tnl_vxlan_gpe(&sb[idx++],
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&mask,
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inner, rx);
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+ else if (dr_mask_is_flex_parser_tnl_geneve_set(&mask, dmn))
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+ mlx5dr_ste_build_flex_parser_tnl_geneve(&sb[idx++],
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+ &mask,
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+ inner, rx);
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if (DR_MASK_IS_ETH_L4_MISC_SET(mask.misc3, outer))
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mlx5dr_ste_build_eth_l4_misc(&sb[idx++], &mask, inner, rx);
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diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c
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index 496e680e0fd9..aade62a9ee5c 100644
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--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c
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+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c
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@@ -2136,6 +2136,59 @@ void mlx5dr_ste_build_flex_parser_tnl_vxlan_gpe(struct mlx5dr_ste_build *sb,
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sb->ste_build_tag_func = &dr_ste_build_flex_parser_tnl_vxlan_gpe_tag;
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}
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+static void
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+dr_ste_build_flex_parser_tnl_geneve_bit_mask(struct mlx5dr_match_param *value,
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+ u8 *bit_mask)
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+{
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+ struct mlx5dr_match_misc *misc_mask = &value->misc;
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+
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+ DR_STE_SET_MASK_V(flex_parser_tnl_geneve, bit_mask,
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+ geneve_protocol_type,
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+ misc_mask, geneve_protocol_type);
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+ DR_STE_SET_MASK_V(flex_parser_tnl_geneve, bit_mask,
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+ geneve_oam,
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+ misc_mask, geneve_oam);
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+ DR_STE_SET_MASK_V(flex_parser_tnl_geneve, bit_mask,
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+ geneve_opt_len,
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+ misc_mask, geneve_opt_len);
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+ DR_STE_SET_MASK_V(flex_parser_tnl_geneve, bit_mask,
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+ geneve_vni,
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+ misc_mask, geneve_vni);
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+}
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+
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+static int
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+dr_ste_build_flex_parser_tnl_geneve_tag(struct mlx5dr_match_param *value,
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+ struct mlx5dr_ste_build *sb,
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+ u8 *hw_ste_p)
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+{
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+ struct dr_hw_ste_format *hw_ste = (struct dr_hw_ste_format *)hw_ste_p;
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+ struct mlx5dr_match_misc *misc = &value->misc;
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+ u8 *tag = hw_ste->tag;
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+
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+ DR_STE_SET_TAG(flex_parser_tnl_geneve, tag,
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+ geneve_protocol_type, misc, geneve_protocol_type);
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+ DR_STE_SET_TAG(flex_parser_tnl_geneve, tag,
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+ geneve_oam, misc, geneve_oam);
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+ DR_STE_SET_TAG(flex_parser_tnl_geneve, tag,
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+ geneve_opt_len, misc, geneve_opt_len);
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+ DR_STE_SET_TAG(flex_parser_tnl_geneve, tag,
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+ geneve_vni, misc, geneve_vni);
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+
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+ return 0;
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+}
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+
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+void mlx5dr_ste_build_flex_parser_tnl_geneve(struct mlx5dr_ste_build *sb,
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+ struct mlx5dr_match_param *mask,
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+ bool inner, bool rx)
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+{
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+ dr_ste_build_flex_parser_tnl_geneve_bit_mask(mask, sb->bit_mask);
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+ sb->rx = rx;
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+ sb->inner = inner;
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+ sb->lu_type = MLX5DR_STE_LU_TYPE_FLEX_PARSER_TNL_HEADER;
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+ sb->byte_mask = dr_ste_conv_bit_to_byte_mask(sb->bit_mask);
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+ sb->ste_build_tag_func = &dr_ste_build_flex_parser_tnl_geneve_tag;
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+}
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+
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static void dr_ste_build_register_0_bit_mask(struct mlx5dr_match_param *value,
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u8 *bit_mask)
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{
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diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h
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index 9dedc162756c..dffe35145d19 100644
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--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h
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+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h
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@@ -330,6 +330,9 @@ int mlx5dr_ste_build_flex_parser_1(struct mlx5dr_ste_build *sb,
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void mlx5dr_ste_build_flex_parser_tnl_vxlan_gpe(struct mlx5dr_ste_build *sb,
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struct mlx5dr_match_param *mask,
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bool inner, bool rx);
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+void mlx5dr_ste_build_flex_parser_tnl_geneve(struct mlx5dr_ste_build *sb,
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+ struct mlx5dr_match_param *mask,
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+ bool inner, bool rx);
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void mlx5dr_ste_build_general_purpose(struct mlx5dr_ste_build *sb,
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struct mlx5dr_match_param *mask,
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bool inner, bool rx);
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--
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2.13.6
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