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78 lines
2.7 KiB
78 lines
2.7 KiB
4 years ago
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From 05c740d36ff80368cce999cd1f694cfa5dd7ab4b Mon Sep 17 00:00:00 2001
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From: Alaa Hleihel <ahleihel@redhat.com>
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Date: Sun, 10 May 2020 15:04:33 -0400
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Subject: [PATCH 109/312] [netdrv] net/mlx5: DR, Add HW bits and definitions
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for Geneve flex parser
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Message-id: <20200510150452.10307-69-ahleihel@redhat.com>
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Patchwork-id: 306692
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Patchwork-instance: patchwork
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O-Subject: [RHEL8.3 BZ 1789380 v2 68/87] net/mlx5: DR, Add HW bits and definitions for Geneve flex parser
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Bugzilla: 1789380
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RH-Acked-by: Kamal Heib <kheib@redhat.com>
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RH-Acked-by: Jarod Wilson <jarod@redhat.com>
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RH-Acked-by: Tony Camuso <tcamuso@redhat.com>
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RH-Acked-by: Jonathan Toppins <jtoppins@redhat.com>
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Bugzilla: http://bugzilla.redhat.com/1789380
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Upstream: v5.5-rc1
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commit a18fab48dbacbb7ff104a13e987778b7995bec07
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Author: Yevgeny Kliteynik <kliteyn@mellanox.com>
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Date: Mon Oct 28 16:58:53 2019 +0200
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net/mlx5: DR, Add HW bits and definitions for Geneve flex parser
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Add definition for flex parser tunneling header for Geneve.
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Signed-off-by: Yevgeny Kliteynik <kliteyn@mellanox.com>
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Reviewed-by: Alex Vesker <valex@mellanox.com>
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Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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Signed-off-by: Alaa Hleihel <ahleihel@redhat.com>
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Signed-off-by: Frantisek Hrbata <fhrbata@redhat.com>
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---
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.../net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr.h | 13 +++++++++++++
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include/linux/mlx5/mlx5_ifc.h | 1 +
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2 files changed, 14 insertions(+)
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diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr.h
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index 6d78b027fe56..1722f4668269 100644
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--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr.h
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+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5_ifc_dr.h
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@@ -559,6 +559,19 @@ struct mlx5_ifc_ste_flex_parser_tnl_vxlan_gpe_bits {
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u8 reserved_at_40[0x40];
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};
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+struct mlx5_ifc_ste_flex_parser_tnl_geneve_bits {
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+ u8 reserved_at_0[0x2];
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+ u8 geneve_opt_len[0x6];
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+ u8 geneve_oam[0x1];
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+ u8 reserved_at_9[0x7];
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+ u8 geneve_protocol_type[0x10];
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+
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+ u8 geneve_vni[0x18];
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+ u8 reserved_at_38[0x8];
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+
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+ u8 reserved_at_40[0x40];
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+};
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+
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struct mlx5_ifc_ste_general_purpose_bits {
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u8 general_purpose_lookup_field[0x20];
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diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
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index a77ca587c3cc..4c703796c233 100644
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--- a/include/linux/mlx5/mlx5_ifc.h
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+++ b/include/linux/mlx5/mlx5_ifc.h
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@@ -1113,6 +1113,7 @@ enum {
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};
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enum {
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+ MLX5_FLEX_PARSER_GENEVE_ENABLED = 1 << 3,
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MLX5_FLEX_PARSER_VXLAN_GPE_ENABLED = 1 << 7,
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MLX5_FLEX_PARSER_ICMP_V4_ENABLED = 1 << 8,
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MLX5_FLEX_PARSER_ICMP_V6_ENABLED = 1 << 9,
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--
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2.13.6
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