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136 lines
6.1 KiB
136 lines
6.1 KiB
4 years ago
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From d5a140965c323fce16afc0e91596eaa3480ea1f0 Mon Sep 17 00:00:00 2001
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From: Alaa Hleihel <ahleihel@redhat.com>
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Date: Mon, 1 Jun 2020 15:40:50 -0400
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Subject: [PATCH 296/312] [netdrv] net/mlx5: Accel: fpga tls fix cast to __be64
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and incorrect argument types
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Message-id: <20200601154102.25980-28-ahleihel@redhat.com>
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Patchwork-id: 315732
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Patchwork-instance: patchwork
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O-Subject: [RHEL8.3 BZ 1842258 27/39] net/mlx5: Accel: fpga tls fix cast to __be64 and incorrect argument types
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Bugzilla: 1842258
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RH-Acked-by: Honggang Li <honli@redhat.com>
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RH-Acked-by: Kamal Heib <kheib@redhat.com>
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RH-Acked-by: Marcelo Leitner <mleitner@redhat.com>
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RH-Acked-by: Jarod Wilson <jarod@redhat.com>
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Bugzilla: http://bugzilla.redhat.com/1842258
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Upstream: git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git , branch: master
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commit aee3e9c457f172870bdb87e675faf6c4528190b1
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Author: Saeed Mahameed <saeedm@mellanox.com>
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Date: Thu May 28 18:42:40 2020 -0700
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net/mlx5: Accel: fpga tls fix cast to __be64 and incorrect argument types
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tls handle and rcd_sn are actually big endian and not in host format.
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Fix that.
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Fix the following sparse warnings:
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drivers/net/ethernet/mellanox/mlx5/core/en_accel/tls.c:177:21:
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warning: cast to restricted __be64
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drivers/net/ethernet/mellanox/mlx5/core/en_accel/tls.c:178:52:
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warning: incorrect type in argument 2 (different base types)
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expected unsigned int [usertype] handle
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got restricted __be32 [usertype] handle
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Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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Signed-off-by: Alaa Hleihel <ahleihel@redhat.com>
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Signed-off-by: Frantisek Hrbata <fhrbata@redhat.com>
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---
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drivers/net/ethernet/mellanox/mlx5/core/accel/tls.c | 4 ++--
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drivers/net/ethernet/mellanox/mlx5/core/accel/tls.h | 8 ++++----
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drivers/net/ethernet/mellanox/mlx5/core/en_accel/tls.c | 2 +-
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drivers/net/ethernet/mellanox/mlx5/core/fpga/tls.c | 4 ++--
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drivers/net/ethernet/mellanox/mlx5/core/fpga/tls.h | 4 ++--
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5 files changed, 11 insertions(+), 11 deletions(-)
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diff --git a/drivers/net/ethernet/mellanox/mlx5/core/accel/tls.c b/drivers/net/ethernet/mellanox/mlx5/core/accel/tls.c
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index cab708af3422..cbf3d76c05a8 100644
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--- a/drivers/net/ethernet/mellanox/mlx5/core/accel/tls.c
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+++ b/drivers/net/ethernet/mellanox/mlx5/core/accel/tls.c
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@@ -56,8 +56,8 @@ void mlx5_accel_tls_del_flow(struct mlx5_core_dev *mdev, u32 swid,
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mlx5_fpga_tls_del_flow(mdev, swid, GFP_KERNEL, direction_sx);
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}
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-int mlx5_accel_tls_resync_rx(struct mlx5_core_dev *mdev, u32 handle, u32 seq,
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- u64 rcd_sn)
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+int mlx5_accel_tls_resync_rx(struct mlx5_core_dev *mdev, __be32 handle,
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+ u32 seq, __be64 rcd_sn)
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{
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return mlx5_fpga_tls_resync_rx(mdev, handle, seq, rcd_sn);
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}
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diff --git a/drivers/net/ethernet/mellanox/mlx5/core/accel/tls.h b/drivers/net/ethernet/mellanox/mlx5/core/accel/tls.h
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index e09bc3858d57..aefea467f7b3 100644
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--- a/drivers/net/ethernet/mellanox/mlx5/core/accel/tls.h
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+++ b/drivers/net/ethernet/mellanox/mlx5/core/accel/tls.h
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@@ -109,8 +109,8 @@ int mlx5_accel_tls_add_flow(struct mlx5_core_dev *mdev, void *flow,
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bool direction_sx);
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void mlx5_accel_tls_del_flow(struct mlx5_core_dev *mdev, u32 swid,
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bool direction_sx);
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-int mlx5_accel_tls_resync_rx(struct mlx5_core_dev *mdev, u32 handle, u32 seq,
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- u64 rcd_sn);
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+int mlx5_accel_tls_resync_rx(struct mlx5_core_dev *mdev, __be32 handle,
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+ u32 seq, __be64 rcd_sn);
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bool mlx5_accel_is_tls_device(struct mlx5_core_dev *mdev);
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u32 mlx5_accel_tls_device_caps(struct mlx5_core_dev *mdev);
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int mlx5_accel_tls_init(struct mlx5_core_dev *mdev);
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@@ -125,8 +125,8 @@ mlx5_accel_tls_add_flow(struct mlx5_core_dev *mdev, void *flow,
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bool direction_sx) { return -ENOTSUPP; }
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static inline void mlx5_accel_tls_del_flow(struct mlx5_core_dev *mdev, u32 swid,
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bool direction_sx) { }
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-static inline int mlx5_accel_tls_resync_rx(struct mlx5_core_dev *mdev, u32 handle,
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- u32 seq, u64 rcd_sn) { return 0; }
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+static inline int mlx5_accel_tls_resync_rx(struct mlx5_core_dev *mdev, __be32 handle,
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+ u32 seq, __be64 rcd_sn) { return 0; }
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static inline bool mlx5_accel_is_tls_device(struct mlx5_core_dev *mdev)
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{
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return mlx5_accel_is_ktls_device(mdev);
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diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/tls.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/tls.c
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index fba561ffe1d4..c01c17a5c6de 100644
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--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/tls.c
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+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/tls.c
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@@ -167,7 +167,7 @@ static int mlx5e_tls_resync(struct net_device *netdev, struct sock *sk,
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struct tls_context *tls_ctx = tls_get_ctx(sk);
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struct mlx5e_priv *priv = netdev_priv(netdev);
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struct mlx5e_tls_offload_context_rx *rx_ctx;
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- u64 rcd_sn = *(u64 *)rcd_sn_data;
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+ __be64 rcd_sn = *(__be64 *)rcd_sn_data;
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if (WARN_ON_ONCE(direction != TLS_OFFLOAD_CTX_DIR_RX))
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return -EINVAL;
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diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fpga/tls.c b/drivers/net/ethernet/mellanox/mlx5/core/fpga/tls.c
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index 22a2ef111514..29b7339ebfa3 100644
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--- a/drivers/net/ethernet/mellanox/mlx5/core/fpga/tls.c
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+++ b/drivers/net/ethernet/mellanox/mlx5/core/fpga/tls.c
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@@ -194,8 +194,8 @@ static void mlx5_fpga_tls_flow_to_cmd(void *flow, void *cmd)
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MLX5_GET(tls_flow, flow, direction_sx));
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}
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-int mlx5_fpga_tls_resync_rx(struct mlx5_core_dev *mdev, u32 handle, u32 seq,
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- u64 rcd_sn)
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+int mlx5_fpga_tls_resync_rx(struct mlx5_core_dev *mdev, __be32 handle,
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+ u32 seq, __be64 rcd_sn)
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{
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struct mlx5_fpga_dma_buf *buf;
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int size = sizeof(*buf) + MLX5_TLS_COMMAND_SIZE;
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diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fpga/tls.h b/drivers/net/ethernet/mellanox/mlx5/core/fpga/tls.h
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index 3b2e37bf76fe..5714cf391d1b 100644
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--- a/drivers/net/ethernet/mellanox/mlx5/core/fpga/tls.h
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+++ b/drivers/net/ethernet/mellanox/mlx5/core/fpga/tls.h
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@@ -68,7 +68,7 @@ static inline u32 mlx5_fpga_tls_device_caps(struct mlx5_core_dev *mdev)
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return mdev->fpga->tls->caps;
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}
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-int mlx5_fpga_tls_resync_rx(struct mlx5_core_dev *mdev, u32 handle, u32 seq,
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- u64 rcd_sn);
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+int mlx5_fpga_tls_resync_rx(struct mlx5_core_dev *mdev, __be32 handle,
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+ u32 seq, __be64 rcd_sn);
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#endif /* __MLX5_FPGA_TLS_H__ */
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--
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2.13.6
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