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60 lines
2.3 KiB
60 lines
2.3 KiB
4 years ago
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From a88b00c14457d1a833ee903803b1c6e094fb4bd0 Mon Sep 17 00:00:00 2001
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From: Alaa Hleihel <ahleihel@redhat.com>
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Date: Sun, 10 May 2020 15:04:47 -0400
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Subject: [PATCH 122/312] [netdrv] net/mlx5: Fix lowest FDB pool size
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Message-id: <20200510150452.10307-83-ahleihel@redhat.com>
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Patchwork-id: 306706
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Patchwork-instance: patchwork
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O-Subject: [RHEL8.3 BZ 1789380 v2 82/87] net/mlx5: Fix lowest FDB pool size
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Bugzilla: 1789380
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RH-Acked-by: Kamal Heib <kheib@redhat.com>
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RH-Acked-by: Jarod Wilson <jarod@redhat.com>
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RH-Acked-by: Tony Camuso <tcamuso@redhat.com>
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RH-Acked-by: Jonathan Toppins <jtoppins@redhat.com>
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Bugzilla: http://bugzilla.redhat.com/1789380
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Upstream: v5.5
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commit 93b8a7ecb7287cc9b0196f12a25b57c2462d11dc
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Author: Paul Blakey <paulb@mellanox.com>
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Date: Tue Dec 31 17:04:15 2019 +0200
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net/mlx5: Fix lowest FDB pool size
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The pool sizes represent the pool sizes in the fw. when we request
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a pool size from fw, it will return the next possible group.
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We track how many pools the fw has left and start requesting groups
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from the big to the small.
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When we start request 4k group, which doesn't exists in fw, fw
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wants to allocate the next possible size, 64k, but will fail since
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its exhausted. The correct smallest pool size in fw is 128 and not 4k.
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Fixes: e52c28024008 ("net/mlx5: E-Switch, Add chains and priorities")
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Signed-off-by: Paul Blakey <paulb@mellanox.com>
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Reviewed-by: Roi Dayan <roid@mellanox.com>
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Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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Signed-off-by: Alaa Hleihel <ahleihel@redhat.com>
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Signed-off-by: Frantisek Hrbata <fhrbata@redhat.com>
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---
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drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
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index 121abcae993a..9d2d850463bb 100644
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--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
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+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
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@@ -866,7 +866,7 @@ static int esw_add_fdb_miss_rule(struct mlx5_eswitch *esw)
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*/
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#define ESW_SIZE (16 * 1024 * 1024)
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const unsigned int ESW_POOLS[4] = { 4 * 1024 * 1024, 1 * 1024 * 1024,
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- 64 * 1024, 4 * 1024 };
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+ 64 * 1024, 128 };
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static int
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get_sz_from_pool(struct mlx5_eswitch *esw)
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--
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2.13.6
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