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171 lines
5.4 KiB
171 lines
5.4 KiB
From 7cff5d1939a2a4b5325abda7aa5bddb7757e0e87 Mon Sep 17 00:00:00 2001
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From: Jonathan Toppins <jtoppins@redhat.com>
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Date: Wed, 2 Oct 2019 18:22:58 -0400
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Subject: [PATCH 43/96] [netdrv] bnxt_en: Expand bnxt_tpa_info struct to
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support 57500 chips
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Message-id: <d5bcddccd785fcb964e019da190c04ee24ccdc8f.1570027456.git.jtoppins@redhat.com>
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Patchwork-id: 276471
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O-Subject: [RHEL-8.2 PATCH 36/78] bnxt_en: Expand bnxt_tpa_info struct to support 57500 chips.
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Bugzilla: 1724766
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RH-Acked-by: John Linville <linville@redhat.com>
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RH-Acked-by: Jarod Wilson <jarod@redhat.com>
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Add an aggregation array to bnxt_tpa_info struct to keep track of the
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aggregation completions. The aggregation completions are not
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completed at the TPA_END completion on 57500 chips so we need to
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keep track of them. The array is only allocated on the new chips
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when required. An agg_count field is also added to keep track of the
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number of these completions.
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The maximum concurrent TPA is now discovered from firmware instead of
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the hardcoded 64. Add a new bp->max_tpa to keep track of maximum
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configured TPA.
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Signed-off-by: Michael Chan <michael.chan@broadcom.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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(cherry picked from commit 79632e9ba38671215fb193346ef6fb8db582744d)
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Bugzilla: 1724766
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Build Info: https://brewweb.engineering.redhat.com/brew/taskinfo?taskID=23809532
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Tested: build, boot, basic ping
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Signed-off-by: Jonathan Toppins <jtoppins@redhat.com>
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Signed-off-by: Bruno Meneguele <bmeneg@redhat.com>
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---
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drivers/net/ethernet/broadcom/bnxt/bnxt.c | 41 ++++++++++++++++++++++++++-----
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drivers/net/ethernet/broadcom/bnxt/bnxt.h | 6 +++++
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2 files changed, 41 insertions(+), 6 deletions(-)
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Index: src/drivers/net/ethernet/broadcom/bnxt/bnxt.c
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===================================================================
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--- src.orig/drivers/net/ethernet/broadcom/bnxt/bnxt.c 2020-02-06 16:23:15.989510591 +0100
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+++ src/drivers/net/ethernet/broadcom/bnxt/bnxt.c 2020-02-06 16:23:16.115509434 +0100
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@@ -2336,7 +2336,7 @@
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int j;
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if (rxr->rx_tpa) {
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- for (j = 0; j < MAX_TPA; j++) {
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+ for (j = 0; j < bp->max_tpa; j++) {
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struct bnxt_tpa_info *tpa_info =
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&rxr->rx_tpa[j];
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u8 *data = tpa_info->data;
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@@ -2498,6 +2498,10 @@
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for (i = 0; i < bp->rx_nr_rings; i++) {
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struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i];
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+ if (rxr->rx_tpa) {
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+ kfree(rxr->rx_tpa[0].agg_arr);
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+ rxr->rx_tpa[0].agg_arr = NULL;
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+ }
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kfree(rxr->rx_tpa);
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rxr->rx_tpa = NULL;
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}
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@@ -2505,15 +2509,33 @@
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static int bnxt_alloc_tpa_info(struct bnxt *bp)
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{
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- int i;
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+ int i, j, total_aggs = 0;
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+
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+ bp->max_tpa = MAX_TPA;
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+ if (bp->flags & BNXT_FLAG_CHIP_P5) {
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+ if (!bp->max_tpa_v2)
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+ return 0;
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+ bp->max_tpa = max_t(u16, bp->max_tpa_v2, MAX_TPA_P5);
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+ total_aggs = bp->max_tpa * MAX_SKB_FRAGS;
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+ }
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for (i = 0; i < bp->rx_nr_rings; i++) {
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struct bnxt_rx_ring_info *rxr = &bp->rx_ring[i];
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+ struct rx_agg_cmp *agg;
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- rxr->rx_tpa = kcalloc(MAX_TPA, sizeof(struct bnxt_tpa_info),
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+ rxr->rx_tpa = kcalloc(bp->max_tpa, sizeof(struct bnxt_tpa_info),
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GFP_KERNEL);
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if (!rxr->rx_tpa)
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return -ENOMEM;
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+
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+ if (!(bp->flags & BNXT_FLAG_CHIP_P5))
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+ continue;
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+ agg = kcalloc(total_aggs, sizeof(*agg), GFP_KERNEL);
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+ rxr->rx_tpa[0].agg_arr = agg;
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+ if (!agg)
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+ return -ENOMEM;
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+ for (j = 1; j < bp->max_tpa; j++)
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+ rxr->rx_tpa[j].agg_arr = agg + j * MAX_SKB_FRAGS;
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}
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return 0;
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}
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@@ -2979,7 +3001,7 @@
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u8 *data;
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dma_addr_t mapping;
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- for (i = 0; i < MAX_TPA; i++) {
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+ for (i = 0; i < bp->max_tpa; i++) {
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data = __bnxt_alloc_rx_data(bp, &mapping,
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GFP_KERNEL);
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if (!data)
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@@ -4440,6 +4462,7 @@
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static int bnxt_hwrm_vnic_set_tpa(struct bnxt *bp, u16 vnic_id, u32 tpa_flags)
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{
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struct bnxt_vnic_info *vnic = &bp->vnic_info[vnic_id];
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+ u16 max_aggs = VNIC_TPA_CFG_REQ_MAX_AGGS_MAX;
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struct hwrm_vnic_tpa_cfg_input req = {0};
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if (vnic->fw_vnic_id == INVALID_HW_RING_ID)
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@@ -4479,9 +4502,14 @@
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nsegs = (MAX_SKB_FRAGS - n) / n;
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}
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- segs = ilog2(nsegs);
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+ if (bp->flags & BNXT_FLAG_CHIP_P5) {
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+ segs = MAX_TPA_SEGS_P5;
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+ max_aggs = bp->max_tpa;
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+ } else {
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+ segs = ilog2(nsegs);
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+ }
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req.max_agg_segs = cpu_to_le16(segs);
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- req.max_aggs = cpu_to_le16(VNIC_TPA_CFG_REQ_MAX_AGGS_MAX);
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+ req.max_aggs = cpu_to_le16(max_aggs);
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req.min_agg_len = cpu_to_le32(512);
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}
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@@ -4841,6 +4869,7 @@
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if (flags &
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VNIC_QCAPS_RESP_FLAGS_ROCE_MIRRORING_CAPABLE_VNIC_CAP)
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bp->flags |= BNXT_FLAG_ROCE_MIRROR_CAP;
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+ bp->max_tpa_v2 = le16_to_cpu(resp->max_aggs_supported);
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}
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mutex_unlock(&bp->hwrm_cmd_lock);
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return rc;
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Index: src/drivers/net/ethernet/broadcom/bnxt/bnxt.h
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===================================================================
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--- src.orig/drivers/net/ethernet/broadcom/bnxt/bnxt.h 2020-02-06 16:23:15.866511720 +0100
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+++ src/drivers/net/ethernet/broadcom/bnxt/bnxt.h 2020-02-06 16:23:16.116509425 +0100
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@@ -554,6 +554,8 @@
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#define BNXT_DEFAULT_TX_RING_SIZE 511
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#define MAX_TPA 64
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+#define MAX_TPA_P5 256
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+#define MAX_TPA_SEGS_P5 0x3f
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#if (BNXT_PAGE_SHIFT == 16)
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#define MAX_RX_PAGES 1
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@@ -835,6 +837,8 @@
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((hdr_info) & 0x1ff)
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u16 cfa_code; /* cfa_code in TPA start compl */
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+ u8 agg_count;
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+ struct rx_agg_cmp *agg_arr;
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};
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struct bnxt_rx_ring_info {
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@@ -1481,6 +1485,8 @@
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u16, void *, u8 *, dma_addr_t,
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unsigned int);
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+ u16 max_tpa_v2;
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+ u16 max_tpa;
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u32 rx_buf_size;
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u32 rx_buf_use_size; /* useable size */
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u16 rx_offset;
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