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115 lines
4.2 KiB
115 lines
4.2 KiB
5 years ago
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From 075dd4d3abf9b0b014318e6c103d100703bada59 Mon Sep 17 00:00:00 2001
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From: Jonathan Toppins <jtoppins@redhat.com>
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Date: Wed, 2 Oct 2019 18:22:39 -0400
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Subject: [PATCH 24/96] [netdrv] bnxt_en: Separate RDMA MR/AH context
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allocation
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Message-id: <954dad29d938cf452dacb2aeff7e5775a8df5e6f.1570027456.git.jtoppins@redhat.com>
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Patchwork-id: 276439
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O-Subject: [RHEL-8.2 PATCH 17/78] bnxt_en: Separate RDMA MR/AH context allocation.
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Bugzilla: 1724766
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RH-Acked-by: John Linville <linville@redhat.com>
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RH-Acked-by: Jarod Wilson <jarod@redhat.com>
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In newer firmware, the context memory for MR (Memory Region)
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and AH (Address Handle) to support RDMA are specified separately.
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Modify driver to specify and allocate the 2 context memory types
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separately when supported by the firmware.
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Signed-off-by: Devesh Sharma <devesh.sharma@broadcom.com>
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Signed-off-by: Michael Chan <michael.chan@broadcom.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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(cherry picked from commit 53579e37d13a7a87430e2ec0171e091ebf2e63a1)
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Bugzilla: 1724766
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Build Info: https://brewweb.engineering.redhat.com/brew/taskinfo?taskID=23809532
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Tested: build, boot, basic ping
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Signed-off-by: Jonathan Toppins <jtoppins@redhat.com>
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Signed-off-by: Bruno Meneguele <bmeneg@redhat.com>
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---
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drivers/net/ethernet/broadcom/bnxt/bnxt.c | 19 ++++++++++++++++++-
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drivers/net/ethernet/broadcom/bnxt/bnxt.h | 1 +
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2 files changed, 19 insertions(+), 1 deletion(-)
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Index: src/drivers/net/ethernet/broadcom/bnxt/bnxt.c
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===================================================================
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--- src.orig/drivers/net/ethernet/broadcom/bnxt/bnxt.c 2020-02-06 16:23:13.384534503 +0100
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+++ src/drivers/net/ethernet/broadcom/bnxt/bnxt.c 2020-02-06 16:23:13.520533254 +0100
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@@ -6091,6 +6091,8 @@
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ctx->tqm_entries_multiple = 1;
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ctx->mrav_max_entries = le32_to_cpu(resp->mrav_max_entries);
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ctx->mrav_entry_size = le16_to_cpu(resp->mrav_entry_size);
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+ ctx->mrav_num_entries_units =
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+ le16_to_cpu(resp->mrav_num_entries_units);
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ctx->tim_entry_size = le16_to_cpu(resp->tim_entry_size);
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ctx->tim_max_entries = le32_to_cpu(resp->tim_max_entries);
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} else {
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@@ -6137,6 +6139,7 @@
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struct bnxt_ctx_pg_info *ctx_pg;
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__le32 *num_entries;
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__le64 *pg_dir;
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+ u32 flags = 0;
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u8 *pg_attr;
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int i, rc;
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u32 ena;
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@@ -6196,6 +6199,9 @@
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if (enables & FUNC_BACKING_STORE_CFG_REQ_ENABLES_MRAV) {
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ctx_pg = &ctx->mrav_mem;
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req.mrav_num_entries = cpu_to_le32(ctx_pg->entries);
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+ if (ctx->mrav_num_entries_units)
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+ flags |=
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+ FUNC_BACKING_STORE_CFG_REQ_FLAGS_MRAV_RESERVATION_SPLIT;
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req.mrav_entry_size = cpu_to_le16(ctx->mrav_entry_size);
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bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem,
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&req.mrav_pg_size_mrav_lvl,
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@@ -6222,6 +6228,7 @@
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*num_entries = cpu_to_le32(ctx_pg->entries);
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bnxt_hwrm_set_pg_attr(&ctx_pg->ring_mem, pg_attr, pg_dir);
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}
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+ req.flags = cpu_to_le32(flags);
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rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
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if (rc)
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rc = -EIO;
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@@ -6360,6 +6367,7 @@
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struct bnxt_ctx_pg_info *ctx_pg;
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struct bnxt_ctx_mem_info *ctx;
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u32 mem_size, ena, entries;
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+ u32 num_mr, num_ah;
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u32 extra_srqs = 0;
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u32 extra_qps = 0;
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u8 pg_lvl = 1;
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@@ -6423,12 +6431,21 @@
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goto skip_rdma;
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ctx_pg = &ctx->mrav_mem;
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- ctx_pg->entries = extra_qps * 4;
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+ /* 128K extra is needed to accommodate static AH context
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+ * allocation by f/w.
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+ */
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+ num_mr = 1024 * 256;
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+ num_ah = 1024 * 128;
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+ ctx_pg->entries = num_mr + num_ah;
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mem_size = ctx->mrav_entry_size * ctx_pg->entries;
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rc = bnxt_alloc_ctx_pg_tbls(bp, ctx_pg, mem_size, 2);
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if (rc)
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return rc;
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ena = FUNC_BACKING_STORE_CFG_REQ_ENABLES_MRAV;
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+ if (ctx->mrav_num_entries_units)
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+ ctx_pg->entries =
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+ ((num_mr / ctx->mrav_num_entries_units) << 16) |
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+ (num_ah / ctx->mrav_num_entries_units);
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ctx_pg = &ctx->tim_mem;
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ctx_pg->entries = ctx->qp_mem.entries;
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Index: src/drivers/net/ethernet/broadcom/bnxt/bnxt.h
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===================================================================
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--- src.orig/drivers/net/ethernet/broadcom/bnxt/bnxt.h 2020-02-06 16:23:13.240535824 +0100
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+++ src/drivers/net/ethernet/broadcom/bnxt/bnxt.h 2020-02-06 16:23:13.520533254 +0100
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@@ -1228,6 +1228,7 @@
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u16 mrav_entry_size;
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u16 tim_entry_size;
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u32 tim_max_entries;
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+ u16 mrav_num_entries_units;
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u8 tqm_entries_multiple;
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u32 flags;
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