You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
178 lines
6.4 KiB
178 lines
6.4 KiB
From cadf1e919c3bc0dd43d514f27fff497cf61efc80 Mon Sep 17 00:00:00 2001
|
|
From: Igor Russkikh <irusskik@redhat.com>
|
|
Date: Fri, 6 Nov 2020 18:38:28 -0500
|
|
Subject: [PATCH 131/139] [netdrv] net: atlantic: add support for 64-bit
|
|
reads/writes
|
|
|
|
Message-id: <1604687916-15087-132-git-send-email-irusskik@redhat.com>
|
|
Patchwork-id: 338556
|
|
Patchwork-instance: patchwork
|
|
O-Subject: [RHEL8.4 BZ 1857861 131/139] net: atlantic: add support for 64-bit reads/writes
|
|
Bugzilla: 1857861
|
|
RH-Acked-by: David Arcari <darcari@redhat.com>
|
|
RH-Acked-by: John Linville <linville@redhat.com>
|
|
RH-Acked-by: Tony Camuso <tcamuso@redhat.com>
|
|
|
|
Bugzilla: http://bugzilla.redhat.com/1857861
|
|
|
|
commit 1e41b3fee795faa8a67713749a21e60828ae21ad
|
|
Author: Pavel Belous <pbelous@marvell.com>
|
|
Date: Mon Jul 20 21:32:40 2020 +0300
|
|
|
|
net: atlantic: add support for 64-bit reads/writes
|
|
|
|
This patch adds support for 64-bit reads/writes where applicable, e.g.
|
|
A2 supports them.
|
|
|
|
Signed-off-by: Pavel Belous <pbelous@marvell.com>
|
|
Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
|
|
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
|
|
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
|
|
Signed-off-by: Igor Russkikh <irusskik@redhat.com>
|
|
|
|
Cc: David Arcari <darcari@redhat.com>
|
|
Cc: Igor Russkikh <irusskik@redhat.com>
|
|
Signed-off-by: Jan Stancek <jstancek@redhat.com>
|
|
---
|
|
drivers/net/ethernet/aquantia/atlantic/aq_hw.h | 1 +
|
|
.../net/ethernet/aquantia/atlantic/aq_hw_utils.c | 29 ++++++++++++++++++----
|
|
.../net/ethernet/aquantia/atlantic/aq_hw_utils.h | 8 +++---
|
|
.../ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c | 1 +
|
|
.../ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c | 1 +
|
|
.../ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c | 1 +
|
|
6 files changed, 33 insertions(+), 8 deletions(-)
|
|
|
|
diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_hw.h b/drivers/net/ethernet/aquantia/atlantic/aq_hw.h
|
|
index 986f13809ad5..9d0c43325fc3 100644
|
|
--- a/drivers/net/ethernet/aquantia/atlantic/aq_hw.h
|
|
+++ b/drivers/net/ethernet/aquantia/atlantic/aq_hw.h
|
|
@@ -67,6 +67,7 @@ struct aq_hw_caps_s {
|
|
u8 rx_rings;
|
|
bool flow_control;
|
|
bool is_64_dma;
|
|
+ bool op64bit;
|
|
u32 quirks;
|
|
u32 priv_data_len;
|
|
};
|
|
diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c b/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c
|
|
index 342c5179f846..ae85c0a7d238 100644
|
|
--- a/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c
|
|
+++ b/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c
|
|
@@ -1,7 +1,8 @@
|
|
// SPDX-License-Identifier: GPL-2.0-only
|
|
-/*
|
|
- * aQuantia Corporation Network Driver
|
|
- * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved
|
|
+/* Atlantic Network Driver
|
|
+ *
|
|
+ * Copyright (C) 2014-2019 aQuantia Corporation
|
|
+ * Copyright (C) 2019-2020 Marvell International Ltd.
|
|
*/
|
|
|
|
/* File aq_hw_utils.c: Definitions of helper functions used across
|
|
@@ -9,6 +10,9 @@
|
|
*/
|
|
|
|
#include "aq_hw_utils.h"
|
|
+
|
|
+#include <linux/io-64-nonatomic-lo-hi.h>
|
|
+
|
|
#include "aq_hw.h"
|
|
#include "aq_nic.h"
|
|
|
|
@@ -56,13 +60,28 @@ void aq_hw_write_reg(struct aq_hw_s *hw, u32 reg, u32 value)
|
|
*/
|
|
u64 aq_hw_read_reg64(struct aq_hw_s *hw, u32 reg)
|
|
{
|
|
- u64 value = aq_hw_read_reg(hw, reg);
|
|
+ u64 value = U64_MAX;
|
|
|
|
- value |= (u64)aq_hw_read_reg(hw, reg + 4) << 32;
|
|
+ if (hw->aq_nic_cfg->aq_hw_caps->op64bit)
|
|
+ value = readq(hw->mmio + reg);
|
|
+ else
|
|
+ value = lo_hi_readq(hw->mmio + reg);
|
|
+
|
|
+ if (value == U64_MAX &&
|
|
+ readl(hw->mmio + hw->aq_nic_cfg->aq_hw_caps->hw_alive_check_addr) == U32_MAX)
|
|
+ aq_utils_obj_set(&hw->flags, AQ_HW_FLAG_ERR_UNPLUG);
|
|
|
|
return value;
|
|
}
|
|
|
|
+void aq_hw_write_reg64(struct aq_hw_s *hw, u32 reg, u64 value)
|
|
+{
|
|
+ if (hw->aq_nic_cfg->aq_hw_caps->op64bit)
|
|
+ writeq(value, hw->mmio + reg);
|
|
+ else
|
|
+ lo_hi_writeq(value, hw->mmio + reg);
|
|
+}
|
|
+
|
|
int aq_hw_err_from_flags(struct aq_hw_s *hw)
|
|
{
|
|
int err = 0;
|
|
diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h b/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h
|
|
index 32aa5f2fb840..ffa6e4067c21 100644
|
|
--- a/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h
|
|
+++ b/drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h
|
|
@@ -1,7 +1,8 @@
|
|
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
-/*
|
|
- * aQuantia Corporation Network Driver
|
|
- * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved
|
|
+/* Atlantic Network Driver
|
|
+ *
|
|
+ * Copyright (C) 2014-2019 aQuantia Corporation
|
|
+ * Copyright (C) 2019-2020 Marvell International Ltd.
|
|
*/
|
|
|
|
/* File aq_hw_utils.h: Declaration of helper functions used across hardware
|
|
@@ -33,6 +34,7 @@ u32 aq_hw_read_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk, u32 shift);
|
|
u32 aq_hw_read_reg(struct aq_hw_s *hw, u32 reg);
|
|
void aq_hw_write_reg(struct aq_hw_s *hw, u32 reg, u32 value);
|
|
u64 aq_hw_read_reg64(struct aq_hw_s *hw, u32 reg);
|
|
+void aq_hw_write_reg64(struct aq_hw_s *hw, u32 reg, u64 value);
|
|
int aq_hw_err_from_flags(struct aq_hw_s *hw);
|
|
int aq_hw_num_tcs(struct aq_hw_s *hw);
|
|
int aq_hw_q_per_tc(struct aq_hw_s *hw);
|
|
diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c
|
|
index a312864969af..8f8b90436ced 100644
|
|
--- a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c
|
|
+++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c
|
|
@@ -18,6 +18,7 @@
|
|
|
|
#define DEFAULT_A0_BOARD_BASIC_CAPABILITIES \
|
|
.is_64_dma = true, \
|
|
+ .op64bit = false, \
|
|
.msix_irqs = 4U, \
|
|
.irq_mask = ~0U, \
|
|
.vecs = HW_ATL_A0_RSS_MAX, \
|
|
diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c
|
|
index 732b570b40d6..59297e971ade 100644
|
|
--- a/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c
|
|
+++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c
|
|
@@ -20,6 +20,7 @@
|
|
|
|
#define DEFAULT_B0_BOARD_BASIC_CAPABILITIES \
|
|
.is_64_dma = true, \
|
|
+ .op64bit = false, \
|
|
.msix_irqs = 8U, \
|
|
.irq_mask = ~0U, \
|
|
.vecs = HW_ATL_B0_RSS_MAX, \
|
|
diff --git a/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c b/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c
|
|
index c65e6daad0e5..92f64048bf69 100644
|
|
--- a/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c
|
|
+++ b/drivers/net/ethernet/aquantia/atlantic/hw_atl2/hw_atl2.c
|
|
@@ -21,6 +21,7 @@ static int hw_atl2_act_rslvr_table_set(struct aq_hw_s *self, u8 location,
|
|
|
|
#define DEFAULT_BOARD_BASIC_CAPABILITIES \
|
|
.is_64_dma = true, \
|
|
+ .op64bit = true, \
|
|
.msix_irqs = 8U, \
|
|
.irq_mask = ~0U, \
|
|
.vecs = HW_ATL2_RSS_MAX, \
|
|
--
|
|
2.13.6
|
|
|