commit f8d8b1b1e6d3b8b93f224efc796b7ea083fdb83f Author: Florian Weimer Date: Mon Apr 8 16:48:55 2024 +0200 aarch64: Enhanced CPU diagnostics for ld.so This prints some information from struct cpu_features, and the midr_el1 and dczid_el0 system register contents on every CPU. Reviewed-by: Szabolcs Nagy Modified for RHEL by: Patsy Griffin Diagnostics for the cpu_features mops and prefer_sve_ifuncs are not currently supported on aarch64. diff -Nrup a/manual/dynlink.texi b/manual/dynlink.texi --- a/manual/dynlink.texi 2024-05-31 20:55:08.238959456 -0400 +++ b/manual/dynlink.texi 2024-05-31 20:55:41.298121623 -0400 @@ -224,6 +224,40 @@ reflect adjustment by @theglibc{}. These Linux-specific items show the values of @code{struct utsname}, as reported by the @code{uname} function. @xref{Platform Type}. +@item aarch64.cpu_features.@dots{} +These items are specific to the AArch64 architectures. They report data +@theglibc{} uses to activate conditionally supported features such as +BTI and MTE, and to select alternative function implementations. + +@item aarch64.processor[@var{index}].@dots{} +These are additional items for the AArch64 architecture and are +described below. + +@item aarch64.processor[@var{index}].requested=@var{kernel-cpu} +The kernel is told to run the subsequent probing on the CPU numbered +@var{kernel-cpu}. The values @var{kernel-cpu} and @var{index} can be +distinct if there are gaps in the process CPU affinity mask. This line +is not included if CPU affinity mask information is not available. + +@item aarch64.processor[@var{index}].observed=@var{kernel-cpu} +This line reports the kernel CPU number @var{kernel-cpu} on which the +probing code initially ran. If the CPU number cannot be obtained, +this line is not printed. + +@item aarch64.processor[@var{index}].observed_node=@var{node} +This reports the observed NUMA node number, as reported by the +@code{getcpu} system call. If this information cannot be obtained, this +line is not printed. + +@item aarch64.processor[@var{index}].midr_el1=@var{value} +The value of the @code{midr_el1} system register on the processor +@var{index}. This line is only printed if the kernel indicates that +this system register is supported. + +@item aarch64.processor[@var{index}].dczid_el0=@var{value} +The value of the @code{dczid_el0} system register on the processor +@var{index}. + @cindex CPUID (diagnostics) @item x86.cpu_features.@dots{} These items are specific to the i386 and x86-64 architectures. They diff -Nrup a/sysdeps/aarch64/dl-diagnostics-cpu.c b/sysdeps/aarch64/dl-diagnostics-cpu.c --- a/sysdeps/aarch64/dl-diagnostics-cpu.c 1969-12-31 19:00:00.000000000 -0500 +++ b/sysdeps/aarch64/dl-diagnostics-cpu.c 2024-05-31 20:57:23.536623129 -0400 @@ -0,0 +1,81 @@ +/* Print CPU diagnostics data in ld.so. AArch64 version. + Copyright (C) 2021-2024 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include + +#include +#include +#include +#include + +static void +print_cpu_features_value (const char *label, uint64_t value) +{ + _dl_printf ("aarch64.cpu_features."); + _dl_diagnostics_print_labeled_value (label, value); +} + +static void +print_per_cpu_value (const struct dl_iterate_cpu *dic, + const char *label, uint64_t value) +{ + _dl_printf ("aarch64.processor[0x%x].", dic->processor_index); + _dl_diagnostics_print_labeled_value (label, value); +} + +void +_dl_diagnostics_cpu (void) +{ + print_cpu_features_value ("bti", GLRO (dl_aarch64_cpu_features).bti); + print_cpu_features_value ("midr_el1", + GLRO (dl_aarch64_cpu_features).midr_el1); + print_cpu_features_value ("mte_state", + GLRO (dl_aarch64_cpu_features).mte_state); + print_cpu_features_value ("sve", GLRO (dl_aarch64_cpu_features).sve); + print_cpu_features_value ("zva_size", + GLRO (dl_aarch64_cpu_features).zva_size); + + struct dl_iterate_cpu dic; + _dl_iterate_cpu_init (&dic); + + while (_dl_iterate_cpu_next (&dic)) + { + if (dic.requested_cpu >= 0) + _dl_printf ("aarch64.processor[0x%x].requested=0x%x\n", + dic.processor_index, dic.requested_cpu); + if (dic.actual_cpu >= 0) + _dl_printf ("aarch64.processor[0x%x].observed=0x%x\n", + dic.processor_index, dic.actual_cpu); + if (dic.actual_node >= 0) + _dl_printf ("aarch64.processor[0x%x].observed_node=0x%x\n", + dic.processor_index, dic.actual_node); + + if (GLRO (dl_hwcap) & HWCAP_CPUID) + { + uint64_t midr_el1; + asm ("mrs %0, midr_el1" : "=r" (midr_el1)); + print_per_cpu_value (&dic, "midr_el1", midr_el1); + } + + { + uint64_t dczid_el0; + asm ("mrs %0, dczid_el0" : "=r" (dczid_el0)); + print_per_cpu_value (&dic, "dczid_el0", dczid_el0); + } + } +}