diff --git a/SOURCES/d739260c57576c636759afb312340fa3827312f6.patch b/SOURCES/d739260c57576c636759afb312340fa3827312f6.patch
new file mode 100644
index 0000000..7847bb5
--- /dev/null
+++ b/SOURCES/d739260c57576c636759afb312340fa3827312f6.patch
@@ -0,0 +1,74 @@
+From d739260c57576c636759afb312340fa3827312f6 Mon Sep 17 00:00:00 2001
+From: Adrian Reber <areber@redhat.com>
+Date: Mon, 24 Apr 2023 09:28:19 +0200
+Subject: [PATCH] compel: support XSAVE on newer Intel CPUs
+
+Newer Intel CPUs (Sapphire Rapids) have a much larger xsave area than
+before. Looking at older CPUs I see 2440 bytes.
+
+    # cpuid -1 -l 0xd -s 0
+    ...
+        bytes required by XSAVE/XRSTOR area     = 0x00000988 (2440)
+
+On newer CPUs (Sapphire Rapids) it grows to 11008 bytes.
+
+    # cpuid -1 -l 0xd -s 0
+    ...
+        bytes required by XSAVE/XRSTOR area     = 0x00002b00 (11008)
+
+This increase the xsave area from one page to four pages.
+
+Without this patch the fpu03 test fails, with this patch it works again.
+
+Signed-off-by: Adrian Reber <areber@redhat.com>
+---
+ .../arch/x86/src/lib/include/uapi/asm/fpu.h   | 28 +++++++++++++++++--
+ 1 file changed, 26 insertions(+), 2 deletions(-)
+
+diff --git a/compel/arch/x86/src/lib/include/uapi/asm/fpu.h b/compel/arch/x86/src/lib/include/uapi/asm/fpu.h
+index bd3b0cbd5c..8c83dd9ae4 100644
+--- a/compel/arch/x86/src/lib/include/uapi/asm/fpu.h
++++ b/compel/arch/x86/src/lib/include/uapi/asm/fpu.h
+@@ -21,7 +21,28 @@
+ #define XSTATE_YMM 0x4
+ 
+ #define FXSAVE_SIZE 512
+-#define XSAVE_SIZE  4096
++/*
++ * This used to be 4096 (one page). There is a comment below concerning
++ * this size:
++ *  "One page should be enough for the whole xsave state ;-)"
++ * Which is kind of funny as it is no longer enough ;-)
++ *
++ * Older CPUs:
++ * # cpuid -1 -l 0xd -s 0
++ * ...
++ *     bytes required by XSAVE/XRSTOR area     = 0x00000988 (2440)
++ *
++ * Newer CPUs (Sapphire Rapids):
++ * # cpuid -1 -l 0xd -s 0
++ * ...
++ *     bytes required by XSAVE/XRSTOR area     = 0x00002b00 (11008)
++ *
++ * So one page is no longer enough... But:
++ *
++ * Four pages should be enough for the whole xsave state ;-)
++ */
++
++#define XSAVE_SIZE  4*4096
+ 
+ #define XSAVE_HDR_SIZE	 64
+ #define XSAVE_HDR_OFFSET FXSAVE_SIZE
+@@ -235,8 +256,11 @@ struct pkru_state {
+  *
+  *
+  * One page should be enough for the whole xsave state ;-)
++ *
++ * Of course it was not ;-) Now using four pages...
++ *
+  */
+-#define EXTENDED_STATE_AREA_SIZE (4096 - sizeof(struct i387_fxsave_struct) - sizeof(struct xsave_hdr_struct))
++#define EXTENDED_STATE_AREA_SIZE (XSAVE_SIZE - sizeof(struct i387_fxsave_struct) - sizeof(struct xsave_hdr_struct))
+ 
+ /*
+  * cpu requires it to be 64 byte aligned
diff --git a/SPECS/criu.spec b/SPECS/criu.spec
index 9682773..13b9e2f 100644
--- a/SPECS/criu.spec
+++ b/SPECS/criu.spec
@@ -7,7 +7,7 @@
 
 Name: criu
 Version: 3.17
-Release: 4%{?dist}
+Release: 5%{?dist}
 Provides: crtools = %{version}-%{release}
 Obsoletes: crtools <= 1.0-2
 Summary: Tool for Checkpoint/Restore in User-space
@@ -29,6 +29,8 @@ Recommends: tar
 
 Patch0: 0001-Fix-building-with-annobin.patch
 Patch1: criu.pc.patch
+# Fix to work on CPUs with larger XSAVE area (Sapphire Rapids)
+Patch2: https://github.com/checkpoint-restore/criu/commit/d739260c57576c636759afb312340fa3827312f6.patch
 
 # user-space and kernel changes are only available for x86_64, arm,
 # ppc64le, aarch64 and s390x
@@ -76,6 +78,7 @@ their content in human-readable form.
 %setup -q
 %patch0 -p1
 %patch1 -p1
+%patch2 -p1
 
 %build
 # %{?_smp_mflags} does not work
@@ -126,6 +129,9 @@ rm $RPM_BUILD_ROOT%{_mandir}/man1/criu-ns.1*
 %doc %{_mandir}/man1/crit.1*
 
 %changelog
+* Thu May 11 2023 Adrian Reber <areber@redhat.com> - 3.17-5
+- Apply patch to work with Sapphire Rapids CPU
+
 * Wed Mar 15 2023 MSVSphere Packaging Team <packager@msvsphere.ru> - 3.17-4
 - Rebuilt for MSVSphere 9.1.