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497 lines
19 KiB
497 lines
19 KiB
2015-12-24 Kirill Yukhin <kirill.yukhin@intel.com>
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* common/config/i386/i386-common.c (OPTION_MASK_ISA_PKU_SET): New.
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(OPTION_MASK_ISA_PKU_UNSET): Ditto.
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(ix86_handle_option): Handle OPT_mpku.
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* config.gcc: Add pkuintrin.h to i[34567]86-*-* and x86_64-*-*
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targets.
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* config/i386/cpuid.h (host_detect_local_cpu): Detect PKU feature.
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* config/i386/i386-c.c (ix86_target_macros_internal): Handle PKU ISA
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flag.
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* config/i386/i386.c (ix86_target_string): Add "-mpku" to
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ix86_target_opts.
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(ix86_option_override_internal): Define PTA_PKU, mention new key
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in skylake-avx512. Handle new ISA bits.
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(ix86_valid_target_attribute_inner_p): Add "pku".
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(enum ix86_builtins): Add IX86_BUILTIN_RDPKRU and IX86_BUILTIN_WRPKRU.
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(builtin_description bdesc_special_args[]): Add new built-ins.
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* config/i386/i386.h (define TARGET_PKU): New.
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(define TARGET_PKU_P): Ditto.
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* config/i386/i386.md (define_c_enum "unspecv"): Add UNSPEC_PKU.
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(define_expand "rdpkru"): New.
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(define_insn "*rdpkru"): Ditto.
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(define_expand "wrpkru"): Ditto.
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(define_insn "*wrpkru"): Ditto.
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* config/i386/i386.opt (mpku): Ditto.
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* config/i386/pkuintrin.h: New file.
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* config/i386/x86intrin.h: Include pkuintrin.h
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* doc/extend.texi: Describe new built-ins.
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* doc/invoke.texi: Describe new switches.
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* g++.dg/other/i386-2.C: Add -mpku.
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* g++.dg/other/i386-3.C: Ditto.
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* gcc.target/i386/rdpku-1.c: New test.
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* gcc.target/i386/sse-12.c: Add -mpku.
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* gcc.target/i386/sse-13.c: Ditto.
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* gcc.target/i386/sse-22.c: Ditto.
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* gcc.target/i386/sse-33.c: Ditto.
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* gcc.target/i386/wrpku-1.c: New test.
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--- gcc/config.gcc (revision 231943)
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+++ gcc/config.gcc (revision 231945)
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@@ -368,7 +368,7 @@ i[34567]86-*-*)
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lzcntintrin.h bmiintrin.h bmi2intrin.h tbmintrin.h
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avx2intrin.h fmaintrin.h f16cintrin.h rtmintrin.h
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xtestintrin.h rdseedintrin.h prfchwintrin.h adxintrin.h
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- fxsrintrin.h xsaveintrin.h xsaveoptintrin.h"
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+ fxsrintrin.h xsaveintrin.h xsaveoptintrin.h pkuintrin.h"
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;;
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x86_64-*-*)
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cpu_type=i386
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@@ -383,7 +383,7 @@ x86_64-*-*)
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lzcntintrin.h bmiintrin.h tbmintrin.h bmi2intrin.h
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avx2intrin.h fmaintrin.h f16cintrin.h rtmintrin.h
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xtestintrin.h rdseedintrin.h prfchwintrin.h adxintrin.h
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- fxsrintrin.h xsaveintrin.h xsaveoptintrin.h"
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+ fxsrintrin.h xsaveintrin.h xsaveoptintrin.h pkuintrin.h"
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need_64bit_hwint=yes
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;;
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ia64-*-*)
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--- gcc/common/config/i386/i386-common.c (revision 231943)
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+++ gcc/common/config/i386/i386-common.c (revision 231945)
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@@ -98,6 +98,7 @@ along with GCC; see the file COPYING3.
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#define OPTION_MASK_ISA_RDRND_SET OPTION_MASK_ISA_RDRND
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#define OPTION_MASK_ISA_F16C_SET \
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(OPTION_MASK_ISA_F16C | OPTION_MASK_ISA_AVX_SET)
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+#define OPTION_MASK_ISA_PKU_SET OPTION_MASK_ISA_PKU
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/* Define a set of ISAs which aren't available when a given ISA is
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disabled. MMX and SSE ISAs are handled separately. */
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@@ -164,6 +165,7 @@ along with GCC; see the file COPYING3.
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#define OPTION_MASK_ISA_FSGSBASE_UNSET OPTION_MASK_ISA_FSGSBASE
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#define OPTION_MASK_ISA_RDRND_UNSET OPTION_MASK_ISA_RDRND
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#define OPTION_MASK_ISA_F16C_UNSET OPTION_MASK_ISA_F16C
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+#define OPTION_MASK_ISA_PKU_UNSET OPTION_MASK_ISA_PKU
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/* Implement TARGET_HANDLE_OPTION. */
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@@ -659,6 +661,19 @@ ix86_handle_option (struct gcc_options *
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}
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return true;
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+ case OPT_mpku:
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+ if (value)
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+ {
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+ opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PKU_SET;
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+ opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PKU_SET;
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+ }
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+ else
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+ {
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+ opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_PKU_UNSET;
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+ opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PKU_UNSET;
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+ }
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+ return true;
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+
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/* Comes from final.c -- no real reason to change it. */
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#define MAX_CODE_ALIGN 16
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--- gcc/config/i386/i386.h (revision 231943)
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+++ gcc/config/i386/i386.h (revision 231945)
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@@ -80,6 +80,7 @@ see the files COPYING3 and COPYING.RUNTI
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#define TARGET_FXSR TARGET_ISA_FXSR
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#define TARGET_XSAVE TARGET_ISA_XSAVE
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#define TARGET_XSAVEOPT TARGET_ISA_XSAVEOPT
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+#define TARGET_PKU TARGET_ISA_PKU
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#define TARGET_LP64 TARGET_ABI_64
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#define TARGET_X32 TARGET_ABI_X32
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--- gcc/config/i386/i386.md (revision 231943)
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+++ gcc/config/i386/i386.md (revision 231945)
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@@ -224,6 +224,9 @@ (define_c_enum "unspecv" [
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UNSPECV_XTEST
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UNSPECV_NLGR
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+
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+ ;; For RDPKRU and WRPKRU support
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+ UNSPECV_PKU
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])
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;; Constants to represent rounding modes in the ROUND instruction
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@@ -18289,6 +18292,48 @@ (define_insn "xtest_1"
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[(set_attr "type" "other")
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(set_attr "length" "3")])
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+;; RDPKRU and WRPKRU
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+
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+(define_expand "rdpkru"
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+ [(parallel
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+ [(set (match_operand:SI 0 "register_operand")
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+ (unspec_volatile:SI [(match_dup 1)] UNSPECV_PKU))
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+ (set (match_dup 2) (const_int 0))])]
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+ "TARGET_PKU"
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+{
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+ operands[1] = force_reg (SImode, const0_rtx);
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+ operands[2] = gen_reg_rtx (SImode);
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+})
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+
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+(define_insn "*rdpkru"
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+ [(set (match_operand:SI 0 "register_operand" "=a")
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+ (unspec_volatile:SI [(match_operand:SI 2 "register_operand" "c")]
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+ UNSPECV_PKU))
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+ (set (match_operand:SI 1 "register_operand" "=d")
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+ (const_int 0))]
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+ "TARGET_PKU"
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+ "rdpkru"
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+ [(set_attr "type" "other")])
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+
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+(define_expand "wrpkru"
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+ [(unspec_volatile:SI
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+ [(match_operand:SI 0 "register_operand")
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+ (match_dup 1) (match_dup 2)] UNSPECV_PKU)]
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+ "TARGET_PKU"
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+{
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+ operands[1] = force_reg (SImode, const0_rtx);
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+ operands[2] = force_reg (SImode, const0_rtx);
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+})
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+
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+(define_insn "*wrpkru"
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+ [(unspec_volatile:SI
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+ [(match_operand:SI 0 "register_operand" "a")
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+ (match_operand:SI 1 "register_operand" "d")
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+ (match_operand:SI 2 "register_operand" "c")] UNSPECV_PKU)]
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+ "TARGET_PKU"
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+ "wrpkru"
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+ [(set_attr "type" "other")])
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+
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(include "mmx.md")
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(include "sse.md")
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(include "sync.md")
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--- gcc/config/i386/pkuintrin.h (revision 0)
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+++ gcc/config/i386/pkuintrin.h (revision 231945)
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@@ -0,0 +1,45 @@
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+/* Copyright (C) 2015 Free Software Foundation, Inc.
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+
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+ This file is part of GCC.
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+
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+ GCC is free software; you can redistribute it and/or modify
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+ it under the terms of the GNU General Public License as published by
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+ the Free Software Foundation; either version 3, or (at your option)
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+ any later version.
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+
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+ GCC is distributed in the hope that it will be useful,
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ GNU General Public License for more details.
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+
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+ Under Section 7 of GPL version 3, you are granted additional
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+ permissions described in the GCC Runtime Library Exception, version
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+ 3.1, as published by the Free Software Foundation.
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+
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+ You should have received a copy of the GNU General Public License and
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+ a copy of the GCC Runtime Library Exception along with this program;
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+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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+ <http://www.gnu.org/licenses/>. */
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+
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+#if !defined _X86INTRIN_H_INCLUDED
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+# error "Never use <pkuintrin.h> directly; include <x86intrin.h> instead."
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+#endif
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+
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+#ifndef _PKUINTRIN_H_INCLUDED
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+#define _PKUINTRIN_H_INCLUDED
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+
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+extern __inline unsigned int
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+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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+_rdpkru_u32(void)
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+{
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+ return __builtin_ia32_rdpkru ();
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+}
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+
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+extern __inline void
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+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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+_wrpkru(unsigned int key)
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+{
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+ return __builtin_ia32_wrpkru (key);
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+}
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+
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+#endif /* _PKUINTRIN_H_INCLUDED */
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--- gcc/config/i386/cpuid.h (revision 231943)
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+++ gcc/config/i386/cpuid.h (revision 231945)
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@@ -74,6 +74,10 @@
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#define bit_RDSEED (1 << 18)
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#define bit_ADX (1 << 19)
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+/* %ecx */
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+#define bit_PKU (1 << 3)
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+#define bit_OSPKE (1 << 4)
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+
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/* Extended State Enumeration Sub-leaf (%eax == 13, %ecx == 1) */
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#define bit_XSAVEOPT (1 << 0)
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--- gcc/config/i386/x86intrin.h (revision 231943)
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+++ gcc/config/i386/x86intrin.h (revision 231945)
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@@ -119,4 +119,8 @@
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#include <adxintrin.h>
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+#ifdef __PKU__
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+#include <pkuintrin.h>
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+#endif
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+
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#endif /* _X86INTRIN_H_INCLUDED */
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--- gcc/config/i386/i386-c.c (revision 231943)
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+++ gcc/config/i386/i386-c.c (revision 231945)
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@@ -348,6 +348,8 @@ ix86_target_macros_internal (HOST_WIDE_I
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def_or_undef (parse_in, "__XSAVE__");
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if (isa_flag & OPTION_MASK_ISA_XSAVEOPT)
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def_or_undef (parse_in, "__XSAVEOPT__");
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+ if (isa_flag & OPTION_MASK_ISA_PKU)
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+ def_or_undef (parse_in, "__PKU__");
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if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE))
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def_or_undef (parse_in, "__SSE_MATH__");
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if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE2))
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--- gcc/config/i386/i386.opt (revision 231943)
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+++ gcc/config/i386/i386.opt (revision 231945)
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@@ -626,3 +626,7 @@ Split 32-byte AVX unaligned store
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mrtm
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Target Report Mask(ISA_RTM) Var(ix86_isa_flags) Save
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Support RTM built-in functions and code generation
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+
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+mpku
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+Target Report Mask(ISA_PKU) Var(ix86_isa_flags) Save
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+Support PKU built-in functions and code generation
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--- gcc/config/i386/driver-i386.c (revision 231943)
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+++ gcc/config/i386/driver-i386.c (revision 231945)
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@@ -408,6 +408,7 @@ const char *host_detect_local_cpu (int a
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unsigned int has_rdrnd = 0, has_f16c = 0, has_fsgsbase = 0;
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unsigned int has_rdseed = 0, has_prfchw = 0, has_adx = 0;
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unsigned int has_osxsave = 0, has_fxsr = 0, has_xsave = 0, has_xsaveopt = 0;
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+ unsigned int has_pku = 0;
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bool arch;
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@@ -479,6 +480,8 @@ const char *host_detect_local_cpu (int a
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has_fsgsbase = ebx & bit_FSGSBASE;
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has_rdseed = ebx & bit_RDSEED;
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has_adx = ebx & bit_ADX;
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+
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+ has_pku = ecx & bit_OSPKE;
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}
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if (max_level >= 13)
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@@ -855,12 +858,13 @@ const char *host_detect_local_cpu (int a
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const char *fxsr = has_fxsr ? " -mfxsr" : " -mno-fxsr";
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const char *xsave = has_xsave ? " -mxsave" : " -mno-xsave";
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const char *xsaveopt = has_xsaveopt ? " -mxsaveopt" : " -mno-xsaveopt";
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+ const char *pku = has_pku ? " -mpku" : " -mno-pku";
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options = concat (options, cx16, sahf, movbe, ase, pclmul,
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popcnt, abm, lwp, fma, fma4, xop, bmi, bmi2,
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tbm, avx, avx2, sse4_2, sse4_1, lzcnt, rtm,
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hle, rdrnd, f16c, fsgsbase, rdseed, prfchw, adx,
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- fxsr, xsave, xsaveopt, NULL);
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+ fxsr, xsave, xsaveopt, pku, NULL);
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}
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done:
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--- gcc/config/i386/i386.c (revision 231943)
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+++ gcc/config/i386/i386.c (revision 231945)
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@@ -2632,6 +2632,7 @@ ix86_target_string (HOST_WIDE_INT isa, i
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{ "-mrtm", OPTION_MASK_ISA_RTM },
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{ "-mxsave", OPTION_MASK_ISA_XSAVE },
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{ "-mxsaveopt", OPTION_MASK_ISA_XSAVEOPT },
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+ { "-mpku", OPTION_MASK_ISA_PKU },
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};
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/* Flag options. */
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@@ -2905,6 +2906,7 @@ ix86_option_override_internal (bool main
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#define PTA_FXSR (HOST_WIDE_INT_1 << 37)
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#define PTA_XSAVE (HOST_WIDE_INT_1 << 38)
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#define PTA_XSAVEOPT (HOST_WIDE_INT_1 << 39)
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+#define PTA_PKU (HOST_WIDE_INT_1 << 60)
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/* if this reaches 64, need to widen struct pta flags below */
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@@ -3429,6 +3431,9 @@ ix86_option_override_internal (bool main
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if (processor_alias_table[i].flags & PTA_XSAVEOPT
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&& !(ix86_isa_flags_explicit & OPTION_MASK_ISA_XSAVEOPT))
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ix86_isa_flags |= OPTION_MASK_ISA_XSAVEOPT;
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+ if (processor_alias_table[i].flags & PTA_PKU
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+ && !(ix86_isa_flags_explicit & OPTION_MASK_ISA_PKU))
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+ ix86_isa_flags |= OPTION_MASK_ISA_PKU;
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if (processor_alias_table[i].flags & (PTA_PREFETCH_SSE | PTA_SSE))
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x86_prefetch_sse = true;
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@@ -4220,6 +4225,7 @@ ix86_valid_target_attribute_inner_p (tre
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IX86_ATTR_ISA ("fxsr", OPT_mfxsr),
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IX86_ATTR_ISA ("xsave", OPT_mxsave),
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IX86_ATTR_ISA ("xsaveopt", OPT_mxsaveopt),
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+ IX86_ATTR_ISA ("pku", OPT_mpku),
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/* enum options */
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IX86_ATTR_ENUM ("fpmath=", OPT_mfpmath_),
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@@ -27042,6 +27048,10 @@ enum ix86_builtins
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IX86_BUILTIN_CPU_IS,
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IX86_BUILTIN_CPU_SUPPORTS,
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+ /* PKU instructions. */
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+ IX86_BUILTIN_RDPKRU,
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+ IX86_BUILTIN_WRPKRU,
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+
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IX86_BUILTIN_MAX
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};
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@@ -27357,6 +27367,10 @@ static const struct builtin_description
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{ OPTION_MASK_ISA_RTM, CODE_FOR_xbegin, "__builtin_ia32_xbegin", IX86_BUILTIN_XBEGIN, UNKNOWN, (int) UNSIGNED_FTYPE_VOID },
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{ OPTION_MASK_ISA_RTM, CODE_FOR_xend, "__builtin_ia32_xend", IX86_BUILTIN_XEND, UNKNOWN, (int) VOID_FTYPE_VOID },
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{ OPTION_MASK_ISA_RTM, CODE_FOR_xtest, "__builtin_ia32_xtest", IX86_BUILTIN_XTEST, UNKNOWN, (int) INT_FTYPE_VOID },
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+
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+ /* RDPKRU and WRPKRU. */
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+ { OPTION_MASK_ISA_PKU, CODE_FOR_rdpkru, "__builtin_ia32_rdpkru", IX86_BUILTIN_RDPKRU, UNKNOWN, (int) UNSIGNED_FTYPE_VOID },
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+ { OPTION_MASK_ISA_PKU, CODE_FOR_wrpkru, "__builtin_ia32_wrpkru", IX86_BUILTIN_WRPKRU, UNKNOWN, (int) VOID_FTYPE_UNSIGNED },
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};
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/* Builtins with variable number of arguments. */
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--- gcc/doc/extend.texi (revision 231943)
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+++ gcc/doc/extend.texi (revision 231945)
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@@ -10996,6 +10996,13 @@ void __builtin_ia32_xabort (status)
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int __builtin_ia32_xtest ()
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@end smallexample
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+The following built-in functions are available when @option{-mpku} is used.
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+They generate reads and writes to PKRU.
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+@smallexample
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+void __builtin_ia32_wrpkru (unsigned int)
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+unsigned int __builtin_ia32_rdpkru ()
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+@end smallexample
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+
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@node X86 transactional memory intrinsics
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@subsection X86 transaction memory intrinsics
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--- gcc/doc/invoke.texi (revision 231943)
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+++ gcc/doc/invoke.texi (revision 231945)
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@@ -645,7 +645,7 @@ Objective-C and Objective-C++ Dialects}.
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-mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol
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-mavx2 -maes -mpclmul -mfsgsbase -mrdrnd -mf16c -mfma @gol
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-msse4a -m3dnow -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop -mlzcnt @gol
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--mbmi2 -mrtm -mlwp -mthreads @gol
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+-mbmi2 -mrtm -mlwp -mpku -mthreads @gol
|
|
-mno-align-stringops -minline-all-stringops @gol
|
|
-minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol
|
|
-mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol
|
|
@@ -14326,6 +14326,8 @@ preferred alignment to @option{-mpreferr
|
|
@itemx -mlzcnt
|
|
@itemx -mno-lzcnt
|
|
@itemx -mrtm
|
|
+@itemx -mpku
|
|
+@itemx -mno-pku
|
|
@itemx -mtbm
|
|
@itemx -mno-tbm
|
|
@opindex mmmx
|
|
@@ -14336,7 +14338,7 @@ preferred alignment to @option{-mpreferr
|
|
@opindex mno-3dnow
|
|
These switches enable or disable the use of instructions in the MMX, SSE,
|
|
SSE2, SSE3, SSSE3, SSE4.1, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, F16C,
|
|
-FMA, SSE4A, FMA4, XOP, LWP, ABM, BMI, BMI2, LZCNT, RTM or 3DNow!@:
|
|
+FMA, SSE4A, FMA4, XOP, LWP, ABM, BMI, BMI2, LZCNT, RTM, PKU or 3DNow!@:
|
|
extended instruction sets.
|
|
These extensions are also available as built-in functions: see
|
|
@ref{X86 Built-in Functions}, for details of the functions enabled and
|
|
--- gcc/testsuite/gcc.target/i386/sse-12.c (revision 231943)
|
|
+++ gcc/testsuite/gcc.target/i386/sse-12.c (revision 231945)
|
|
@@ -3,7 +3,7 @@
|
|
popcntintrin.h and mm_malloc.h are usable
|
|
with -O -std=c89 -pedantic-errors. */
|
|
/* { dg-do compile } */
|
|
-/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt" } */
|
|
+/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mpku" } */
|
|
|
|
#include <x86intrin.h>
|
|
|
|
--- gcc/testsuite/gcc.target/i386/sse-13.c (revision 231943)
|
|
+++ gcc/testsuite/gcc.target/i386/sse-13.c (revision 231945)
|
|
@@ -1,5 +1,5 @@
|
|
/* { dg-do compile } */
|
|
-/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt" } */
|
|
+/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mpku" } */
|
|
|
|
#include <mm_malloc.h>
|
|
|
|
--- gcc/testsuite/gcc.target/i386/sse-22.c (revision 231943)
|
|
+++ gcc/testsuite/gcc.target/i386/sse-22.c (revision 231945)
|
|
@@ -268,7 +268,7 @@ test_2 (_mm_clmulepi64_si128, __m128i, _
|
|
|
|
/* x86intrin.h (FMA4/XOP/LWP/BMI/BMI2/TBM/LZCNT/FMA). */
|
|
#ifdef DIFFERENT_PRAGMAS
|
|
-#pragma GCC target ("fma4,xop,lwp,bmi,bmi2,tbm,lzcnt,fma,rdseed,prfchw,adx,fxsr,xsaveopt")
|
|
+#pragma GCC target ("fma4,xop,lwp,bmi,bmi2,tbm,lzcnt,fma,rdseed,prfchw,adx,fxsr,xsaveopt,pku")
|
|
#endif
|
|
#include <x86intrin.h>
|
|
/* xopintrin.h */
|
|
--- gcc/testsuite/gcc.target/i386/sse-23.c (revision 231943)
|
|
+++ gcc/testsuite/gcc.target/i386/sse-23.c (revision 231945)
|
|
@@ -183,7 +183,7 @@
|
|
/* rtmintrin.h */
|
|
#define __builtin_ia32_xabort(M) __builtin_ia32_xabort(1)
|
|
|
|
-#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt")
|
|
+#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,pku")
|
|
#include <wmmintrin.h>
|
|
#include <smmintrin.h>
|
|
#include <mm3dnow.h>
|
|
--- gcc/testsuite/gcc.target/i386/rdpku-1.c (revision 0)
|
|
+++ gcc/testsuite/gcc.target/i386/rdpku-1.c (revision 231945)
|
|
@@ -0,0 +1,11 @@
|
|
+/* { dg-do compile } */
|
|
+/* { dg-options "-mpku -O2" } */
|
|
+/* { dg-final { scan-assembler "rdpkru\n" } } */
|
|
+
|
|
+#include <x86intrin.h>
|
|
+
|
|
+unsigned extern
|
|
+rdpku_test (void)
|
|
+{
|
|
+ return _rdpkru_u32 ();
|
|
+}
|
|
--- gcc/testsuite/gcc.target/i386/wrpku-1.c (revision 0)
|
|
+++ gcc/testsuite/gcc.target/i386/wrpku-1.c (revision 231945)
|
|
@@ -0,0 +1,11 @@
|
|
+/* { dg-do compile } */
|
|
+/* { dg-options "-mpku -O2" } */
|
|
+/* { dg-final { scan-assembler "wrpkru\n" } } */
|
|
+
|
|
+#include <x86intrin.h>
|
|
+
|
|
+void extern
|
|
+wrpku_test (unsigned int key)
|
|
+{
|
|
+ _wrpkru (key);
|
|
+}
|
|
--- gcc/testsuite/g++.dg/other/i386-2.C (revision 231943)
|
|
+++ gcc/testsuite/g++.dg/other/i386-2.C (revision 231945)
|
|
@@ -1,9 +1,9 @@
|
|
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
|
|
-/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt" } */
|
|
+/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mpku" } */
|
|
|
|
/* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h,
|
|
xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h,
|
|
- popcntintrin.h, fmaintrin.h and mm_malloc.h.h are usable with
|
|
+ popcntintrin.h, fmaintrin.h, pkuintrin.h and mm_malloc.h.h are usable with
|
|
-O -pedantic-errors. */
|
|
|
|
#include <x86intrin.h>
|
|
--- gcc/testsuite/g++.dg/other/i386-3.C (revision 231943)
|
|
+++ gcc/testsuite/g++.dg/other/i386-3.C (revision 231945)
|
|
@@ -1,9 +1,9 @@
|
|
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
|
|
-/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt" } */
|
|
+/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mpku" } */
|
|
|
|
/* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h,
|
|
xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h,
|
|
- popcntintrin.h, fmaintrin.h and mm_malloc.h are usable with
|
|
+ popcntintrin.h, fmaintrin.h, pkuintrin.h and mm_malloc.h are usable with
|
|
-O -fkeep-inline-functions. */
|
|
|
|
#include <x86intrin.h>
|