Compare commits
No commits in common. 'cs10' and 'c9' have entirely different histories.
@ -1 +1,2 @@
|
||||
0e008260a958bbd10182ee3384672ae0a310eece SOURCES/binutils-2.41.tar.xz
|
||||
2dd8d1ce34dc7b1cb2073123e30c4901221835b0 SOURCES/binutils-2.35.2.tar.xz
|
||||
d57616dc8475c78a107762aa8fcee9336ab6e40f SOURCES/binutils.unicode.patch
|
||||
|
||||
@ -1 +1,2 @@
|
||||
SOURCES/binutils-2.41.tar.xz
|
||||
SOURCES/binutils-2.35.2.tar.xz
|
||||
SOURCES/binutils.unicode.patch
|
||||
|
||||
@ -1,22 +0,0 @@
|
||||
--- binutils.orig/ld/ldlang.c 2024-07-30 16:10:24.931862075 +0100
|
||||
+++ binutils-2.41/ld/ldlang.c 2024-07-30 19:11:58.741929934 +0100
|
||||
@@ -7940,6 +7940,19 @@ lang_list_remove_tail (lang_statement_li
|
||||
{
|
||||
union lang_statement_union **savetail;
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||||
/* Check that ORIGLIST really is an earlier state of DESTLIST. */
|
||||
+
|
||||
+ if (getenv ("LD_DEBUG_NEVER") != NULL)
|
||||
+ {
|
||||
+ /* FIXME: RHEL-49348: For some reason building this function for the
|
||||
+ PowerPC architecture on RHEL-10 is resulting in a linker that
|
||||
+ triggers the ASSERT below - because the origlist pointer is
|
||||
+ corrupt. These fprintf statements, even if they will never be
|
||||
+ used, are enough to cause the compiler to build the function
|
||||
+ correctly, thus avoiding the problem. */
|
||||
+ fprintf (stderr, "origlist %p destlist %p\n", origlist, destlist);
|
||||
+ fprintf (stderr, "heads: %p %p\n", origlist->head, destlist->head);
|
||||
+ }
|
||||
+
|
||||
ASSERT (origlist->head == destlist->head);
|
||||
savetail = origlist->tail;
|
||||
origlist->head = *(savetail);
|
||||
@ -0,0 +1,145 @@
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||||
--- binutils.orig/binutils/readelf.c 2020-07-24 14:55:25.163647522 +0100
|
||||
+++ binutils-2.35/binutils/readelf.c 2020-07-24 15:02:39.613851369 +0100
|
||||
@@ -20729,79 +20729,92 @@ process_file (char * file_name)
|
||||
Filedata * filedata = NULL;
|
||||
struct stat statbuf;
|
||||
char armag[SARMAG];
|
||||
- bfd_boolean ret = TRUE;
|
||||
+ bfd_boolean ret = FALSE;
|
||||
+ char * name;
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||||
+ char * saved_program_name;
|
||||
+
|
||||
+ /* Overload program_name to include file_name. Doing this means
|
||||
+ that warning/error messages will positively identify the file
|
||||
+ concerned even when multiple instances of readelf are running. */
|
||||
+ name = xmalloc (strlen (program_name) + strlen (file_name) + 3);
|
||||
+ sprintf (name, "%s: %s", program_name, file_name);
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||||
+ saved_program_name = program_name;
|
||||
+ program_name = name;
|
||||
|
||||
if (stat (file_name, &statbuf) < 0)
|
||||
{
|
||||
if (errno == ENOENT)
|
||||
- error (_("'%s': No such file\n"), file_name);
|
||||
+ error (_("No such file\n"));
|
||||
else
|
||||
- error (_("Could not locate '%s'. System error message: %s\n"),
|
||||
- file_name, strerror (errno));
|
||||
- return FALSE;
|
||||
+ error (_("Could not locate file. System error message: %s\n"),
|
||||
+ strerror (errno));
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||||
+ goto done;
|
||||
}
|
||||
|
||||
if (! S_ISREG (statbuf.st_mode))
|
||||
{
|
||||
- error (_("'%s' is not an ordinary file\n"), file_name);
|
||||
- return FALSE;
|
||||
+ error (_("Not an ordinary file\n"));
|
||||
+ goto done;
|
||||
}
|
||||
|
||||
filedata = calloc (1, sizeof * filedata);
|
||||
if (filedata == NULL)
|
||||
{
|
||||
error (_("Out of memory allocating file data structure\n"));
|
||||
- return FALSE;
|
||||
+ goto done;
|
||||
}
|
||||
|
||||
filedata->file_name = file_name;
|
||||
filedata->handle = fopen (file_name, "rb");
|
||||
if (filedata->handle == NULL)
|
||||
{
|
||||
- error (_("Input file '%s' is not readable.\n"), file_name);
|
||||
- free (filedata);
|
||||
- return FALSE;
|
||||
+ error (_("Not readable\n"));
|
||||
+ goto done;
|
||||
}
|
||||
|
||||
if (fread (armag, SARMAG, 1, filedata->handle) != 1)
|
||||
{
|
||||
- error (_("%s: Failed to read file's magic number\n"), file_name);
|
||||
+ error (_("Failed to read file's magic number\n"));
|
||||
fclose (filedata->handle);
|
||||
- free (filedata);
|
||||
- return FALSE;
|
||||
+ goto done;
|
||||
}
|
||||
|
||||
filedata->file_size = (bfd_size_type) statbuf.st_size;
|
||||
|
||||
if (memcmp (armag, ARMAG, SARMAG) == 0)
|
||||
{
|
||||
- if (! process_archive (filedata, FALSE))
|
||||
- ret = FALSE;
|
||||
+ if (process_archive (filedata, FALSE))
|
||||
+ ret = TRUE;
|
||||
}
|
||||
else if (memcmp (armag, ARMAGT, SARMAG) == 0)
|
||||
{
|
||||
- if ( ! process_archive (filedata, TRUE))
|
||||
- ret = FALSE;
|
||||
+ if (process_archive (filedata, TRUE))
|
||||
+ ret = TRUE;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (do_archive_index && !check_all)
|
||||
- error (_("File %s is not an archive so its index cannot be displayed.\n"),
|
||||
- file_name);
|
||||
+ error (_("Not an archive so its index cannot be displayed.\n"));
|
||||
|
||||
rewind (filedata->handle);
|
||||
filedata->archive_file_size = filedata->archive_file_offset = 0;
|
||||
|
||||
- if (! process_object (filedata))
|
||||
- ret = FALSE;
|
||||
+ if (process_object (filedata))
|
||||
+ ret = TRUE;
|
||||
}
|
||||
|
||||
- fclose (filedata->handle);
|
||||
- free (filedata->section_headers);
|
||||
- free (filedata->program_headers);
|
||||
- free (filedata->string_table);
|
||||
- free (filedata->dump.dump_sects);
|
||||
- free (filedata);
|
||||
+ done:
|
||||
+ if (filedata)
|
||||
+ {
|
||||
+ fclose (filedata->handle);
|
||||
+ free (filedata->section_headers);
|
||||
+ free (filedata->program_headers);
|
||||
+ free (filedata->string_table);
|
||||
+ free (filedata->dump.dump_sects);
|
||||
+ free (filedata);
|
||||
+ }
|
||||
+ free (program_name);
|
||||
+ program_name = saved_program_name;
|
||||
|
||||
free (ba_cache.strtab);
|
||||
ba_cache.strtab = NULL;
|
||||
--- binutils.orig/binutils/readelf.c 2021-01-07 12:59:35.802994842 +0000
|
||||
+++ binutils-2.35.1/binutils/readelf.c 2021-01-07 13:02:36.591754005 +0000
|
||||
@@ -20818,7 +20818,8 @@ process_file (char * file_name)
|
||||
done:
|
||||
if (filedata)
|
||||
{
|
||||
- fclose (filedata->handle);
|
||||
+ if (filedata->handle != NULL)
|
||||
+ fclose (filedata->handle);
|
||||
free (filedata->section_headers);
|
||||
free (filedata->program_headers);
|
||||
free (filedata->string_table);
|
||||
--- binutils.orig/binutils/readelf.c 2021-01-08 17:01:23.573093204 +0000
|
||||
+++ binutils-2.35.1/binutils/readelf.c 2021-01-08 17:02:23.095677242 +0000
|
||||
@@ -20787,7 +20787,6 @@ process_file (char * file_name)
|
||||
if (fread (armag, SARMAG, 1, filedata->handle) != 1)
|
||||
{
|
||||
error (_("Failed to read file's magic number\n"));
|
||||
- fclose (filedata->handle);
|
||||
goto done;
|
||||
}
|
||||
|
||||
@ -0,0 +1,937 @@
|
||||
diff -rup binutils.orig/bfd/.gitignore binutils-2.35.2/bfd/.gitignore
|
||||
--- binutils.orig/bfd/.gitignore 2021-11-30 13:38:24.349744247 +0000
|
||||
+++ binutils-2.35.2/bfd/.gitignore 2021-11-30 13:38:37.236657064 +0000
|
||||
@@ -11,6 +11,7 @@
|
||||
/peigen.c
|
||||
/pepigen.c
|
||||
/pex64igen.c
|
||||
+/pe-aarch64igen.c
|
||||
/stmp-bfd-h
|
||||
/targmatch.h
|
||||
|
||||
diff -rup binutils.orig/bfd/Makefile.am binutils-2.35.2/bfd/Makefile.am
|
||||
--- binutils.orig/bfd/Makefile.am 2021-11-30 13:38:24.358744186 +0000
|
||||
+++ binutils-2.35.2/bfd/Makefile.am 2021-11-30 13:38:37.237657058 +0000
|
||||
@@ -571,7 +571,9 @@ BFD64_BACKENDS = \
|
||||
mach-o-aarch64.lo \
|
||||
mach-o-x86-64.lo \
|
||||
mmo.lo \
|
||||
+ pe-aarch64igen.lo \
|
||||
pe-x86_64.lo \
|
||||
+ pei-aarch64lo \
|
||||
pei-ia64.lo \
|
||||
pei-x86_64.lo \
|
||||
pepigen.lo \
|
||||
@@ -611,6 +613,7 @@ BFD64_BACKENDS_CFILES = \
|
||||
mach-o-x86-64.c \
|
||||
mmo.c \
|
||||
pe-x86_64.c \
|
||||
+ pei-aarch64.c \
|
||||
pei-ia64.c \
|
||||
pei-x86_64.c \
|
||||
vms-alpha.c
|
||||
@@ -670,7 +673,7 @@ BUILD_CFILES = \
|
||||
elf32-aarch64.c elf64-aarch64.c \
|
||||
elf32-ia64.c elf64-ia64.c \
|
||||
elf32-riscv.c elf64-riscv.c \
|
||||
- peigen.c pepigen.c pex64igen.c
|
||||
+ peigen.c pepigen.c pex64igen.c pe-aarch64igen.c
|
||||
|
||||
CFILES = $(SOURCE_CFILES) $(BUILD_CFILES)
|
||||
|
||||
@@ -866,6 +869,10 @@ pex64igen.c: peXXigen.c
|
||||
echo "#line 1 \"peXXigen.c\"" > $@
|
||||
$(SED) -e s/XX/pex64/g < $< >> $@
|
||||
|
||||
+pe-aarch64igen.c: peXXigen.c
|
||||
+ echo "#line 1 \"peXXigen.c\"" > $@
|
||||
+ $(SED) -e s/XX/peAArch64/g < $< >> $@
|
||||
+
|
||||
BFD_H_DEPS= $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/diagnostics.h
|
||||
LOCAL_H_DEPS= libbfd.h sysdep.h config.h bfd_stdint.h
|
||||
$(BFD32_LIBS) \
|
||||
diff -rup binutils.orig/bfd/Makefile.in binutils-2.35.2/bfd/Makefile.in
|
||||
--- binutils.orig/bfd/Makefile.in 2021-11-30 13:38:24.346744267 +0000
|
||||
+++ binutils-2.35.2/bfd/Makefile.in 2021-11-30 13:38:37.238657051 +0000
|
||||
@@ -997,7 +997,9 @@ BFD64_BACKENDS = \
|
||||
mach-o-aarch64.lo \
|
||||
mach-o-x86-64.lo \
|
||||
mmo.lo \
|
||||
+ pe-aarch64igen.lo \
|
||||
pe-x86_64.lo \
|
||||
+ pei-aarch64.lo \
|
||||
pei-ia64.lo \
|
||||
pei-x86_64.lo \
|
||||
pepigen.lo \
|
||||
@@ -1037,6 +1039,7 @@ BFD64_BACKENDS_CFILES = \
|
||||
mach-o-x86-64.c \
|
||||
mmo.c \
|
||||
pe-x86_64.c \
|
||||
+ pei-aarch64.c \
|
||||
pei-ia64.c \
|
||||
pei-x86_64.c \
|
||||
vms-alpha.c
|
||||
@@ -1095,7 +1098,7 @@ BUILD_CFILES = \
|
||||
elf32-aarch64.c elf64-aarch64.c \
|
||||
elf32-ia64.c elf64-ia64.c \
|
||||
elf32-riscv.c elf64-riscv.c \
|
||||
- peigen.c pepigen.c pex64igen.c
|
||||
+ peigen.c pepigen.c pex64igen.c pe-aarch64igen.c
|
||||
|
||||
CFILES = $(SOURCE_CFILES) $(BUILD_CFILES)
|
||||
SOURCE_HFILES = \
|
||||
@@ -1556,9 +1559,11 @@ distclean-compile:
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-ppc.Plo@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-sh.Plo@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-x86_64.Plo@am__quote@
|
||||
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pei-aarch64.Plo@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/peigen.Plo@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pepigen.Plo@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pex64igen.Plo@am__quote@
|
||||
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/pe-aarch64igen.Plo@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/plugin.Plo@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ppcboot.Plo@am__quote@
|
||||
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/reloc.Plo@am__quote@
|
||||
@@ -1996,6 +2001,11 @@ pepigen.c : peXXigen.c
|
||||
pex64igen.c: peXXigen.c
|
||||
echo "#line 1 \"peXXigen.c\"" > $@
|
||||
$(SED) -e s/XX/pex64/g < $< >> $@
|
||||
+
|
||||
+pe-aarch64igen.c: peXXigen.c
|
||||
+ echo "#line 1 \"peXXigen.c\"" > $@
|
||||
+ $(SED) -e s/XX/peAArch64/g < $< >> $@
|
||||
+
|
||||
$(BFD32_LIBS) \
|
||||
$(BFD64_LIBS) \
|
||||
$(ALL_MACHINES) \
|
||||
diff -rup binutils.orig/bfd/bfd.c binutils-2.35.2/bfd/bfd.c
|
||||
--- binutils.orig/bfd/bfd.c 2021-11-30 13:38:24.344744281 +0000
|
||||
+++ binutils-2.35.2/bfd/bfd.c 2021-11-30 13:38:37.239657044 +0000
|
||||
@@ -1747,6 +1747,7 @@ bfd_get_sign_extend_vma (bfd *abfd)
|
||||
|| strcmp (name, "pei-i386") == 0
|
||||
|| strcmp (name, "pe-x86-64") == 0
|
||||
|| strcmp (name, "pei-x86-64") == 0
|
||||
+ || strcmp (name, "pei-aarch64-little") == 0
|
||||
|| strcmp (name, "pe-arm-wince-little") == 0
|
||||
|| strcmp (name, "pei-arm-wince-little") == 0
|
||||
|| strcmp (name, "aixcoff-rs6000") == 0
|
||||
diff -rup binutils.orig/bfd/coffcode.h binutils-2.35.2/bfd/coffcode.h
|
||||
--- binutils.orig/bfd/coffcode.h 2021-11-30 13:38:24.345744274 +0000
|
||||
+++ binutils-2.35.2/bfd/coffcode.h 2021-11-30 13:38:37.242657024 +0000
|
||||
@@ -2195,6 +2195,12 @@ coff_set_arch_mach_hook (bfd *abfd, void
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
+#ifdef AARCH64MAGIC
|
||||
+ case AARCH64MAGIC:
|
||||
+ arch = bfd_arch_aarch64;
|
||||
+ machine = internal_f->f_flags & F_AARCH64_ARCHITECTURE_MASK;
|
||||
+ break;
|
||||
+#endif
|
||||
#ifdef Z80MAGIC
|
||||
case Z80MAGIC:
|
||||
arch = bfd_arch_z80;
|
||||
@@ -2751,6 +2757,12 @@ coff_set_flags (bfd * abfd,
|
||||
return TRUE;
|
||||
#endif
|
||||
|
||||
+#ifdef AARCH64MAGIC
|
||||
+ case bfd_arch_aarch64:
|
||||
+ * magicp = AARCH64MAGIC;
|
||||
+ return TRUE;
|
||||
+#endif
|
||||
+
|
||||
#ifdef ARMMAGIC
|
||||
case bfd_arch_arm:
|
||||
#ifdef ARM_WINCE
|
||||
@@ -3841,7 +3853,7 @@ coff_write_object_contents (bfd * abfd)
|
||||
internal_f.f_flags |= IMAGE_FILE_LARGE_ADDRESS_AWARE;
|
||||
#endif
|
||||
|
||||
-#ifndef COFF_WITH_pex64
|
||||
+#if !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
|
||||
#ifdef COFF_WITH_PE
|
||||
internal_f.f_flags |= IMAGE_FILE_32BIT_MACHINE;
|
||||
#else
|
||||
@@ -3895,6 +3907,11 @@ coff_write_object_contents (bfd * abfd)
|
||||
internal_a.magic = IMAGE_NT_OPTIONAL_HDR_MAGIC;
|
||||
#endif
|
||||
|
||||
+#if defined(AARCH64)
|
||||
+#define __A_MAGIC_SET__
|
||||
+ internal_a.magic = ZMAGIC;
|
||||
+#endif
|
||||
+
|
||||
#if defined MCORE_PE
|
||||
#define __A_MAGIC_SET__
|
||||
internal_a.magic = IMAGE_NT_OPTIONAL_HDR_MAGIC;
|
||||
diff -rup binutils.orig/bfd/config.bfd binutils-2.35.2/bfd/config.bfd
|
||||
--- binutils.orig/bfd/config.bfd 2021-11-30 13:38:24.358744186 +0000
|
||||
+++ binutils-2.35.2/bfd/config.bfd 2021-11-30 13:41:24.512525484 +0000
|
||||
@@ -256,12 +256,12 @@ case "${targ}" in
|
||||
;;
|
||||
aarch64-*-linux*)
|
||||
targ_defvec=aarch64_elf64_le_vec
|
||||
- targ_selvecs="aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec"
|
||||
+ targ_selvecs="aarch64_elf64_be_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_le_vec arm_elf32_be_vec aarch64_pei_vec"
|
||||
want64=true
|
||||
;;
|
||||
aarch64_be-*-linux*)
|
||||
targ_defvec=aarch64_elf64_be_vec
|
||||
- targ_selvecs="aarch64_elf64_le_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_be_vec arm_elf32_le_vec"
|
||||
+ targ_selvecs="aarch64_elf64_le_vec aarch64_elf32_le_vec aarch64_elf32_be_vec arm_elf32_be_vec arm_elf32_le_vec aarch64_pei_vec"
|
||||
want64=true
|
||||
;;
|
||||
alpha*-*-freebsd* | alpha*-*-kfreebsd*-gnu)
|
||||
diff -rup binutils.orig/bfd/configure binutils-2.35.2/bfd/configure
|
||||
--- binutils.orig/bfd/configure 2021-11-30 13:38:24.358744186 +0000
|
||||
+++ binutils-2.35.2/bfd/configure 2021-11-30 13:38:37.250656970 +0000
|
||||
@@ -14738,6 +14738,7 @@ do
|
||||
aarch64_elf64_le_vec) tb="$tb elf64-aarch64.lo elfxx-aarch64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
|
||||
aarch64_elf64_le_cloudabi_vec) tb="$tb elf64-aarch64.lo elfxx-aarch64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
|
||||
aarch64_mach_o_vec) tb="$tb mach-o-aarch64.lo"; target_size=64 ;;
|
||||
+ aarch64_pei_vec) tb="$tb pei-aarch64.lo pe-aarch64igen.lo $coff"; target_size=64 ;;
|
||||
alpha_ecoff_le_vec) tb="$tb coff-alpha.lo ecoff.lo $ecoff"; target_size=64 ;;
|
||||
alpha_elf64_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
|
||||
alpha_elf64_fbsd_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
|
||||
diff -rup binutils.orig/bfd/configure.ac binutils-2.35.2/bfd/configure.ac
|
||||
--- binutils.orig/bfd/configure.ac 2021-11-30 13:38:24.354744213 +0000
|
||||
+++ binutils-2.35.2/bfd/configure.ac 2021-11-30 13:38:37.251656963 +0000
|
||||
@@ -450,6 +450,7 @@ do
|
||||
aarch64_elf64_le_vec) tb="$tb elf64-aarch64.lo elfxx-aarch64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
|
||||
aarch64_elf64_le_cloudabi_vec) tb="$tb elf64-aarch64.lo elfxx-aarch64.lo elf-ifunc.lo elf64.lo $elf"; target_size=64 ;;
|
||||
aarch64_mach_o_vec) tb="$tb mach-o-aarch64.lo"; target_size=64 ;;
|
||||
+ aarch64_pei_vec) tb="$tb pei-aarch64.lo pe-aarch64igen.lo $coff"; target_size=64 ;;
|
||||
alpha_ecoff_le_vec) tb="$tb coff-alpha.lo ecoff.lo $ecoff"; target_size=64 ;;
|
||||
alpha_elf64_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
|
||||
alpha_elf64_fbsd_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
|
||||
diff -rup binutils.orig/bfd/libpei.h binutils-2.35.2/bfd/libpei.h
|
||||
--- binutils.orig/bfd/libpei.h 2021-11-30 13:38:24.355744206 +0000
|
||||
+++ binutils-2.35.2/bfd/libpei.h 2021-11-30 13:41:57.744300692 +0000
|
||||
@@ -275,6 +275,41 @@
|
||||
#define _bfd_XXi_write_codeview_record _bfd_pepi_write_codeview_record
|
||||
#define _bfd_XXi_slurp_codeview_record _bfd_pepi_slurp_codeview_record
|
||||
|
||||
+#elif defined COFF_WITH_peAArch64
|
||||
+
|
||||
+#define GET_OPTHDR_IMAGE_BASE H_GET_64
|
||||
+#define PUT_OPTHDR_IMAGE_BASE H_PUT_64
|
||||
+#define GET_OPTHDR_SIZE_OF_STACK_RESERVE H_GET_64
|
||||
+#define PUT_OPTHDR_SIZE_OF_STACK_RESERVE H_PUT_64
|
||||
+#define GET_OPTHDR_SIZE_OF_STACK_COMMIT H_GET_64
|
||||
+#define PUT_OPTHDR_SIZE_OF_STACK_COMMIT H_PUT_64
|
||||
+#define GET_OPTHDR_SIZE_OF_HEAP_RESERVE H_GET_64
|
||||
+#define PUT_OPTHDR_SIZE_OF_HEAP_RESERVE H_PUT_64
|
||||
+#define GET_OPTHDR_SIZE_OF_HEAP_COMMIT H_GET_64
|
||||
+#define PUT_OPTHDR_SIZE_OF_HEAP_COMMIT H_PUT_64
|
||||
+#define GET_PDATA_ENTRY bfd_get_32
|
||||
+
|
||||
+#define _bfd_XX_bfd_copy_private_bfd_data_common _bfd_peAArch64_bfd_copy_private_bfd_data_common
|
||||
+#define _bfd_XX_bfd_copy_private_section_data _bfd_peAArch64_bfd_copy_private_section_data
|
||||
+#define _bfd_XX_get_symbol_info _bfd_peAArch64_get_symbol_info
|
||||
+#define _bfd_XX_only_swap_filehdr_out _bfd_peAArch64_only_swap_filehdr_out
|
||||
+#define _bfd_XX_print_private_bfd_data_common _bfd_peAArch64_print_private_bfd_data_common
|
||||
+#define _bfd_XXi_final_link_postscript _bfd_peAArch64i_final_link_postscript
|
||||
+#define _bfd_XXi_only_swap_filehdr_out _bfd_peAArch64i_only_swap_filehdr_out
|
||||
+#define _bfd_XXi_swap_aouthdr_in _bfd_peAArch64i_swap_aouthdr_in
|
||||
+#define _bfd_XXi_swap_aouthdr_out _bfd_peAArch64i_swap_aouthdr_out
|
||||
+#define _bfd_XXi_swap_aux_in _bfd_peAArch64i_swap_aux_in
|
||||
+#define _bfd_XXi_swap_aux_out _bfd_peAArch64i_swap_aux_out
|
||||
+#define _bfd_XXi_swap_lineno_in _bfd_peAArch64i_swap_lineno_in
|
||||
+#define _bfd_XXi_swap_lineno_out _bfd_peAArch64i_swap_lineno_out
|
||||
+#define _bfd_XXi_swap_scnhdr_out _bfd_peAArch64i_swap_scnhdr_out
|
||||
+#define _bfd_XXi_swap_sym_in _bfd_peAArch64i_swap_sym_in
|
||||
+#define _bfd_XXi_swap_sym_out _bfd_peAArch64i_swap_sym_out
|
||||
+#define _bfd_XXi_swap_debugdir_in _bfd_peAArch64i_swap_debugdir_in
|
||||
+#define _bfd_XXi_swap_debugdir_out _bfd_peAArch64i_swap_debugdir_out
|
||||
+#define _bfd_XXi_write_codeview_record _bfd_peAArch64i_write_codeview_record
|
||||
+#define _bfd_XXi_slurp_codeview_record _bfd_peAArch64i_slurp_codeview_record
|
||||
+
|
||||
#else /* !COFF_WITH_pep */
|
||||
|
||||
#define GET_OPTHDR_IMAGE_BASE H_GET_32
|
||||
@@ -368,4 +403,5 @@ bfd_boolean _bfd_pe_print_ce_compressed_
|
||||
bfd_boolean _bfd_pe64_print_ce_compressed_pdata (bfd *, void *);
|
||||
bfd_boolean _bfd_pex64_print_ce_compressed_pdata (bfd *, void *);
|
||||
bfd_boolean _bfd_pep_print_ce_compressed_pdata (bfd *, void *);
|
||||
+bfd_boolean _bfd_peAArch64_print_ce_compressed_pdata (bfd *, void *);
|
||||
|
||||
diff -rup binutils.orig/bfd/peXXigen.c binutils-2.35.2/bfd/peXXigen.c
|
||||
--- binutils.orig/bfd/peXXigen.c 2021-11-30 13:38:24.352744227 +0000
|
||||
+++ binutils-2.35.2/bfd/peXXigen.c 2021-11-30 13:38:37.255656936 +0000
|
||||
@@ -60,8 +60,9 @@
|
||||
on this code has a chance of getting something accomplished without
|
||||
wasting too much time. */
|
||||
|
||||
-/* This expands into COFF_WITH_pe, COFF_WITH_pep, or COFF_WITH_pex64
|
||||
- depending on whether we're compiling for straight PE or PE+. */
|
||||
+/* This expands into COFF_WITH_pe, COFF_WITH_pep, COFF_WITH_pex64 or
|
||||
+ COFF_WITH_peAArch64 depending on whether we're compiling for straight
|
||||
+ PE or PE+. */
|
||||
#define COFF_WITH_XX
|
||||
|
||||
#include "sysdep.h"
|
||||
@@ -87,6 +88,8 @@
|
||||
# include "coff/x86_64.h"
|
||||
#elif defined COFF_WITH_pep
|
||||
# include "coff/ia64.h"
|
||||
+#elif defined COFF_WITH_peAArch64
|
||||
+# include "coff/aarch64.h"
|
||||
#else
|
||||
# include "coff/i386.h"
|
||||
#endif
|
||||
@@ -96,7 +99,7 @@
|
||||
#include "libpei.h"
|
||||
#include "safe-ctype.h"
|
||||
|
||||
-#if defined COFF_WITH_pep || defined COFF_WITH_pex64
|
||||
+#if defined COFF_WITH_pep || defined COFF_WITH_pex64 || defined COFF_WITH_peAArch64
|
||||
# undef AOUTSZ
|
||||
# define AOUTSZ PEPAOUTSZ
|
||||
# define PEAOUTHDR PEPAOUTHDR
|
||||
@@ -485,7 +488,7 @@ _bfd_XXi_swap_aouthdr_in (bfd * abfd,
|
||||
aouthdr_int->text_start =
|
||||
GET_AOUTHDR_TEXT_START (abfd, aouthdr_ext->text_start);
|
||||
|
||||
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
|
||||
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
|
||||
/* PE32+ does not have data_start member! */
|
||||
aouthdr_int->data_start =
|
||||
GET_AOUTHDR_DATA_START (abfd, aouthdr_ext->data_start);
|
||||
@@ -571,7 +574,7 @@ _bfd_XXi_swap_aouthdr_in (bfd * abfd,
|
||||
if (aouthdr_int->entry)
|
||||
{
|
||||
aouthdr_int->entry += a->ImageBase;
|
||||
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
|
||||
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
|
||||
aouthdr_int->entry &= 0xffffffff;
|
||||
#endif
|
||||
}
|
||||
@@ -579,12 +582,12 @@ _bfd_XXi_swap_aouthdr_in (bfd * abfd,
|
||||
if (aouthdr_int->tsize)
|
||||
{
|
||||
aouthdr_int->text_start += a->ImageBase;
|
||||
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
|
||||
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
|
||||
aouthdr_int->text_start &= 0xffffffff;
|
||||
#endif
|
||||
}
|
||||
|
||||
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
|
||||
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
|
||||
/* PE32+ does not have data_start member! */
|
||||
if (aouthdr_int->dsize)
|
||||
{
|
||||
@@ -653,7 +656,7 @@ _bfd_XXi_swap_aouthdr_out (bfd * abfd, v
|
||||
if (aouthdr_in->tsize)
|
||||
{
|
||||
aouthdr_in->text_start -= ib;
|
||||
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
|
||||
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
|
||||
aouthdr_in->text_start &= 0xffffffff;
|
||||
#endif
|
||||
}
|
||||
@@ -661,7 +664,7 @@ _bfd_XXi_swap_aouthdr_out (bfd * abfd, v
|
||||
if (aouthdr_in->dsize)
|
||||
{
|
||||
aouthdr_in->data_start -= ib;
|
||||
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
|
||||
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
|
||||
aouthdr_in->data_start &= 0xffffffff;
|
||||
#endif
|
||||
}
|
||||
@@ -669,7 +672,7 @@ _bfd_XXi_swap_aouthdr_out (bfd * abfd, v
|
||||
if (aouthdr_in->entry)
|
||||
{
|
||||
aouthdr_in->entry -= ib;
|
||||
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
|
||||
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
|
||||
aouthdr_in->entry &= 0xffffffff;
|
||||
#endif
|
||||
}
|
||||
@@ -773,7 +776,7 @@ _bfd_XXi_swap_aouthdr_out (bfd * abfd, v
|
||||
PUT_AOUTHDR_TEXT_START (abfd, aouthdr_in->text_start,
|
||||
aouthdr_out->standard.text_start);
|
||||
|
||||
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
|
||||
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
|
||||
/* PE32+ does not have data_start member! */
|
||||
PUT_AOUTHDR_DATA_START (abfd, aouthdr_in->data_start,
|
||||
aouthdr_out->standard.data_start);
|
||||
@@ -1886,7 +1889,7 @@ pe_print_edata (bfd * abfd, void * vfile
|
||||
static bfd_boolean
|
||||
pe_print_pdata (bfd * abfd, void * vfile)
|
||||
{
|
||||
-#if defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
|
||||
+#if defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
|
||||
# define PDATA_ROW_SIZE (3 * 8)
|
||||
#else
|
||||
# define PDATA_ROW_SIZE (5 * 4)
|
||||
@@ -1913,7 +1916,7 @@ pe_print_pdata (bfd * abfd, void * vfile
|
||||
|
||||
fprintf (file,
|
||||
_("\nThe Function Table (interpreted .pdata section contents)\n"));
|
||||
-#if defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
|
||||
+#if defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
|
||||
fprintf (file,
|
||||
_(" vma:\t\t\tBegin Address End Address Unwind Info\n"));
|
||||
#else
|
||||
@@ -1950,7 +1953,7 @@ pe_print_pdata (bfd * abfd, void * vfile
|
||||
bfd_vma eh_handler;
|
||||
bfd_vma eh_data;
|
||||
bfd_vma prolog_end_addr;
|
||||
-#if !defined(COFF_WITH_pep) || defined(COFF_WITH_pex64)
|
||||
+#if !defined(COFF_WITH_pep) || defined(COFF_WITH_pex64) || defined(COFF_WITH_peAArch64)
|
||||
int em_data;
|
||||
#endif
|
||||
|
||||
@@ -1968,7 +1971,7 @@ pe_print_pdata (bfd * abfd, void * vfile
|
||||
/* We are probably into the padding of the section now. */
|
||||
break;
|
||||
|
||||
-#if !defined(COFF_WITH_pep) || defined(COFF_WITH_pex64)
|
||||
+#if !defined(COFF_WITH_pep) || defined(COFF_WITH_pex64) || defined(COFF_WITH_peAArch64)
|
||||
em_data = ((eh_handler & 0x1) << 2) | (prolog_end_addr & 0x3);
|
||||
#endif
|
||||
eh_handler &= ~(bfd_vma) 0x3;
|
||||
@@ -1979,7 +1982,7 @@ pe_print_pdata (bfd * abfd, void * vfile
|
||||
bfd_fprintf_vma (abfd, file, begin_addr); fputc (' ', file);
|
||||
bfd_fprintf_vma (abfd, file, end_addr); fputc (' ', file);
|
||||
bfd_fprintf_vma (abfd, file, eh_handler);
|
||||
-#if !defined(COFF_WITH_pep) || defined(COFF_WITH_pex64)
|
||||
+#if !defined(COFF_WITH_pep) || defined(COFF_WITH_pex64) || defined(COFF_WITH_peAArch64)
|
||||
fputc (' ', file);
|
||||
bfd_fprintf_vma (abfd, file, eh_data); fputc (' ', file);
|
||||
bfd_fprintf_vma (abfd, file, prolog_end_addr);
|
||||
@@ -2894,7 +2897,7 @@ _bfd_XX_print_private_bfd_data_common (b
|
||||
bfd_fprintf_vma (abfd, file, i->AddressOfEntryPoint);
|
||||
fprintf (file, "\nBaseOfCode\t\t");
|
||||
bfd_fprintf_vma (abfd, file, i->BaseOfCode);
|
||||
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
|
||||
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
|
||||
/* PE32+ does not have BaseOfData member! */
|
||||
fprintf (file, "\nBaseOfData\t\t");
|
||||
bfd_fprintf_vma (abfd, file, i->BaseOfData);
|
||||
@@ -3163,7 +3166,7 @@ _bfd_XX_get_symbol_info (bfd * abfd, asy
|
||||
coff_get_symbol_info (abfd, symbol, ret);
|
||||
}
|
||||
|
||||
-#if !defined(COFF_WITH_pep) && defined(COFF_WITH_pex64)
|
||||
+#if !defined(COFF_WITH_pep) && defined(COFF_WITH_pex64) && defined(COFF_WITH_peAArch64)
|
||||
static int
|
||||
sort_x64_pdata (const void *l, const void *r)
|
||||
{
|
||||
@@ -4595,7 +4598,7 @@ _bfd_XXi_final_link_postscript (bfd * ab
|
||||
the TLS data directory consists of 4 pointers, followed
|
||||
by two 4-byte integer. This implies that the total size
|
||||
is different for 32-bit and 64-bit executables. */
|
||||
-#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64)
|
||||
+#if !defined(COFF_WITH_pep) && !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
|
||||
pe_data (abfd)->pe_opthdr.DataDirectory[PE_TLS_TABLE].Size = 0x18;
|
||||
#else
|
||||
pe_data (abfd)->pe_opthdr.DataDirectory[PE_TLS_TABLE].Size = 0x28;
|
||||
@@ -4604,7 +4607,7 @@ _bfd_XXi_final_link_postscript (bfd * ab
|
||||
|
||||
/* If there is a .pdata section and we have linked pdata finally, we
|
||||
need to sort the entries ascending. */
|
||||
-#if !defined(COFF_WITH_pep) && defined(COFF_WITH_pex64)
|
||||
+#if !defined(COFF_WITH_pep) && defined(COFF_WITH_pex64) && defined(COFF_WITH_peAArch64)
|
||||
{
|
||||
asection *sec = bfd_get_section_by_name (abfd, ".pdata");
|
||||
|
||||
Only in binutils-2.35.2/bfd: pei-aarch64.c
|
||||
diff -rup binutils.orig/bfd/peicode.h binutils-2.35.2/bfd/peicode.h
|
||||
--- binutils.orig/bfd/peicode.h 2021-11-30 13:38:24.354744213 +0000
|
||||
+++ binutils-2.35.2/bfd/peicode.h 2021-11-30 13:38:37.256656929 +0000
|
||||
@@ -231,7 +231,7 @@ coff_swap_scnhdr_in (bfd * abfd, void *
|
||||
{
|
||||
scnhdr_int->s_vaddr += pe_data (abfd)->pe_opthdr.ImageBase;
|
||||
/* Do not cut upper 32-bits for 64-bit vma. */
|
||||
-#ifndef COFF_WITH_pex64
|
||||
+#if !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64)
|
||||
scnhdr_int->s_vaddr &= 0xffffffff;
|
||||
#endif
|
||||
}
|
||||
@@ -738,6 +738,16 @@ static jump_table jtab[] =
|
||||
},
|
||||
#endif
|
||||
|
||||
+#ifdef AARCH64MAGIC
|
||||
+/* We don't currently support jumping to DLLs, so if
|
||||
+ someone does try emit a runtime trap. Through UDF #0. */
|
||||
+ { AARCH64MAGIC,
|
||||
+ { 0x00, 0x00, 0x00, 0x00 },
|
||||
+ 4, 0
|
||||
+ },
|
||||
+
|
||||
+#endif
|
||||
+
|
||||
#ifdef ARMPEMAGIC
|
||||
{ ARMPEMAGIC,
|
||||
{ 0x00, 0xc0, 0x9f, 0xe5, 0x00, 0xf0,
|
||||
@@ -910,7 +920,7 @@ pe_ILF_build_a_bfd (bfd * abfd,
|
||||
/* See PR 20907 for a reproducer. */
|
||||
goto error_return;
|
||||
|
||||
-#ifdef COFF_WITH_pex64
|
||||
+#if defined(COFF_WITH_pex64) || defined(COFF_WITH_peAArch64)
|
||||
((unsigned int *) id4->contents)[0] = ordinal;
|
||||
((unsigned int *) id4->contents)[1] = 0x80000000;
|
||||
((unsigned int *) id5->contents)[0] = ordinal;
|
||||
@@ -1206,6 +1216,12 @@ pe_ILF_object_p (bfd * abfd)
|
||||
#endif
|
||||
break;
|
||||
|
||||
+ case IMAGE_FILE_MACHINE_ARM64:
|
||||
+#ifdef AARCH64MAGIC
|
||||
+ magic = AARCH64MAGIC;
|
||||
+#endif
|
||||
+ break;
|
||||
+
|
||||
case IMAGE_FILE_MACHINE_THUMB:
|
||||
#ifdef THUMBPEMAGIC
|
||||
{
|
||||
diff -rup binutils.orig/bfd/targets.c binutils-2.35.2/bfd/targets.c
|
||||
--- binutils.orig/bfd/targets.c 2021-11-30 13:38:24.354744213 +0000
|
||||
+++ binutils-2.35.2/bfd/targets.c 2021-11-30 13:38:37.257656922 +0000
|
||||
@@ -668,6 +668,7 @@ extern const bfd_target aarch64_elf64_be
|
||||
extern const bfd_target aarch64_elf64_le_vec;
|
||||
extern const bfd_target aarch64_elf64_le_cloudabi_vec;
|
||||
extern const bfd_target aarch64_mach_o_vec;
|
||||
+extern const bfd_target aarch64_pei_vec;
|
||||
extern const bfd_target alpha_ecoff_le_vec;
|
||||
extern const bfd_target alpha_elf64_vec;
|
||||
extern const bfd_target alpha_elf64_fbsd_vec;
|
||||
@@ -983,6 +984,7 @@ static const bfd_target * const _bfd_tar
|
||||
&aarch64_elf64_le_vec,
|
||||
&aarch64_elf64_le_cloudabi_vec,
|
||||
&aarch64_mach_o_vec,
|
||||
+ &aarch64_pei_vec,
|
||||
#endif
|
||||
|
||||
#ifdef BFD64
|
||||
diff -rup binutils.orig/binutils/NEWS binutils-2.35.2/binutils/NEWS
|
||||
--- binutils.orig/binutils/NEWS 2021-11-30 13:38:23.874747460 +0000
|
||||
+++ binutils-2.35.2/binutils/NEWS 2021-11-30 13:42:31.024075560 +0000
|
||||
@@ -1,5 +1,8 @@
|
||||
-*- text -*-
|
||||
|
||||
+* Support for efi-app-aarch64, efi-rtdrv-aarch64 and efi-bsdrv-aarch64 has been
|
||||
+ added to objcopy in order to enable UEFI development using binutils.
|
||||
+
|
||||
Changes in 2.35:
|
||||
|
||||
* Changed readelf's display of symbol names when wide mode is not enabled.
|
||||
diff -rup binutils.orig/binutils/objcopy.c binutils-2.35.2/binutils/objcopy.c
|
||||
--- binutils.orig/binutils/objcopy.c 2021-11-30 13:38:23.874747460 +0000
|
||||
+++ binutils-2.35.2/binutils/objcopy.c 2021-11-30 13:38:37.260656902 +0000
|
||||
@@ -4950,6 +4950,13 @@ convert_efi_target (char *efi)
|
||||
/* Change x86_64 to x86-64. */
|
||||
efi[7] = '-';
|
||||
}
|
||||
+ else if (strcmp (efi + 4, "aarch64") == 0)
|
||||
+ {
|
||||
+ /* Change aarch64 to aarch64-little. */
|
||||
+ efi = (char *) xrealloc (efi, strlen (efi) + 7);
|
||||
+ char *t = "aarch64-little";
|
||||
+ strcpy (efi + 4, t);
|
||||
+ }
|
||||
}
|
||||
|
||||
/* Allocate and return a pointer to a struct section_add, initializing the
|
||||
diff -rup binutils.orig/include/coff/pe.h binutils-2.35.2/include/coff/pe.h
|
||||
--- binutils.orig/include/coff/pe.h 2021-11-30 13:38:23.827747778 +0000
|
||||
+++ binutils-2.35.2/include/coff/pe.h 2021-11-30 13:38:37.261656895 +0000
|
||||
@@ -132,6 +132,7 @@
|
||||
#define IMAGE_FILE_MACHINE_AM33 0x01d3
|
||||
#define IMAGE_FILE_MACHINE_AMD64 0x8664
|
||||
#define IMAGE_FILE_MACHINE_ARM 0x01c0
|
||||
+#define IMAGE_FILE_MACHINE_ARM64 0xaa64
|
||||
#define IMAGE_FILE_MACHINE_AXP64 IMAGE_FILE_MACHINE_ALPHA64
|
||||
#define IMAGE_FILE_MACHINE_CEE 0xc0ee
|
||||
#define IMAGE_FILE_MACHINE_CEF 0x0cef
|
||||
--- /dev/null 2021-11-30 07:48:35.901044247 +0000
|
||||
+++ binutils-2.35.2/bfd/coff-aarch64.c 2021-11-30 13:43:11.774799879 +0000
|
||||
@@ -0,0 +1,165 @@
|
||||
+/* BFD back-end for AArch64 COFF files.
|
||||
+ Copyright (C) 2021 Free Software Foundation, Inc.
|
||||
+
|
||||
+ This file is part of BFD, the Binary File Descriptor library.
|
||||
+
|
||||
+ This program is free software; you can redistribute it and/or modify
|
||||
+ it under the terms of the GNU General Public License as published by
|
||||
+ the Free Software Foundation; either version 3 of the License, or
|
||||
+ (at your option) any later version.
|
||||
+
|
||||
+ This program is distributed in the hope that it will be useful,
|
||||
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ GNU General Public License for more details.
|
||||
+
|
||||
+ You should have received a copy of the GNU General Public License
|
||||
+ along with this program; if not, write to the Free Software
|
||||
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
|
||||
+ MA 02110-1301, USA. */
|
||||
+
|
||||
+
|
||||
+#ifndef COFF_WITH_peAArch64
|
||||
+#define COFF_WITH_peAArch64
|
||||
+#endif
|
||||
+
|
||||
+/* Note we have to make sure not to include headers twice.
|
||||
+ Not all headers are wrapped in #ifdef guards, so we define
|
||||
+ PEI_HEADERS to prevent double including here. */
|
||||
+#ifndef PEI_HEADERS
|
||||
+#include "sysdep.h"
|
||||
+#include "bfd.h"
|
||||
+#include "libbfd.h"
|
||||
+#include "coff/aarch64.h"
|
||||
+#include "coff/internal.h"
|
||||
+#include "coff/pe.h"
|
||||
+#include "libcoff.h"
|
||||
+#include "libiberty.h"
|
||||
+#endif
|
||||
+
|
||||
+#include "libcoff.h"
|
||||
+
|
||||
+/* The page size is a guess based on ELF. */
|
||||
+
|
||||
+#define COFF_PAGE_SIZE 0x1000
|
||||
+
|
||||
+/* All users of this file have bfd_octets_per_byte (abfd, sec) == 1. */
|
||||
+#define OCTETS_PER_BYTE(ABFD, SEC) 1
|
||||
+
|
||||
+#ifndef PCRELOFFSET
|
||||
+#define PCRELOFFSET TRUE
|
||||
+#endif
|
||||
+
|
||||
+/* Currently we don't handle any relocations. */
|
||||
+static reloc_howto_type pe_aarch64_std_reloc_howto[] =
|
||||
+ {
|
||||
+
|
||||
+ };
|
||||
+
|
||||
+#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER 2
|
||||
+#define COFF_PAGE_SIZE 0x1000
|
||||
+
|
||||
+#ifndef NUM_ELEM
|
||||
+#define NUM_ELEM(a) ((sizeof (a)) / sizeof ((a)[0]))
|
||||
+#endif
|
||||
+
|
||||
+#define NUM_RELOCS NUM_ELEM (pe_aarch64_std_reloc_howto)
|
||||
+
|
||||
+#define RTYPE2HOWTO(cache_ptr, dst) \
|
||||
+ (cache_ptr)->howto = NULL
|
||||
+
|
||||
+#ifndef bfd_pe_print_pdata
|
||||
+#define bfd_pe_print_pdata NULL
|
||||
+#endif
|
||||
+
|
||||
+/* Return TRUE if this relocation should
|
||||
+ appear in the output .reloc section. */
|
||||
+
|
||||
+static bfd_boolean
|
||||
+in_reloc_p (bfd * abfd ATTRIBUTE_UNUSED,
|
||||
+ reloc_howto_type * howto)
|
||||
+{
|
||||
+ return !howto->pc_relative;
|
||||
+}
|
||||
+
|
||||
+#include "coffcode.h"
|
||||
+
|
||||
+/* Target vectors. */
|
||||
+const bfd_target
|
||||
+#ifdef TARGET_SYM
|
||||
+ TARGET_SYM =
|
||||
+#else
|
||||
+ aarch64_pei_vec =
|
||||
+#endif
|
||||
+{
|
||||
+#ifdef TARGET_NAME
|
||||
+ TARGET_NAME,
|
||||
+#else
|
||||
+ "pei-aarch64-little", /* Name. */
|
||||
+#endif
|
||||
+ bfd_target_coff_flavour,
|
||||
+ BFD_ENDIAN_LITTLE, /* Data byte order is little. */
|
||||
+ BFD_ENDIAN_LITTLE, /* Header byte order is little. */
|
||||
+
|
||||
+ (HAS_RELOC | EXEC_P /* Object flags. */
|
||||
+ | HAS_LINENO | HAS_DEBUG
|
||||
+ | HAS_SYMS | HAS_LOCALS | WP_TEXT | D_PAGED | BFD_COMPRESS | BFD_DECOMPRESS),
|
||||
+
|
||||
+ (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC /* Section flags. */
|
||||
+#if defined(COFF_WITH_PE)
|
||||
+ | SEC_LINK_ONCE | SEC_LINK_DUPLICATES | SEC_READONLY | SEC_DEBUGGING
|
||||
+#endif
|
||||
+ | SEC_CODE | SEC_DATA | SEC_EXCLUDE ),
|
||||
+
|
||||
+#ifdef TARGET_UNDERSCORE
|
||||
+ TARGET_UNDERSCORE, /* Leading underscore. */
|
||||
+#else
|
||||
+ 0, /* Leading underscore. */
|
||||
+#endif
|
||||
+ '/', /* Ar_pad_char. */
|
||||
+ 15, /* Ar_max_namelen. */
|
||||
+ 0, /* match priority. */
|
||||
+
|
||||
+ /* Data conversion functions. */
|
||||
+ bfd_getl64, bfd_getl_signed_64, bfd_putl64,
|
||||
+ bfd_getl32, bfd_getl_signed_32, bfd_putl32,
|
||||
+ bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* Data. */
|
||||
+ /* Header conversion functions. */
|
||||
+ bfd_getl64, bfd_getl_signed_64, bfd_putl64,
|
||||
+ bfd_getl32, bfd_getl_signed_32, bfd_putl32,
|
||||
+ bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* Hdrs. */
|
||||
+
|
||||
+ /* Note that we allow an object file to be treated as a core file as well. */
|
||||
+ { /* bfd_check_format. */
|
||||
+ _bfd_dummy_target,
|
||||
+ coff_object_p,
|
||||
+ bfd_generic_archive_p,
|
||||
+ coff_object_p
|
||||
+ },
|
||||
+ { /* bfd_set_format. */
|
||||
+ _bfd_bool_bfd_false_error,
|
||||
+ coff_mkobject,
|
||||
+ _bfd_generic_mkarchive,
|
||||
+ _bfd_bool_bfd_false_error
|
||||
+ },
|
||||
+ { /* bfd_write_contents. */
|
||||
+ _bfd_bool_bfd_false_error,
|
||||
+ coff_write_object_contents,
|
||||
+ _bfd_write_archive_contents,
|
||||
+ _bfd_bool_bfd_false_error
|
||||
+ },
|
||||
+
|
||||
+ BFD_JUMP_TABLE_GENERIC (coff),
|
||||
+ BFD_JUMP_TABLE_COPY (coff),
|
||||
+ BFD_JUMP_TABLE_CORE (_bfd_nocore),
|
||||
+ BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
|
||||
+ BFD_JUMP_TABLE_SYMBOLS (coff),
|
||||
+ BFD_JUMP_TABLE_RELOCS (coff),
|
||||
+ BFD_JUMP_TABLE_WRITE (coff),
|
||||
+ BFD_JUMP_TABLE_LINK (coff),
|
||||
+ BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
|
||||
+
|
||||
+ NULL,
|
||||
+
|
||||
+ COFF_SWAP_TABLE
|
||||
+};
|
||||
--- /dev/null 2021-11-30 07:48:35.901044247 +0000
|
||||
+++ binutils-2.35.2/include/coff/aarch64.h 2021-11-30 13:38:37.261656895 +0000
|
||||
@@ -0,0 +1,63 @@
|
||||
+/* AArch64 COFF support for BFD.
|
||||
+ Copyright (C) 2021 Free Software Foundation, Inc.
|
||||
+
|
||||
+ This file is part of BFD, the Binary File Descriptor library.
|
||||
+
|
||||
+ This program is free software; you can redistribute it and/or modify
|
||||
+ it under the terms of the GNU General Public License as published by
|
||||
+ the Free Software Foundation; either version 3 of the License, or
|
||||
+ (at your option) any later version.
|
||||
+
|
||||
+ This program is distributed in the hope that it will be useful,
|
||||
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ GNU General Public License for more details.
|
||||
+
|
||||
+ You should have received a copy of the GNU General Public License
|
||||
+ along with this program; if not, write to the Free Software Foundation,
|
||||
+ Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
|
||||
+
|
||||
+#define COFFAARCH64 1
|
||||
+
|
||||
+#define L_LNNO_SIZE 2
|
||||
+#define INCLUDE_COMDAT_FIELDS_IN_AUXENT
|
||||
+#include "coff/external.h"
|
||||
+
|
||||
+#define F_AARCH64_ARCHITECTURE_MASK (0x4000)
|
||||
+
|
||||
+#define AARCH64MAGIC 0xaa64 /* From Microsoft specification. */
|
||||
+
|
||||
+#undef BADMAG
|
||||
+#define BADMAG(x) ((x).f_magic != AARCH64MAGIC)
|
||||
+#define AARCH64 1 /* Customize coffcode.h. */
|
||||
+
|
||||
+#define IMAGE_NT_OPTIONAL_HDR64_MAGIC 0x20b
|
||||
+
|
||||
+#define OMAGIC 0404 /* Object files, eg as output. */
|
||||
+#define ZMAGIC IMAGE_NT_OPTIONAL_HDR64_MAGIC /* Demand load format, eg normal ld output 0x10b. */
|
||||
+#define STMAGIC 0401 /* Target shlib. */
|
||||
+#define SHMAGIC 0443 /* Host shlib. */
|
||||
+
|
||||
+/* define some NT default values */
|
||||
+/* #define NT_IMAGE_BASE 0x400000 moved to internal.h */
|
||||
+#define NT_SECTION_ALIGNMENT 0x1000
|
||||
+#define NT_FILE_ALIGNMENT 0x200
|
||||
+#define NT_DEF_RESERVE 0x100000
|
||||
+#define NT_DEF_COMMIT 0x1000
|
||||
+
|
||||
+/* We use the .rdata section to hold read only data. */
|
||||
+#define _LIT ".rdata"
|
||||
+
|
||||
+/********************** RELOCATION DIRECTIVES **********************/
|
||||
+struct external_reloc
|
||||
+{
|
||||
+ char r_vaddr[4];
|
||||
+ char r_symndx[4];
|
||||
+ char r_type[2];
|
||||
+ char r_offset[4];
|
||||
+};
|
||||
+
|
||||
+#define RELOC struct external_reloc
|
||||
+#define RELSZ 14
|
||||
+
|
||||
+#define ARM_NOTE_SECTION ".note"
|
||||
--- /dev/null 2021-11-30 07:48:35.901044247 +0000
|
||||
+++ binutils-2.35.2/binutils/testsuite/binutils-all/aarch64/pei-aarch64-little.s 2021-11-30 13:38:37.260656902 +0000
|
||||
@@ -0,0 +1,42 @@
|
||||
+ .arch armv8-a
|
||||
+ .text
|
||||
+ .align 2
|
||||
+ .global foo
|
||||
+ .type foo, %function
|
||||
+foo:
|
||||
+.LFB0:
|
||||
+ .cfi_startproc
|
||||
+ sub sp, sp, #16
|
||||
+ .cfi_def_cfa_offset 16
|
||||
+ str w0, [sp, 12]
|
||||
+ ldr w0, [sp, 12]
|
||||
+ mul w0, w0, w0
|
||||
+ add sp, sp, 16
|
||||
+ .cfi_def_cfa_offset 0
|
||||
+ ret
|
||||
+ .cfi_endproc
|
||||
+.LFE0:
|
||||
+ .size foo, .-foo
|
||||
+ .align 2
|
||||
+ .global main
|
||||
+ .type main, %function
|
||||
+main:
|
||||
+.LFB1:
|
||||
+ .cfi_startproc
|
||||
+ stp x29, x30, [sp, -16]!
|
||||
+ .cfi_def_cfa_offset 16
|
||||
+ .cfi_offset 29, -16
|
||||
+ .cfi_offset 30, -8
|
||||
+ mov x29, sp
|
||||
+ mov w0, 5
|
||||
+ bl foo
|
||||
+ ldp x29, x30, [sp], 16
|
||||
+ .cfi_restore 30
|
||||
+ .cfi_restore 29
|
||||
+ .cfi_def_cfa_offset 0
|
||||
+ ret
|
||||
+ .cfi_endproc
|
||||
+.LFE1:
|
||||
+ .size main, .-main
|
||||
+ .ident "GCC: (fsf-trunk.2870) 12.0.0 20210930 (experimental)"
|
||||
+ .section .note.GNU-stack,"",@progbits
|
||||
--- /dev/null 2021-11-30 07:48:35.901044247 +0000
|
||||
+++ binutils-2.35.2/binutils/testsuite/binutils-all/aarch64/pei-aarch64-little.d 2021-11-30 13:38:37.260656902 +0000
|
||||
@@ -0,0 +1,16 @@
|
||||
+#skip: aarch64_be-*-*
|
||||
+#ld: -e0
|
||||
+#PROG: objcopy
|
||||
+#objcopy: -j .text -j .sdata -j .data -j .dynamic -j .dynsym -j .rel -j .rela -j .rel.* -j .rela.* -j .rel* -j .rela* -j .reloc --target=efi-app-aarch64
|
||||
+#objdump: -h -f
|
||||
+#name: Check if efi app format is recognized
|
||||
+
|
||||
+.*: file format pei-aarch64-little
|
||||
+architecture: aarch64, flags 0x00000132:
|
||||
+EXEC_P, HAS_SYMS, HAS_LOCALS, D_PAGED
|
||||
+start address 0x0000000000000000
|
||||
+
|
||||
+Sections:
|
||||
+Idx Name Size VMA LMA File off Algn
|
||||
+ 0 \.text 00000030 0[^ ]+ 0[^ ]+ 0[^ ]+ 2\*\*2
|
||||
+ CONTENTS, ALLOC, LOAD, READONLY, CODE
|
||||
--- /dev/null 2021-11-30 07:48:35.901044247 +0000
|
||||
+++ binutils-2.35.2/bfd/pei-aarch64.c 2021-11-30 13:38:37.255656936 +0000
|
||||
@@ -0,0 +1,75 @@
|
||||
+/* BFD back-end for AArch64 PE IMAGE COFF files.
|
||||
+ Copyright (C) 2021 Free Software Foundation, Inc.
|
||||
+
|
||||
+ This file is part of BFD, the Binary File Descriptor library.
|
||||
+
|
||||
+ This program is free software; you can redistribute it and/or modify
|
||||
+ it under the terms of the GNU General Public License as published by
|
||||
+ the Free Software Foundation; either version 3 of the License, or
|
||||
+ (at your option) any later version.
|
||||
+
|
||||
+ This program is distributed in the hope that it will be useful,
|
||||
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+ GNU General Public License for more details.
|
||||
+
|
||||
+ You should have received a copy of the GNU General Public License
|
||||
+ along with this program; if not, write to the Free Software
|
||||
+ Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
|
||||
+ MA 02110-1301, USA. */
|
||||
+
|
||||
+#include "sysdep.h"
|
||||
+#include "bfd.h"
|
||||
+
|
||||
+#define TARGET_SYM aarch64_pei_vec
|
||||
+#define TARGET_NAME "pei-aarch64-little"
|
||||
+#define TARGET_ARCHITECTURE bfd_arch_aarch64
|
||||
+#define TARGET_PAGESIZE 4096
|
||||
+#define TARGET_BIG_ENDIAN 0
|
||||
+#define TARGET_ARCHIVE 0
|
||||
+#define TARGET_PRIORITY 0
|
||||
+
|
||||
+#define COFF_IMAGE_WITH_PE
|
||||
+/* Rename the above into.. */
|
||||
+#define COFF_WITH_peAArch64
|
||||
+#define COFF_WITH_PE
|
||||
+#define PCRELOFFSET TRUE
|
||||
+
|
||||
+/* Long section names not allowed in executable images, only object files. */
|
||||
+#define COFF_LONG_SECTION_NAMES 0
|
||||
+
|
||||
+#define COFF_SECTION_ALIGNMENT_ENTRIES \
|
||||
+{ COFF_SECTION_NAME_EXACT_MATCH (".bss"), \
|
||||
+ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
|
||||
+{ COFF_SECTION_NAME_EXACT_MATCH (".data"), \
|
||||
+ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
|
||||
+{ COFF_SECTION_NAME_EXACT_MATCH (".rdata"), \
|
||||
+ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
|
||||
+{ COFF_SECTION_NAME_EXACT_MATCH (".text"), \
|
||||
+ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
|
||||
+{ COFF_SECTION_NAME_PARTIAL_MATCH (".idata"), \
|
||||
+ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
|
||||
+{ COFF_SECTION_NAME_EXACT_MATCH (".pdata"), \
|
||||
+ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 2 }, \
|
||||
+{ COFF_SECTION_NAME_PARTIAL_MATCH (".debug"), \
|
||||
+ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 0 }, \
|
||||
+{ COFF_SECTION_NAME_PARTIAL_MATCH (".gnu.linkonce.wi."), \
|
||||
+ COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 0 }
|
||||
+
|
||||
+#define PEI_HEADERS
|
||||
+#include "sysdep.h"
|
||||
+#include "bfd.h"
|
||||
+#include "libbfd.h"
|
||||
+#include "coff/aarch64.h"
|
||||
+#include "coff/internal.h"
|
||||
+#include "coff/pe.h"
|
||||
+#include "libcoff.h"
|
||||
+#include "libpei.h"
|
||||
+#include "libiberty.h"
|
||||
+
|
||||
+/* Make sure we're setting a 64-bit format. */
|
||||
+#undef AOUTSZ
|
||||
+#define AOUTSZ PEPAOUTSZ
|
||||
+#define PEAOUTHDR PEPAOUTHDR
|
||||
+
|
||||
+#include "coff-aarch64.c"
|
||||
--- binutils.orig/binutils/testsuite/binutils-all/aarch64/pei-aarch64-little.d 2024-06-04 14:00:51.569526147 +0100
|
||||
+++ binutils-2.35.2/binutils/testsuite/binutils-all/aarch64/pei-aarch64-little.d 2024-06-04 14:00:59.049544354 +0100
|
||||
@@ -12,5 +12,5 @@ start address 0x0000000000000000
|
||||
|
||||
Sections:
|
||||
Idx Name Size VMA LMA File off Algn
|
||||
- 0 \.text 00000030 0[^ ]+ 0[^ ]+ 0[^ ]+ 2\*\*2
|
||||
+ 0 \.text 00000030 0[^ ]+ 0[^ ]+ 0[^ ]+ 2\*\*12
|
||||
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
||||
@ -1,38 +0,0 @@
|
||||
diff -rup binutils.orig/bfd/bpf-reloc.def binutils-2.41/bfd/bpf-reloc.def
|
||||
--- binutils.orig/bfd/bpf-reloc.def 2023-10-30 10:41:59.114273359 +0000
|
||||
+++ binutils-2.41/bfd/bpf-reloc.def 2023-10-30 11:09:41.316109162 +0000
|
||||
@@ -72,3 +72,20 @@
|
||||
0xffffffff, /* src_mask */
|
||||
0xffffffff, /* dst_mask */
|
||||
true) /* pcrel_offset */
|
||||
+
|
||||
+ /* R_BPF_64_NODYLD32 is not used by GNU tools - but it is generated by LLVM.
|
||||
+ We provide an entry here so that tools like strip can safely handle BPF
|
||||
+ binaries generated by other tools. */
|
||||
+ BPF_HOWTO (R_BPF_64_NODYLD32, /* type */
|
||||
+ 0, /* rightshift */
|
||||
+ 0, /* size */
|
||||
+ 0, /* bitsize */
|
||||
+ false, /* pc_relative */
|
||||
+ 0, /* bitpos */
|
||||
+ complain_overflow_dont, /* complain_on_overflow */
|
||||
+ bpf_elf_generic_reloc, /* special_function */
|
||||
+ "R_BPF_64_NODYLD32", /* name */
|
||||
+ false, /* partial_inplace */
|
||||
+ 0, /* src_mask */
|
||||
+ 0, /* dst_mask */
|
||||
+ false) /* pcrel_offset */
|
||||
diff -rup binutils.orig/include/elf/bpf.h binutils-2.41/include/elf/bpf.h
|
||||
--- binutils.orig/include/elf/bpf.h 2023-10-30 10:41:59.332273599 +0000
|
||||
+++ binutils-2.41/include/elf/bpf.h 2023-10-30 10:59:44.475368448 +0000
|
||||
@@ -30,8 +30,8 @@ START_RELOC_NUMBERS (elf_bpf_reloc_type)
|
||||
RELOC_NUMBER (R_BPF_64_64, 1)
|
||||
RELOC_NUMBER (R_BPF_64_ABS64, 2)
|
||||
RELOC_NUMBER (R_BPF_64_ABS32, 3)
|
||||
-/* R_BPF_64_NODYLD32 is not used by GNU tools.
|
||||
- * It is kept in this file to remind that the value is already taken. */
|
||||
+/* R_BPF_64_NODYLD32 is not used by GNU tools - but it is generated by LLVM.
|
||||
+ It is kept in this file to remind that the value is already taken. */
|
||||
RELOC_NUMBER (R_BPF_64_NODYLD32, 4)
|
||||
RELOC_NUMBER (R_BPF_64_32, 10)
|
||||
END_RELOC_NUMBERS (R_BPF_max)
|
||||
@ -0,0 +1,155 @@
|
||||
--- binutils.orig/gas/dw2gencfi.c 2022-09-08 13:54:05.539276706 +0100
|
||||
+++ binutils-2.35.2/gas/dw2gencfi.c 2022-09-08 14:05:56.128016840 +0100
|
||||
@@ -2054,6 +2054,64 @@ output_fde (struct fde_entry *fde, struc
|
||||
symbol_set_value_now (end_address);
|
||||
}
|
||||
|
||||
+/* Allow these insns to be put in the initial sequence of a CIE.
|
||||
+ If J is non-NULL, then compare I and J insns for a match. */
|
||||
+
|
||||
+static inline bfd_boolean
|
||||
+initial_cie_insn (const struct cfi_insn_data *i, const struct cfi_insn_data *j)
|
||||
+{
|
||||
+ if (j && i->insn != j->insn)
|
||||
+ return FALSE;
|
||||
+
|
||||
+ switch (i->insn)
|
||||
+ {
|
||||
+ case DW_CFA_offset:
|
||||
+ case DW_CFA_def_cfa:
|
||||
+ case DW_CFA_val_offset:
|
||||
+ if (j)
|
||||
+ {
|
||||
+ if (i->u.ri.reg != j->u.ri.reg)
|
||||
+ return FALSE;
|
||||
+ if (i->u.ri.offset != j->u.ri.offset)
|
||||
+ return FALSE;
|
||||
+ }
|
||||
+ break;
|
||||
+
|
||||
+ case DW_CFA_register:
|
||||
+ if (j)
|
||||
+ {
|
||||
+ if (i->u.rr.reg1 != j->u.rr.reg1)
|
||||
+ return FALSE;
|
||||
+ if (i->u.rr.reg2 != j->u.rr.reg2)
|
||||
+ return FALSE;
|
||||
+ }
|
||||
+ break;
|
||||
+
|
||||
+ case DW_CFA_def_cfa_register:
|
||||
+ case DW_CFA_restore:
|
||||
+ case DW_CFA_undefined:
|
||||
+ case DW_CFA_same_value:
|
||||
+ if (j)
|
||||
+ {
|
||||
+ if (i->u.r != j->u.r)
|
||||
+ return FALSE;
|
||||
+ }
|
||||
+ break;
|
||||
+
|
||||
+ case DW_CFA_def_cfa_offset:
|
||||
+ if (j)
|
||||
+ {
|
||||
+ if (i->u.i != j->u.i)
|
||||
+ return FALSE;
|
||||
+ }
|
||||
+ break;
|
||||
+
|
||||
+ default:
|
||||
+ return FALSE;
|
||||
+ }
|
||||
+ return TRUE;
|
||||
+}
|
||||
+
|
||||
static struct cie_entry *
|
||||
select_cie_for_fde (struct fde_entry *fde, bfd_boolean eh_frame,
|
||||
struct cfi_insn_data **pfirst, int align)
|
||||
@@ -2099,71 +2157,15 @@ select_cie_for_fde (struct fde_entry *fd
|
||||
i != cie->last && j != NULL;
|
||||
i = i->next, j = j->next)
|
||||
{
|
||||
- if (i->insn != j->insn)
|
||||
- goto fail;
|
||||
- switch (i->insn)
|
||||
- {
|
||||
- case DW_CFA_advance_loc:
|
||||
- case DW_CFA_remember_state:
|
||||
- /* We reached the first advance/remember in the FDE,
|
||||
- but did not reach the end of the CIE list. */
|
||||
- goto fail;
|
||||
-
|
||||
- case DW_CFA_offset:
|
||||
- case DW_CFA_def_cfa:
|
||||
- if (i->u.ri.reg != j->u.ri.reg)
|
||||
- goto fail;
|
||||
- if (i->u.ri.offset != j->u.ri.offset)
|
||||
- goto fail;
|
||||
- break;
|
||||
-
|
||||
- case DW_CFA_register:
|
||||
- if (i->u.rr.reg1 != j->u.rr.reg1)
|
||||
- goto fail;
|
||||
- if (i->u.rr.reg2 != j->u.rr.reg2)
|
||||
- goto fail;
|
||||
- break;
|
||||
-
|
||||
- case DW_CFA_def_cfa_register:
|
||||
- case DW_CFA_restore:
|
||||
- case DW_CFA_undefined:
|
||||
- case DW_CFA_same_value:
|
||||
- if (i->u.r != j->u.r)
|
||||
- goto fail;
|
||||
- break;
|
||||
-
|
||||
- case DW_CFA_def_cfa_offset:
|
||||
- if (i->u.i != j->u.i)
|
||||
- goto fail;
|
||||
- break;
|
||||
-
|
||||
- case CFI_escape:
|
||||
- case CFI_val_encoded_addr:
|
||||
- case CFI_label:
|
||||
- /* Don't bother matching these for now. */
|
||||
- goto fail;
|
||||
-
|
||||
- default:
|
||||
- abort ();
|
||||
- }
|
||||
+ if (!initial_cie_insn (i, j))
|
||||
+ break;
|
||||
}
|
||||
|
||||
- /* Success if we reached the end of the CIE list, and we've either
|
||||
- run out of FDE entries or we've encountered an advance,
|
||||
- remember, or escape. */
|
||||
- if (i == cie->last
|
||||
- && (!j
|
||||
- || j->insn == DW_CFA_advance_loc
|
||||
- || j->insn == DW_CFA_remember_state
|
||||
- || j->insn == CFI_escape
|
||||
- || j->insn == CFI_val_encoded_addr
|
||||
- || j->insn == CFI_label))
|
||||
+ if (i == cie->last)
|
||||
{
|
||||
*pfirst = j;
|
||||
return cie;
|
||||
}
|
||||
-
|
||||
- fail:;
|
||||
}
|
||||
|
||||
cie = XNEW (struct cie_entry);
|
||||
@@ -2181,11 +2183,7 @@ select_cie_for_fde (struct fde_entry *fd
|
||||
#endif
|
||||
|
||||
for (i = cie->first; i ; i = i->next)
|
||||
- if (i->insn == DW_CFA_advance_loc
|
||||
- || i->insn == DW_CFA_remember_state
|
||||
- || i->insn == CFI_escape
|
||||
- || i->insn == CFI_val_encoded_addr
|
||||
- || i->insn == CFI_label)
|
||||
+ if (!initial_cie_insn (i, NULL))
|
||||
break;
|
||||
|
||||
cie->last = i;
|
||||
@ -0,0 +1,15 @@
|
||||
--- binutils.orig/gold/fileread.cc 2019-08-06 14:22:08.669313110 +0100
|
||||
+++ binutils-2.32/gold/fileread.cc 2019-08-06 14:22:28.799177543 +0100
|
||||
@@ -381,6 +381,12 @@ File_read::do_read(off_t start, section_
|
||||
ssize_t bytes;
|
||||
if (this->whole_file_view_ != NULL)
|
||||
{
|
||||
+ // See PR 23765 for an example of a testcase that triggers this error.
|
||||
+ if (((ssize_t) start) < 0)
|
||||
+ gold_fatal(_("%s: read failed, starting offset (%#llx) less than zero"),
|
||||
+ this->filename().c_str(),
|
||||
+ static_cast<long long>(start));
|
||||
+
|
||||
bytes = this->size_ - start;
|
||||
if (static_cast<section_size_type>(bytes) >= size)
|
||||
{
|
||||
@ -0,0 +1,53 @@
|
||||
diff -rup binutils.orig/bfd/elf.c binutils-2.35/bfd/elf.c
|
||||
--- binutils.orig/bfd/elf.c 2021-04-19 10:49:21.757290990 +0100
|
||||
+++ binutils-2.35/bfd/elf.c 2021-04-19 10:50:28.309839285 +0100
|
||||
@@ -12534,7 +12534,9 @@ _bfd_elf_slurp_secondary_reloc_section (
|
||||
Elf_Internal_Shdr * hdr = & elf_section_data (relsec)->this_hdr;
|
||||
|
||||
if (hdr->sh_type == SHT_SECONDARY_RELOC
|
||||
- && hdr->sh_info == (unsigned) elf_section_data (sec)->this_idx)
|
||||
+ && hdr->sh_info == (unsigned) elf_section_data (sec)->this_idx
|
||||
+ && (hdr->sh_entsize == ebd->s->sizeof_rel
|
||||
+ || hdr->sh_entsize == ebd->s->sizeof_rela))
|
||||
{
|
||||
bfd_byte * native_relocs;
|
||||
bfd_byte * native_reloc;
|
||||
diff -rup binutils.orig/bfd/elfcode.h binutils-2.35/bfd/elfcode.h
|
||||
--- binutils.orig/bfd/elfcode.h 2021-04-19 10:49:21.767290922 +0100
|
||||
+++ binutils-2.35/bfd/elfcode.h 2021-04-19 10:52:22.196066303 +0100
|
||||
@@ -568,7 +568,7 @@ elf_object_p (bfd *abfd)
|
||||
|
||||
/* If this is a relocatable file and there is no section header
|
||||
table, then we're hosed. */
|
||||
- if (i_ehdrp->e_shoff == 0 && i_ehdrp->e_type == ET_REL)
|
||||
+ if (i_ehdrp->e_shoff < sizeof (x_ehdr) && i_ehdrp->e_type == ET_REL)
|
||||
goto got_wrong_format_error;
|
||||
|
||||
/* As a simple sanity check, verify that what BFD thinks is the
|
||||
@@ -578,7 +578,7 @@ elf_object_p (bfd *abfd)
|
||||
goto got_wrong_format_error;
|
||||
|
||||
/* Further sanity check. */
|
||||
- if (i_ehdrp->e_shoff == 0 && i_ehdrp->e_shnum != 0)
|
||||
+ if (i_ehdrp->e_shoff < sizeof (x_ehdr) && i_ehdrp->e_shnum != 0)
|
||||
goto got_wrong_format_error;
|
||||
|
||||
ebd = get_elf_backend_data (abfd);
|
||||
@@ -615,7 +615,7 @@ elf_object_p (bfd *abfd)
|
||||
&& ebd->elf_osabi != ELFOSABI_NONE)
|
||||
goto got_wrong_format_error;
|
||||
|
||||
- if (i_ehdrp->e_shoff != 0)
|
||||
+ if (i_ehdrp->e_shoff >= sizeof (x_ehdr))
|
||||
{
|
||||
file_ptr where = (file_ptr) i_ehdrp->e_shoff;
|
||||
|
||||
@@ -807,7 +807,7 @@ elf_object_p (bfd *abfd)
|
||||
}
|
||||
}
|
||||
|
||||
- if (i_ehdrp->e_shstrndx != 0 && i_ehdrp->e_shoff != 0)
|
||||
+ if (i_ehdrp->e_shstrndx != 0 && i_ehdrp->e_shoff >= sizeof (x_ehdr))
|
||||
{
|
||||
unsigned int num_sec;
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,58 @@
|
||||
diff -rup binutils.orig/bfd/elf-bfd.h binutils-2.35.1/bfd/elf-bfd.h
|
||||
--- binutils.orig/bfd/elf-bfd.h 2021-03-12 12:20:04.495125388 +0000
|
||||
+++ binutils-2.35.1/bfd/elf-bfd.h 2021-03-12 12:21:25.696583280 +0000
|
||||
@@ -1562,7 +1562,7 @@ struct elf_backend_data
|
||||
const char *, unsigned int);
|
||||
|
||||
/* Called when after loading the normal relocs for a section. */
|
||||
- bfd_boolean (*slurp_secondary_relocs) (bfd *, asection *, asymbol **);
|
||||
+ bfd_boolean (*slurp_secondary_relocs) (bfd *, asection *, asymbol **, bfd_boolean);
|
||||
|
||||
/* Called after writing the normal relocs for a section. */
|
||||
bfd_boolean (*write_secondary_relocs) (bfd *, asection *);
|
||||
@@ -2909,7 +2909,7 @@ extern bfd_boolean is_debuginfo_file (bf
|
||||
extern bfd_boolean _bfd_elf_init_secondary_reloc_section
|
||||
(bfd *, Elf_Internal_Shdr *, const char *, unsigned int);
|
||||
extern bfd_boolean _bfd_elf_slurp_secondary_reloc_section
|
||||
- (bfd *, asection *, asymbol **);
|
||||
+(bfd *, asection *, asymbol **, bfd_boolean);
|
||||
extern bfd_boolean _bfd_elf_copy_special_section_fields
|
||||
(const bfd *, bfd *, const Elf_Internal_Shdr *, Elf_Internal_Shdr *);
|
||||
extern bfd_boolean _bfd_elf_write_secondary_reloc_section
|
||||
diff -rup binutils.orig/bfd/elf.c binutils-2.35.1/bfd/elf.c
|
||||
--- binutils.orig/bfd/elf.c 2021-03-12 12:20:04.496125381 +0000
|
||||
+++ binutils-2.35.1/bfd/elf.c 2021-03-12 12:20:46.032848074 +0000
|
||||
@@ -12513,7 +12513,8 @@ _bfd_elf_init_secondary_reloc_section (b
|
||||
bfd_boolean
|
||||
_bfd_elf_slurp_secondary_reloc_section (bfd * abfd,
|
||||
asection * sec,
|
||||
- asymbol ** symbols)
|
||||
+ asymbol ** symbols,
|
||||
+ bfd_boolean dynamic)
|
||||
{
|
||||
const struct elf_backend_data * const ebd = get_elf_backend_data (abfd);
|
||||
asection * relsec;
|
||||
@@ -12590,7 +12591,10 @@ _bfd_elf_slurp_secondary_reloc_section (
|
||||
continue;
|
||||
}
|
||||
|
||||
- symcount = bfd_get_symcount (abfd);
|
||||
+ if (dynamic)
|
||||
+ symcount = bfd_get_dynamic_symcount (abfd);
|
||||
+ else
|
||||
+ symcount = bfd_get_symcount (abfd);
|
||||
|
||||
for (i = 0, internal_reloc = internal_relocs,
|
||||
native_reloc = native_relocs;
|
||||
diff -rup binutils.orig/bfd/elfcode.h binutils-2.35.1/bfd/elfcode.h
|
||||
--- binutils.orig/bfd/elfcode.h 2021-03-12 12:20:04.533125134 +0000
|
||||
+++ binutils-2.35.1/bfd/elfcode.h 2021-03-12 12:21:59.568357132 +0000
|
||||
@@ -1591,7 +1591,7 @@ elf_slurp_reloc_table (bfd *abfd,
|
||||
symbols, dynamic))
|
||||
return FALSE;
|
||||
|
||||
- if (!bed->slurp_secondary_relocs (abfd, asect, symbols))
|
||||
+ if (!bed->slurp_secondary_relocs (abfd, asect, symbols, dynamic))
|
||||
return FALSE;
|
||||
|
||||
asect->relocation = relents;
|
||||
@ -0,0 +1,34 @@
|
||||
--- binutils.orig/bfd/dwarf2.c 2021-04-09 16:59:18.345187116 +0100
|
||||
+++ binutils-2.35/bfd/dwarf2.c 2021-04-09 17:02:03.614064723 +0100
|
||||
@@ -539,6 +539,8 @@ read_section (bfd * abfd,
|
||||
/* The section may have already been read. */
|
||||
if (contents == NULL)
|
||||
{
|
||||
+ ufile_ptr filesize;
|
||||
+
|
||||
msec = bfd_get_section_by_name (abfd, section_name);
|
||||
if (! msec)
|
||||
{
|
||||
@@ -554,10 +556,20 @@ read_section (bfd * abfd,
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
- *section_size = msec->rawsize ? msec->rawsize : msec->size;
|
||||
+ amt = bfd_get_section_limit_octets (abfd, msec);
|
||||
+ filesize = bfd_get_file_size (abfd);
|
||||
+ if (amt >= filesize)
|
||||
+ {
|
||||
+ /* PR 26946 */
|
||||
+ _bfd_error_handler (_("DWARF error: section %s is larger than its filesize! (0x%lx vs 0x%lx)"),
|
||||
+ section_name, (long) amt, (long) filesize);
|
||||
+ bfd_set_error (bfd_error_bad_value);
|
||||
+ return FALSE;
|
||||
+ }
|
||||
+ *section_size = amt;
|
||||
/* Paranoia - alloc one extra so that we can make sure a string
|
||||
section is NUL terminated. */
|
||||
- amt = *section_size + 1;
|
||||
+ amt += 1;
|
||||
if (amt == 0)
|
||||
{
|
||||
bfd_set_error (bfd_error_no_memory);
|
||||
@ -0,0 +1,34 @@
|
||||
--- binutils.orig/binutils/objdump.c 2023-03-03 11:37:39.209614222 +0000
|
||||
+++ binutils-2.35.2/binutils/objdump.c 2023-03-03 11:39:45.492428807 +0000
|
||||
@@ -1090,20 +1090,19 @@ compare_symbols (const void *ap, const v
|
||||
return 1;
|
||||
}
|
||||
|
||||
- if (bfd_get_flavour (bfd_asymbol_bfd (a)) == bfd_target_elf_flavour
|
||||
+ /* Sort larger size ELF symbols before smaller. See PR20337. */
|
||||
+ bfd_vma asz = 0;
|
||||
+ if ((a->flags & (BSF_SECTION_SYM | BSF_SYNTHETIC)) == 0
|
||||
+ && bfd_get_flavour (bfd_asymbol_bfd (a)) == bfd_target_elf_flavour)
|
||||
+ asz = ((elf_symbol_type *) a)->internal_elf_sym.st_size;
|
||||
+
|
||||
+ bfd_vma bsz = 0;
|
||||
+ if ((b->flags & (BSF_SECTION_SYM | BSF_SYNTHETIC)) == 0
|
||||
&& bfd_get_flavour (bfd_asymbol_bfd (b)) == bfd_target_elf_flavour)
|
||||
- {
|
||||
- bfd_vma asz, bsz;
|
||||
+ bsz = ((elf_symbol_type *) b)->internal_elf_sym.st_size;
|
||||
|
||||
- asz = 0;
|
||||
- if ((a->flags & (BSF_SECTION_SYM | BSF_SYNTHETIC)) == 0)
|
||||
- asz = ((elf_symbol_type *) a)->internal_elf_sym.st_size;
|
||||
- bsz = 0;
|
||||
- if ((b->flags & (BSF_SECTION_SYM | BSF_SYNTHETIC)) == 0)
|
||||
- bsz = ((elf_symbol_type *) b)->internal_elf_sym.st_size;
|
||||
- if (asz != bsz)
|
||||
- return asz > bsz ? -1 : 1;
|
||||
- }
|
||||
+ if (asz != bsz)
|
||||
+ return asz > bsz ? -1 : 1;
|
||||
|
||||
/* Symbols that start with '.' might be section names, so sort them
|
||||
after symbols that don't start with '.'. */
|
||||
@ -0,0 +1,11 @@
|
||||
--- binutils.orig/bfd/dwarf2.c 2021-05-18 12:00:10.363028020 +0100
|
||||
+++ binutils-2.35.2/bfd/dwarf2.c 2021-05-18 12:01:09.930831909 +0100
|
||||
@@ -1194,7 +1194,7 @@ read_attribute_value (struct attribute *
|
||||
case DW_FORM_ref_addr:
|
||||
/* DW_FORM_ref_addr is an address in DWARF2, and an offset in
|
||||
DWARF3. */
|
||||
- if (unit->version == 3 || unit->version == 4)
|
||||
+ if (unit->version >= 3)
|
||||
{
|
||||
if (unit->offset_size == 4)
|
||||
attr->u.val = read_4_bytes (unit->abfd, info_ptr, info_ptr_end);
|
||||
@ -1,871 +0,0 @@
|
||||
diff -rupN binutils.orig/opcodes/i386-dis.c binutils-2.41/opcodes/i386-dis.c
|
||||
--- binutils.orig/opcodes/i386-dis.c 2024-02-12 15:55:21.578572835 +0000
|
||||
+++ binutils-2.41/opcodes/i386-dis.c 2024-02-12 15:56:38.828623964 +0000
|
||||
@@ -8824,6 +8824,8 @@ get_valid_dis386 (const struct dis386 *d
|
||||
break;
|
||||
|
||||
case USE_3BYTE_TABLE:
|
||||
+ if (ins->last_rex2_prefix >= 0)
|
||||
+ return &err_opcode;
|
||||
if (!fetch_code (ins->info, ins->codep + 2))
|
||||
return &err_opcode;
|
||||
vindex = *ins->codep++;
|
||||
@@ -9540,8 +9542,6 @@ print_insn (bfd_vma pc, disassemble_info
|
||||
/* REX2.M in rex2 prefix represents map0 or map1. */
|
||||
if (ins.last_rex2_prefix < 0 ? *ins.codep == 0x0f : (ins.rex2 & REX2_M))
|
||||
{
|
||||
- unsigned char threebyte;
|
||||
-
|
||||
if (!ins.rex2)
|
||||
{
|
||||
ins.codep++;
|
||||
@@ -9549,17 +9549,15 @@ print_insn (bfd_vma pc, disassemble_info
|
||||
goto fetch_error_out;
|
||||
}
|
||||
|
||||
- threebyte = *ins.codep;
|
||||
- dp = &dis386_twobyte[threebyte];
|
||||
- ins.need_modrm = twobyte_has_modrm[threebyte];
|
||||
- ins.codep++;
|
||||
+ dp = &dis386_twobyte[*ins.codep];
|
||||
+ ins.need_modrm = twobyte_has_modrm[*ins.codep];
|
||||
}
|
||||
else
|
||||
{
|
||||
dp = &dis386[*ins.codep];
|
||||
ins.need_modrm = onebyte_has_modrm[*ins.codep];
|
||||
- ins.codep++;
|
||||
}
|
||||
+ ins.codep++;
|
||||
|
||||
/* Save sizeflag for printing the extra ins.prefixes later before updating
|
||||
it for mnemonic and operand processing. The prefix names depend
|
||||
diff -rupN binutils.orig/opcodes/i386-opc.tbl binutils-2.41/opcodes/i386-opc.tbl
|
||||
--- binutils.orig/opcodes/i386-opc.tbl 2024-02-12 15:55:21.578572835 +0000
|
||||
+++ binutils-2.41/opcodes/i386-opc.tbl 2024-02-12 15:56:28.955616704 +0000
|
||||
@@ -1586,7 +1586,9 @@ vandnp<sd>, 0x<sd:ppfx>55, AVX, Modrm|Ve
|
||||
vandp<sd>, 0x<sd:ppfx>54, AVX, Modrm|C|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
|
||||
vblendp<sd>, 0x660c | <sd:opc>, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
|
||||
vblendvp<sd>, 0x664a | <sd:opc>, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
|
||||
-vbroadcastf128, 0x661a, AVX, Modrm|Vex=2|Space0F38|VexW=1|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
|
||||
+vbroadcastf128, 0x661a, AVX, Modrm|Vex256|Space0F38|VexW0|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
|
||||
+// vbroadcastf32x4 in disguise (see vround{p,s}{s,d} comment)
|
||||
+vbroadcastf128, 0x661a, APX_F&AVX512VL, Modrm|EVex256|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
|
||||
vbroadcastsd, 0x6619, AVX, Modrm|Vex256|Space0F38|VexW0|NoSuf, { Qword|Unspecified|BaseIndex, RegYMM }
|
||||
vbroadcastss, 0x6618, AVX, Modrm|Vex128|Space0F38|VexW0|NoSuf, { Dword|Unspecified|BaseIndex, RegXMM|RegYMM }
|
||||
vcmp<frel>p<sd>, 0x<sd:ppfx>c2/0x<frel:imm>, AVX, Modrm|<frel:comm>|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf|ImmExt, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
|
||||
@@ -1614,7 +1616,9 @@ vdivp<sd>, 0x<sd:ppfx>5e, AVX, Modrm|Vex
|
||||
vdivs<sd>, 0x<sd:spfx>5e, AVX, Modrm|VexLIG|Space0F|VexVVVV|VexWIG|NoSuf, { <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
|
||||
vdppd, 0x6641, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
|
||||
vdpps, 0x6640, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
|
||||
-vextractf128, 0x6619, AVX, Modrm|Vex=2|Space0F3A|VexW=1|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
|
||||
+vextractf128, 0x6619, AVX, Modrm|Vex256|Space0F3A|VexW0|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
|
||||
+// vextractf32x4 in disguise (see vround{p,s}{s,d} comment)
|
||||
+vextractf128, 0x6619, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexW0|Disp8MemShift=4|NoSuf, { Imm8, RegYMM, Xmmword|Unspecified|BaseIndex }
|
||||
vextractps, 0x6617, AVX|AVX512F, Modrm|Vex128|EVex128|Space0F3A|VexWIG|Disp8MemShift=2|NoSuf, { Imm8, RegXMM, Reg32|Unspecified|BaseIndex }
|
||||
vextractps, 0x6617, x64&(AVX|AVX512F), RegMem|Vex128|EVex128|Space0F3A|VexWIG|NoSuf, { Imm8, RegXMM, Reg64 }
|
||||
vhaddpd, 0x667c, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
|
||||
@@ -1622,6 +1626,8 @@ vhaddps, 0xf27c, AVX, Modrm|Vex|Space0F|
|
||||
vhsubpd, 0x667d, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
|
||||
vhsubps, 0xf27d, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
|
||||
vinsertf128, 0x6618, AVX, Modrm|Vex256|Space0F3A|VexVVVV|VexW0|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegYMM, RegYMM }
|
||||
+// vinsertf32x4 in disguise (see vround{p,s}{s,d} comment)
|
||||
+vinsertf128, 0x6618, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexVVVV|VexW0|Disp8MemShift=4|NoSuf, { Imm8, Xmmword|Unspecified|BaseIndex, RegYMM, RegYMM }
|
||||
vinsertps, 0x6621, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8, Dword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
|
||||
vlddqu, 0xf2f0, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM }
|
||||
vldmxcsr, 0xae/2, AVX, Modrm|Vex128|Space0F|VexWIG|NoSuf, { Dword|Unspecified|BaseIndex }
|
||||
@@ -1792,8 +1798,8 @@ vroundp<sd>, 0x6608 | <sd:opc>, AVX, Mod
|
||||
vrounds<sd>, 0x660a | <sd:opc>, AVX, Modrm|VexLIG|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8, <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
|
||||
// These are really clones of VRNDSCALE{P,S}{S,D}, with broadcast, masking, SAE,
|
||||
// 512-bit operand size, and register sources dropped.
|
||||
-vroundp<sd>, 0x6608 | <sd:opc>, APX_F, Modrm|Space0F3A|<sd:vexw>|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM }
|
||||
-vrounds<sd>, 0x660a | <sd:opc>, APX_F, Modrm|EVexLIG|Space0F3A|VexVVVV|<sd:vexw>|Disp8MemShift|NoSuf, { Imm8, <sd:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
|
||||
+vroundp<sd>, 0x6608 | <sd:opc>, APX_F&AVX512VL, Modrm|Space0F3A|<sd:vexw>|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM }
|
||||
+vrounds<sd>, 0x660a | <sd:opc>, APX_F&AVX512F, Modrm|EVexLIG|Space0F3A|VexVVVV|<sd:vexw>|Disp8MemShift|NoSuf, { Imm8, <sd:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
|
||||
vrsqrtps, 0x52, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
|
||||
vrsqrtss, 0xf352, AVX, Modrm|Vex=3|Space0F|VexVVVV|VexWIG|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
|
||||
vshufp<sd>, 0x<sd:ppfx>c6, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
|
||||
@@ -1828,7 +1834,9 @@ vpmovzxwq, 0x6634, AVX2|AVX512VL, Modrm|
|
||||
|
||||
// New AVX2 instructions.
|
||||
|
||||
-vbroadcasti128, 0x665A, AVX2, Modrm|Vex=2|Space0F38|VexW=1|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
|
||||
+vbroadcasti128, 0x665A, AVX2, Modrm|Vex256|Space0F38|VexW0|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
|
||||
+// vbroadcasti32x4 in disguise (see vround{p,s}{s,d} comment)
|
||||
+vbroadcasti128, 0x665a, APX_F&AVX512VL, Modrm|EVex256|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
|
||||
vbroadcastsd, 0x6619, AVX2, Modrm|Vex=2|Space0F38|VexW=1|NoSuf, { RegXMM, RegYMM }
|
||||
vbroadcastss, 0x6618, AVX2|AVX512F, Modrm|Vex|EVexDYN|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
|
||||
vpblendd, 0x6602, AVX2, Modrm|Vex|Space0F3A|VexVVVV|VexW0|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
|
||||
@@ -1840,8 +1848,12 @@ vpermd, 0x6636, AVX2|AVX512F, Modrm|Vex2
|
||||
vpermpd, 0x6601, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F3A|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegYMM|RegZMM }
|
||||
vpermps, 0x6616, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F38|VexVVVV|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegYMM|RegZMM, RegYMM|RegZMM }
|
||||
vpermq, 0x6600, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F3A|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegYMM|RegZMM }
|
||||
-vextracti128, 0x6639, AVX2, Modrm|Vex=2|Space0F3A|VexW=1|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
|
||||
+vextracti128, 0x6639, AVX2, Modrm|Vex256|Space0F3A|VexW0|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
|
||||
+// vextracti32x4 in disguise (see vround{p,s}{s,d} comment)
|
||||
+vextracti128, 0x6639, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexW0|Disp8MemShift=4|NoSuf, { Imm8, RegYMM, Xmmword|Unspecified|BaseIndex }
|
||||
vinserti128, 0x6638, AVX2, Modrm|Vex256|Space0F3A|VexVVVV|VexW0|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegYMM, RegYMM }
|
||||
+// vinserti32x4 in disguise (see vround{p,s}{s,d} comment)
|
||||
+vinserti128, 0x6638, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexVVVV|VexW0|Disp8MemShift=4|NoSuf, { Imm8, Xmmword|Unspecified|BaseIndex, RegYMM, RegYMM }
|
||||
vpmaskmov<dq>, 0x668e, AVX2, Modrm|Vex|Space0F38|VexVVVV|<dq:vexw>|CheckOperandSize|NoSuf, { RegXMM|RegYMM, RegXMM|RegYMM, Xmmword|Ymmword|Unspecified|BaseIndex }
|
||||
vpmaskmov<dq>, 0x668c, AVX2, Modrm|Vex|Space0F38|VexVVVV|<dq:vexw>|CheckOperandSize|NoSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
|
||||
vpsllv<dq>, 0x6647, AVX2|AVX512F, Modrm|Vex|EVexDYN|Masking|Space0F38|VexVVVV|<dq:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|<dq:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
|
||||
@@ -2115,12 +2127,12 @@ xcryptofb, 0xf30fa7e8, PadLock, NoSuf|Re
|
||||
xstore, 0xfa7c0, PadLock, NoSuf|RepPrefixOk, {}
|
||||
|
||||
// Multy-precision Add Carry, rdseed instructions.
|
||||
-adcx, 0x6666, ADX&APX_F, C|Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|DstVVVV|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
|
||||
+adcx, 0x6666, ADX&APX_F, C|Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|DstVVVV|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
|
||||
adcx, 0x660f38f6, ADX, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
|
||||
-adcx, 0x6666, ADX&APX_F, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
|
||||
-adox, 0xf366, ADX&APX_F, C|Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|DstVVVV|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
|
||||
+adcx, 0x6666, ADX&APX_F, Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
|
||||
+adox, 0xf366, ADX&APX_F, C|Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|DstVVVV|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
|
||||
adox, 0xf30f38f6, ADX, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
|
||||
-adox, 0xf366, ADX&APX_F, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
|
||||
+adox, 0xf366, ADX&APX_F, Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
|
||||
rdseed, 0xfc7/7, RdSeed, Modrm|NoSuf, { Reg16|Reg32|Reg64 }
|
||||
|
||||
// SMAP instructions.
|
||||
@@ -3098,11 +3110,11 @@ rdsspq, 0xf30f1e/1, SHSTK&x64, Modrm|NoS
|
||||
saveprevssp, 0xf30f01ea, SHSTK, NoSuf, {}
|
||||
rstorssp, 0xf30f01/5, SHSTK, Modrm|NoSuf, { Qword|Unspecified|BaseIndex }
|
||||
wrssd, 0x0f38f6, SHSTK, Modrm|IgnoreSize|NoSuf, { Reg32, Dword|Unspecified|BaseIndex }
|
||||
-wrssd, 0x66, SHSTK&APX_F, Modrm|IgnoreSize|NoSuf|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex }
|
||||
+wrssd, 0x66, SHSTK&APX_F, Modrm|NoSuf|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex }
|
||||
wrssq, 0x0f38f6, SHSTK&x64, Modrm|NoSuf|Size64, { Reg64, Qword|Unspecified|BaseIndex }
|
||||
wrssq, 0x66, SHSTK&APX_F, Modrm|NoSuf|Size64|EVexMap4, { Reg64, Qword|Unspecified|BaseIndex }
|
||||
wrussd, 0x660f38f5, SHSTK, Modrm|IgnoreSize|NoSuf, { Reg32, Dword|Unspecified|BaseIndex }
|
||||
-wrussd, 0x6665, SHSTK&APX_F, Modrm|IgnoreSize|NoSuf|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex }
|
||||
+wrussd, 0x6665, SHSTK&APX_F, Modrm|NoSuf|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex }
|
||||
wrussq, 0x660f38f5, SHSTK&x64, Modrm|NoSuf, { Reg64, Qword|Unspecified|BaseIndex }
|
||||
wrussq, 0x6665, SHSTK&APX_F, Modrm|NoSuf|EVexMap4, { Reg64, Qword|Unspecified|BaseIndex }
|
||||
setssbsy, 0xf30f01e8, SHSTK, NoSuf, {}
|
||||
@@ -3152,7 +3164,7 @@ cldemote, 0x0f1c/0, CLDEMOTE, Modrm|Anys
|
||||
// MOVDIR[I,64B] instructions.
|
||||
|
||||
movdiri, 0xf38f9, MOVDIRI, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||||
-movdiri, 0xf9, MOVDIRI&APX_F, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||||
+movdiri, 0xf9, MOVDIRI&APX_F, Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||||
movdir64b, 0x660f38f8, MOVDIR64B, Modrm|AddrPrefixOpReg|NoSuf, { Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
|
||||
movdir64b, 0x66f8, MOVDIR64B&APX_F, Modrm|AddrPrefixOpReg|NoSuf|EVexMap4, { Unspecified|BaseIndex, Reg32|Reg64 }
|
||||
|
||||
@@ -3459,13 +3471,13 @@ wrmsrlist, 0xf30f01c6, MSRLIST, NoSuf, {
|
||||
// RAO-INT instructions.
|
||||
|
||||
aadd, 0xf38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||||
-aadd, 0xfc, RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||||
+aadd, 0xfc, RAO_INT&APX_F, Modrm|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||||
aand, 0x660f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||||
-aand, 0x66fc, RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||||
+aand, 0x66fc, RAO_INT&APX_F, Modrm|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||||
aor, 0xf20f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||||
-aor, 0xf2fc, RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||||
+aor, 0xf2fc, RAO_INT&APX_F, Modrm|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||||
axor, 0xf30f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||||
-axor, 0xf3fc, RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||||
+axor, 0xf3fc, RAO_INT&APX_F, Modrm|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
|
||||
|
||||
// RAO-INT instructions end.
|
||||
|
||||
diff -rupN binutils.orig/opcodes/i386-tbl.h binutils-2.41/opcodes/i386-tbl.h
|
||||
--- binutils.orig/opcodes/i386-tbl.h 2024-02-12 15:55:21.578572835 +0000
|
||||
+++ binutils-2.41/opcodes/i386-tbl.h 2024-02-12 16:42:52.494835094 +0000
|
||||
@@ -15372,6 +15372,16 @@ static const insn_template i386_optab[]
|
||||
1, 0, 0, 0, 1, 0 } },
|
||||
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 1, 0, 0, 0, 0 } } } },
|
||||
+ { MN_vbroadcastf128, 0x1a, 2, SPACE_0F38, None,
|
||||
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
|
||||
+ 0 },
|
||||
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
|
||||
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||||
+ { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||||
+ 1, 0, 0, 0, 1, 0 } },
|
||||
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 1, 0, 0, 0, 0 } } } },
|
||||
{ MN_vbroadcastsd, 0x19, 2, SPACE_0F38, None,
|
||||
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 2, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
@@ -20804,6 +20814,18 @@ static const insn_template i386_optab[]
|
||||
0, 1, 0, 0, 0, 0 } },
|
||||
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 0, 0, 1, 0 } } } },
|
||||
+ { MN_vextractf128, 0x19, 3, SPACE_0F3A, None,
|
||||
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
|
||||
+ 0 },
|
||||
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
|
||||
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||||
+ { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 0, 0 } },
|
||||
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 1, 0, 0, 0, 0 } },
|
||||
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||||
+ 1, 0, 0, 0, 1, 0 } } } },
|
||||
{ MN_vextractps, 0x17, 3, SPACE_0F3A, None,
|
||||
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 1, 0, 3, 1, 0, 0, 2, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
|
||||
@@ -20890,6 +20912,20 @@ static const insn_template i386_optab[]
|
||||
0, 1, 0, 0, 0, 0 } },
|
||||
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 1, 0, 0, 0, 0 } } } },
|
||||
+ { MN_vinsertf128, 0x18, 4, SPACE_0F3A, None,
|
||||
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 1, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
|
||||
+ 0 },
|
||||
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
|
||||
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||||
+ { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 0, 0 } },
|
||||
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||||
+ 1, 0, 0, 0, 1, 0 } },
|
||||
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 1, 0, 0, 0, 0 } },
|
||||
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 1, 0, 0, 0, 0 } } } },
|
||||
{ MN_vinsertps, 0x21, 4, SPACE_0F3A, None,
|
||||
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
@@ -25296,7 +25332,7 @@ static const insn_template i386_optab[]
|
||||
{ 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 1, 1, 0, 0, 5, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0,
|
||||
0 },
|
||||
- { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||||
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||||
{ { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } },
|
||||
@@ -25320,7 +25356,7 @@ static const insn_template i386_optab[]
|
||||
{ 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0,
|
||||
0 },
|
||||
- { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||||
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||||
{ { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } },
|
||||
@@ -25346,7 +25382,7 @@ static const insn_template i386_optab[]
|
||||
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
|
||||
0 },
|
||||
- { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||||
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||||
{ { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } },
|
||||
@@ -25374,7 +25410,7 @@ static const insn_template i386_optab[]
|
||||
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 1, 2, 1, 0, 0, 4, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
|
||||
0 },
|
||||
- { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||||
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0 } },
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||||
{ { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } },
|
||||
@@ -25884,6 +25920,16 @@ static const insn_template i386_optab[]
|
||||
1, 0, 0, 0, 1, 0 } },
|
||||
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 1, 0, 0, 0, 0 } } } },
|
||||
+ { MN_vbroadcasti128, 0x5a, 2, SPACE_0F38, None,
|
||||
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
|
||||
+ 0 },
|
||||
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
|
||||
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||||
+ { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||||
+ 1, 0, 0, 0, 1, 0 } },
|
||||
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 1, 0, 0, 0, 0 } } } },
|
||||
{ MN_vpblendd, 0x02, 4, SPACE_0F3A, None,
|
||||
{ 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
@@ -26106,6 +26152,18 @@ static const insn_template i386_optab[]
|
||||
0, 1, 0, 0, 0, 0 } },
|
||||
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||||
1, 0, 0, 0, 1, 0 } } } },
|
||||
+ { MN_vextracti128, 0x39, 3, SPACE_0F3A, None,
|
||||
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
|
||||
+ 0 },
|
||||
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
|
||||
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||||
+ { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 0, 0 } },
|
||||
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 1, 0, 0, 0, 0 } },
|
||||
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||||
+ 1, 0, 0, 0, 1, 0 } } } },
|
||||
{ MN_vinserti128, 0x38, 4, SPACE_0F3A, None,
|
||||
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
@@ -26120,6 +26178,20 @@ static const insn_template i386_optab[]
|
||||
0, 1, 0, 0, 0, 0 } },
|
||||
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 1, 0, 0, 0, 0 } } } },
|
||||
+ { MN_vinserti128, 0x38, 4, SPACE_0F3A, None,
|
||||
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 1, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
|
||||
+ 0 },
|
||||
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
|
||||
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
|
||||
+ { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 0, 0, 0, 0, 0 } },
|
||||
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||||
+ 1, 0, 0, 0, 1, 0 } },
|
||||
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 1, 0, 0, 0, 0 } },
|
||||
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
+ 0, 1, 0, 0, 0, 0 } } } },
|
||||
{ MN_vpmaskmovd, 0x8e, 3, SPACE_0F38, None,
|
||||
{ 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
|
||||
@@ -30933,7 +31005,7 @@ static const insn_template i386_optab[]
|
||||
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
{ MN_adcx, 0x66, 3, SPACE_EVEXMAP4, None,
|
||||
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||||
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 2, 0, 1, 0, 0, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
|
||||
0 },
|
||||
{ { 61, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||||
@@ -30955,7 +31027,7 @@ static const insn_template i386_optab[]
|
||||
{ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
{ MN_adcx, 0x66, 2, SPACE_EVEXMAP4, None,
|
||||
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||||
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0 },
|
||||
{ { 61, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||||
@@ -30965,7 +31037,7 @@ static const insn_template i386_optab[]
|
||||
{ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
{ MN_adox, 0x66, 3, SPACE_EVEXMAP4, None,
|
||||
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||||
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 2, 0, 2, 0, 0, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
|
||||
0 },
|
||||
{ { 61, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||||
@@ -30987,7 +31059,7 @@ static const insn_template i386_optab[]
|
||||
{ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 0, 0, 0, 0 } } } },
|
||||
{ MN_adox, 0x66, 2, SPACE_EVEXMAP4, None,
|
||||
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||||
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 2, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0 },
|
||||
{ { 61, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||||
@@ -37497,7 +37569,7 @@ static const insn_template i386_optab[]
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
|
||||
0, 0, 0, 0, 1, 0 } } } },
|
||||
{ MN_wrssd, 0x66, 2, SPACE_EVEXMAP4, None,
|
||||
- { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0 },
|
||||
{ { 105, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||||
@@ -37537,7 +37609,7 @@ static const insn_template i386_optab[]
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
|
||||
0, 0, 0, 0, 1, 0 } } } },
|
||||
{ MN_wrussd, 0x65, 2, SPACE_EVEXMAP4, None,
|
||||
- { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0 },
|
||||
{ { 105, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||||
@@ -37697,7 +37769,7 @@ static const insn_template i386_optab[]
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 0, 0, 1, 0 } } } },
|
||||
{ MN_movdiri, 0xf9, 2, SPACE_EVEXMAP4, None,
|
||||
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||||
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0 },
|
||||
{ { 120, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||||
@@ -41093,7 +41165,7 @@ static const insn_template i386_optab[]
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 0, 0, 1, 0 } } } },
|
||||
{ MN_aadd, 0xfc, 2, SPACE_EVEXMAP4, None,
|
||||
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0 },
|
||||
{ { 95, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||||
@@ -41113,7 +41185,7 @@ static const insn_template i386_optab[]
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 0, 0, 1, 0 } } } },
|
||||
{ MN_aand, 0xfc, 2, SPACE_EVEXMAP4, None,
|
||||
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0 },
|
||||
{ { 95, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||||
@@ -41133,7 +41205,7 @@ static const insn_template i386_optab[]
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 0, 0, 1, 0 } } } },
|
||||
{ MN_aor, 0xfc, 2, SPACE_EVEXMAP4, None,
|
||||
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 3, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0 },
|
||||
{ { 95, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||||
@@ -41153,7 +41225,7 @@ static const insn_template i386_optab[]
|
||||
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
|
||||
0, 0, 0, 0, 1, 0 } } } },
|
||||
{ MN_axor, 0xfc, 2, SPACE_EVEXMAP4, None,
|
||||
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 2, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
|
||||
0 },
|
||||
{ { 95, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
|
||||
@@ -41398,203 +41470,203 @@ static const i386_op_off_t i386_op_sets[
|
||||
1540, 1541, 1542, 1544, 1546, 1548, 1550, 1552,
|
||||
1554, 1556, 1558, 1560, 1562, 1564, 1566, 1568,
|
||||
1570, 1572, 1574, 1576, 1578, 1579, 1580, 1582,
|
||||
- 1584, 1586, 1588, 1589, 1590, 1591, 1592, 1593,
|
||||
- 1596, 1598, 1600, 1602, 1604, 1606, 1608, 1610,
|
||||
- 1612, 1614, 1616, 1618, 1620, 1622, 1624, 1626,
|
||||
- 1628, 1630, 1632, 1634, 1636, 1638, 1640, 1642,
|
||||
- 1644, 1646, 1648, 1650, 1652, 1654, 1656, 1658,
|
||||
- 1660, 1662, 1664, 1666, 1668, 1670, 1672, 1674,
|
||||
- 1676, 1678, 1680, 1682, 1684, 1686, 1688, 1690,
|
||||
- 1692, 1694, 1696, 1698, 1700, 1702, 1704, 1706,
|
||||
- 1708, 1710, 1712, 1714, 1716, 1718, 1720, 1722,
|
||||
- 1724, 1726, 1728, 1730, 1732, 1734, 1736, 1738,
|
||||
- 1740, 1742, 1744, 1746, 1748, 1750, 1752, 1754,
|
||||
- 1756, 1758, 1760, 1762, 1764, 1766, 1768, 1770,
|
||||
- 1772, 1774, 1776, 1778, 1780, 1782, 1784, 1786,
|
||||
- 1788, 1790, 1792, 1794, 1796, 1798, 1800, 1802,
|
||||
- 1804, 1806, 1808, 1810, 1812, 1814, 1816, 1818,
|
||||
- 1820, 1822, 1824, 1826, 1828, 1830, 1832, 1834,
|
||||
- 1836, 1838, 1840, 1842, 1844, 1846, 1848, 1850,
|
||||
- 1852, 1854, 1856, 1858, 1860, 1862, 1864, 1866,
|
||||
- 1868, 1870, 1872, 1874, 1876, 1878, 1880, 1882,
|
||||
- 1884, 1886, 1888, 1890, 1892, 1894, 1896, 1898,
|
||||
- 1900, 1902, 1904, 1906, 1908, 1910, 1912, 1914,
|
||||
- 1916, 1918, 1920, 1922, 1924, 1926, 1928, 1930,
|
||||
- 1932, 1934, 1936, 1938, 1940, 1942, 1944, 1946,
|
||||
- 1948, 1950, 1952, 1954, 1956, 1958, 1960, 1962,
|
||||
- 1964, 1966, 1968, 1970, 1972, 1974, 1976, 1978,
|
||||
- 1983, 1985, 1990, 1992, 1994, 1999, 2001, 2003,
|
||||
- 2005, 2010, 2012, 2014, 2016, 2020, 2026, 2028,
|
||||
- 2033, 2035, 2037, 2039, 2041, 2043, 2045, 2047,
|
||||
- 2049, 2051, 2052, 2053, 2054, 2056, 2057, 2058,
|
||||
- 2059, 2060, 2061, 2063, 2064, 2065, 2066, 2068,
|
||||
- 2070, 2072, 2074, 2076, 2078, 2080, 2082, 2084,
|
||||
- 2086, 2088, 2090, 2092, 2096, 2097, 2098, 2100,
|
||||
- 2104, 2108, 2110, 2114, 2118, 2119, 2120, 2122,
|
||||
- 2124, 2126, 2128, 2133, 2137, 2141, 2143, 2145,
|
||||
- 2147, 2149, 2150, 2152, 2154, 2156, 2158, 2160,
|
||||
- 2162, 2164, 2166, 2168, 2170, 2172, 2174, 2176,
|
||||
- 2178, 2180, 2182, 2184, 2186, 2188, 2190, 2192,
|
||||
- 2194, 2195, 2196, 2198, 2200, 2201, 2202, 2205,
|
||||
- 2208, 2211, 2214, 2216, 2218, 2220, 2222, 2224,
|
||||
- 2226, 2227, 2228, 2229, 2231, 2235, 2237, 2239,
|
||||
- 2245, 2249, 2250, 2251, 2252, 2253, 2254, 2255,
|
||||
- 2256, 2260, 2262, 2264, 2268, 2270, 2272, 2274,
|
||||
- 2276, 2278, 2280, 2282, 2284, 2286, 2288, 2290,
|
||||
- 2292, 2294, 2296, 2297, 2300, 2303, 2308, 2313,
|
||||
- 2316, 2319, 2322, 2325, 2330, 2335, 2338, 2341,
|
||||
- 2343, 2345, 2347, 2349, 2351, 2353, 2355, 2356,
|
||||
- 2358, 2360, 2362, 2364, 2366, 2367, 2368, 2369,
|
||||
- 2373, 2377, 2379, 2383, 2387, 2391, 2395, 2399,
|
||||
- 2401, 2405, 2407, 2409, 2411, 2413, 2415, 2417,
|
||||
- 2419, 2421, 2422, 2424, 2426, 2428, 2430, 2432,
|
||||
- 2434, 2436, 2438, 2439, 2440, 2441, 2443, 2445,
|
||||
- 2447, 2449, 2450, 2451, 2453, 2455, 2457, 2459,
|
||||
- 2461, 2463, 2464, 2466, 2468, 2470, 2472, 2473,
|
||||
- 2474, 2476, 2478, 2480, 2482, 2484, 2486, 2488,
|
||||
- 2490, 2491, 2492, 2493, 2494, 2497, 2500, 2502,
|
||||
- 2505, 2506, 2507, 2509, 2510, 2512, 2513, 2514,
|
||||
- 2516, 2518, 2519, 2520, 2521, 2522, 2523, 2526,
|
||||
- 2531, 2536, 2541, 2546, 2549, 2554, 2559, 2561,
|
||||
- 2563, 2565, 2567, 2568, 2569, 2571, 2573, 2575,
|
||||
- 2577, 2579, 2581, 2583, 2584, 2585, 2586, 2587,
|
||||
- 2588, 2589, 2594, 2599, 2600, 2601, 2602, 2603,
|
||||
- 2604, 2605, 2606, 2607, 2608, 2609, 2610, 2611,
|
||||
- 2612, 2613, 2614, 2615, 2616, 2617, 2618, 2619,
|
||||
- 2620, 2621, 2622, 2623, 2624, 2625, 2626, 2627,
|
||||
- 2628, 2629, 2630, 2631, 2632, 2633, 2634, 2635,
|
||||
- 2636, 2637, 2638, 2639, 2640, 2641, 2642, 2643,
|
||||
- 2644, 2645, 2646, 2647, 2648, 2649, 2650, 2651,
|
||||
- 2652, 2653, 2654, 2655, 2656, 2657, 2658, 2659,
|
||||
- 2660, 2661, 2662, 2663, 2664, 2665, 2666, 2667,
|
||||
- 2668, 2669, 2670, 2671, 2672, 2673, 2674, 2675,
|
||||
- 2676, 2677, 2678, 2679, 2680, 2681, 2682, 2683,
|
||||
- 2684, 2685, 2686, 2687, 2688, 2689, 2690, 2691,
|
||||
- 2692, 2693, 2694, 2695, 2696, 2697, 2698, 2699,
|
||||
- 2700, 2701, 2702, 2703, 2704, 2705, 2706, 2707,
|
||||
- 2708, 2709, 2710, 2711, 2712, 2713, 2714, 2715,
|
||||
- 2716, 2717, 2718, 2719, 2720, 2721, 2722, 2723,
|
||||
- 2724, 2725, 2726, 2727, 2728, 2729, 2730, 2731,
|
||||
- 2732, 2733, 2734, 2735, 2736, 2737, 2738, 2739,
|
||||
- 2740, 2741, 2742, 2743, 2744, 2745, 2746, 2747,
|
||||
- 2748, 2749, 2750, 2751, 2752, 2753, 2754, 2755,
|
||||
- 2756, 2757, 2758, 2759, 2760, 2761, 2762, 2763,
|
||||
- 2764, 2765, 2766, 2767, 2768, 2769, 2770, 2771,
|
||||
- 2772, 2773, 2774, 2775, 2776, 2777, 2778, 2779,
|
||||
- 2780, 2781, 2782, 2783, 2784, 2785, 2786, 2787,
|
||||
- 2788, 2789, 2790, 2791, 2792, 2793, 2794, 2795,
|
||||
- 2796, 2797, 2798, 2799, 2800, 2802, 2804, 2805,
|
||||
- 2806, 2807, 2808, 2809, 2810, 2811, 2812, 2813,
|
||||
- 2814, 2815, 2816, 2817, 2818, 2819, 2820, 2821,
|
||||
- 2822, 2823, 2824, 2825, 2826, 2827, 2828, 2829,
|
||||
- 2830, 2831, 2832, 2834, 2836, 2838, 2840, 2841,
|
||||
- 2842, 2843, 2844, 2845, 2846, 2847, 2848, 2849,
|
||||
- 2850, 2851, 2852, 2853, 2855, 2856, 2857, 2858,
|
||||
- 2859, 2860, 2861, 2862, 2863, 2864, 2865, 2866,
|
||||
- 2867, 2868, 2869, 2870, 2871, 2872, 2873, 2874,
|
||||
- 2875, 2876, 2877, 2878, 2879, 2880, 2881, 2882,
|
||||
- 2883, 2884, 2885, 2886, 2887, 2888, 2889, 2890,
|
||||
- 2891, 2892, 2893, 2894, 2895, 2896, 2897, 2898,
|
||||
- 2899, 2900, 2902, 2904, 2905, 2906, 2908, 2909,
|
||||
- 2911, 2913, 2914, 2915, 2917, 2919, 2920, 2921,
|
||||
- 2922, 2923, 2924, 2925, 2926, 2927, 2928, 2929,
|
||||
- 2930, 2931, 2932, 2933, 2934, 2935, 2936, 2937,
|
||||
- 2940, 2943, 2944, 2945, 2946, 2947, 2948, 2949,
|
||||
- 2951, 2953, 2955, 2956, 2957, 2959, 2961, 2963,
|
||||
- 2965, 2969, 2971, 2973, 2974, 2975, 2976, 2977,
|
||||
- 2978, 2979, 2980, 2981, 2982, 2983, 2984, 2985,
|
||||
- 2986, 2987, 2988, 2989, 2990, 2991, 2994, 2997,
|
||||
- 2998, 2999, 3000, 3001, 3002, 3003, 3004, 3005,
|
||||
- 3006, 3007, 3008, 3009, 3010, 3011, 3012, 3013,
|
||||
- 3014, 3015, 3016, 3017, 3018, 3019, 3020, 3021,
|
||||
- 3022, 3023, 3024, 3025, 3026, 3027, 3028, 3029,
|
||||
- 3030, 3031, 3032, 3033, 3034, 3035, 3036, 3037,
|
||||
- 3038, 3039, 3040, 3041, 3042, 3043, 3044, 3045,
|
||||
- 3046, 3047, 3048, 3049, 3050, 3051, 3054, 3056,
|
||||
- 3059, 3062, 3064, 3067, 3070, 3073, 3076, 3077,
|
||||
- 3080, 3081, 3082, 3083, 3084, 3085, 3089, 3091,
|
||||
- 3094, 3095, 3096, 3097, 3098, 3099, 3100, 3101,
|
||||
- 3102, 3103, 3104, 3105, 3106, 3107, 3108, 3109,
|
||||
- 3110, 3111, 3112, 3113, 3114, 3115, 3116, 3117,
|
||||
- 3118, 3119, 3120, 3121, 3122, 3123, 3124, 3125,
|
||||
- 3126, 3127, 3128, 3129, 3130, 3131, 3132, 3133,
|
||||
- 3134, 3135, 3136, 3137, 3138, 3139, 3140, 3141,
|
||||
- 3142, 3143, 3144, 3145, 3146, 3147, 3148, 3149,
|
||||
- 3151, 3152, 3153, 3154, 3155, 3156, 3157, 3158,
|
||||
- 3159, 3160, 3161, 3162, 3163, 3164, 3165, 3166,
|
||||
- 3167, 3168, 3169, 3170, 3171, 3172, 3173, 3174,
|
||||
- 3175, 3176, 3177, 3178, 3179, 3180, 3181, 3182,
|
||||
- 3183, 3184, 3185, 3186, 3187, 3188, 3189, 3190,
|
||||
- 3193, 3196, 3199, 3202, 3205, 3208, 3211, 3214,
|
||||
- 3217, 3220, 3223, 3226, 3229, 3232, 3235, 3236,
|
||||
- 3237, 3238, 3239, 3241, 3242, 3243, 3244, 3245,
|
||||
- 3246, 3247, 3248, 3249, 3250, 3251, 3252, 3253,
|
||||
- 3254, 3255, 3256, 3257, 3258, 3259, 3260, 3261,
|
||||
- 3262, 3263, 3264, 3265, 3266, 3267, 3268, 3269,
|
||||
- 3270, 3271, 3272, 3273, 3274, 3275, 3276, 3277,
|
||||
- 3278, 3279, 3280, 3281, 3282, 3283, 3284, 3285,
|
||||
- 3286, 3287, 3288, 3289, 3290, 3291, 3292, 3293,
|
||||
- 3294, 3295, 3296, 3297, 3298, 3299, 3300, 3301,
|
||||
- 3302, 3305, 3308, 3309, 3310, 3311, 3312, 3313,
|
||||
- 3314, 3315, 3316, 3317, 3318, 3319, 3320, 3321,
|
||||
- 3322, 3323, 3324, 3325, 3326, 3327, 3328, 3329,
|
||||
- 3330, 3331, 3332, 3333, 3334, 3335, 3336, 3337,
|
||||
- 3338, 3339, 3340, 3341, 3342, 3343, 3344, 3345,
|
||||
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+ 3794, 3797, 3800, 3801, 3802, 3803, 3804, 3806,
|
||||
+ 3808, 3809, 3810, 3811, 3814, 3817, 3820, 3823,
|
||||
+ 3826, 3827, 3828, 3829, 3831, 3832, 3833, 3834,
|
||||
+ 3836, 3837, 3838, 3839, 3840, 3841, 3842, 3843,
|
||||
+ 3844, 3845, 3846, 3847, 3848, 3849, 3850, 3851,
|
||||
+ 3852, 3853, 3854, 3855, 3856, 3857, 3858, 3859,
|
||||
+ 3860, 3861, 3862, 3863, 3864, 3865, 3866, 3867,
|
||||
+ 3868, 3869, 3870, 3871, 3872, 3873, 3874, 3875,
|
||||
+ 3877, 3879, 3881, 3883, 3885, 3886, 3887, 3890,
|
||||
+ 3893, 3894, 3895, 3896, 3897
|
||||
};
|
||||
|
||||
/* i386 mnemonics table. */
|
||||
diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d
|
||||
--- binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d 2024-02-12 15:55:20.792572349 +0000
|
||||
+++ binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d 2024-02-12 15:56:07.355601128 +0000
|
||||
@@ -158,6 +158,12 @@ Disassembly of section \.text:
|
||||
[ ]*[a-f0-9]+:[ ]*62 da 7f 08 4b b4 87 23 01 00 00[ ]+tileloadd tmm6,\[r31\+rax\*4\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 da 7d 08 4b b4 87 23 01 00 00[ ]+tileloaddt1 tmm6,\[r31\+rax\*4\+0x123\]
|
||||
[ ]*[a-f0-9]+:[ ]*62 da 7e 08 4b b4 87 23 01 00 00[ ]+tilestored[ ]+\[r31\+rax\*4\+0x123\],tmm6
|
||||
+[ ]*[a-f0-9]+:[ ]*62 fa 7d 28 1a 18[ ]+vbroadcastf32x4 ymm3,XMMWORD PTR \[r16\]
|
||||
+[ ]*[a-f0-9]+:[ ]*62 fa 7d 28 5a 18[ ]+vbroadcasti32x4 ymm3,XMMWORD PTR \[r16\]
|
||||
+[ ]*[a-f0-9]+:[ ]*62 fb 7d 28 19 18 01[ ]+vextractf32x4 XMMWORD PTR \[r16\],ymm3,(0x)?1
|
||||
+[ ]*[a-f0-9]+:[ ]*62 fb 7d 28 39 18 01[ ]+vextracti32x4 XMMWORD PTR \[r16\],ymm3,(0x)?1
|
||||
+[ ]*[a-f0-9]+:[ ]*62 7b 65 28 18 00 01[ ]+vinsertf32x4 ymm8,ymm3,XMMWORD PTR \[r16\],(0x)?1
|
||||
+[ ]*[a-f0-9]+:[ ]*62 7b 65 28 38 00 01[ ]+vinserti32x4 ymm8,ymm3,XMMWORD PTR \[r16\],(0x)?1
|
||||
[ ]*[a-f0-9]+:[ ]*62 db fd 08 09 30 01[ ]+vrndscalepd xmm6,XMMWORD PTR \[r24\],(0x)?1
|
||||
[ ]*[a-f0-9]+:[ ]*62 db 7d 08 08 30 02[ ]+vrndscaleps xmm6,XMMWORD PTR \[r24\],(0x)?2
|
||||
[ ]*[a-f0-9]+:[ ]*62 db cd 08 0b 18 03[ ]+vrndscalesd xmm3,xmm6,QWORD PTR \[r24\],(0x)?3
|
||||
diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d
|
||||
--- binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d 2024-02-12 15:55:20.792572349 +0000
|
||||
+++ binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d 2024-02-12 15:56:07.355601128 +0000
|
||||
@@ -158,6 +158,12 @@ Disassembly of section \.text:
|
||||
[ ]*[a-f0-9]+:[ ]*62 da 7f 08 4b b4 87 23 01 00 00[ ]+tileloadd[ ]+0x123\(%r31,%rax,4\),%tmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 da 7d 08 4b b4 87 23 01 00 00[ ]+tileloaddt1[ ]+0x123\(%r31,%rax,4\),%tmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 da 7e 08 4b b4 87 23 01 00 00[ ]+tilestored[ ]+%tmm6,0x123\(%r31,%rax,4\)
|
||||
+[ ]*[a-f0-9]+:[ ]*62 fa 7d 28 1a 18[ ]+vbroadcastf32x4 \(%r16\),%ymm3
|
||||
+[ ]*[a-f0-9]+:[ ]*62 fa 7d 28 5a 18[ ]+vbroadcasti32x4 \(%r16\),%ymm3
|
||||
+[ ]*[a-f0-9]+:[ ]*62 fb 7d 28 19 18 01[ ]+vextractf32x4 \$(0x)?1,%ymm3,\(%r16\)
|
||||
+[ ]*[a-f0-9]+:[ ]*62 fb 7d 28 39 18 01[ ]+vextracti32x4 \$(0x)?1,%ymm3,\(%r16\)
|
||||
+[ ]*[a-f0-9]+:[ ]*62 7b 65 28 18 00 01[ ]+vinsertf32x4 \$(0x)?1,\(%r16\),%ymm3,%ymm8
|
||||
+[ ]*[a-f0-9]+:[ ]*62 7b 65 28 38 00 01[ ]+vinserti32x4 \$(0x)?1,\(%r16\),%ymm3,%ymm8
|
||||
[ ]*[a-f0-9]+:[ ]*62 db fd 08 09 30 01[ ]+vrndscalepd \$0x1,\(%r24\),%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 db 7d 08 08 30 02[ ]+vrndscaleps \$0x2,\(%r24\),%xmm6
|
||||
[ ]*[a-f0-9]+:[ ]*62 db cd 08 0b 18 03[ ]+vrndscalesd \$0x3,\(%r24\),%xmm6,%xmm3
|
||||
diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s
|
||||
--- binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s 2024-02-12 15:55:20.792572349 +0000
|
||||
+++ binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s 2024-02-12 15:56:07.356601129 +0000
|
||||
@@ -152,6 +152,12 @@ _start:
|
||||
tileloadd 0x123(%r31,%rax,4),%tmm6
|
||||
tileloaddt1 0x123(%r31,%rax,4),%tmm6
|
||||
tilestored %tmm6,0x123(%r31,%rax,4)
|
||||
+ vbroadcastf128 (%r16),%ymm3
|
||||
+ vbroadcasti128 (%r16),%ymm3
|
||||
+ vextractf128 $1,%ymm3,(%r16)
|
||||
+ vextracti128 $1,%ymm3,(%r16)
|
||||
+ vinsertf128 $1,(%r16),%ymm3,%ymm8
|
||||
+ vinserti128 $1,(%r16),%ymm3,%ymm8
|
||||
vroundpd $1,(%r24),%xmm6
|
||||
vroundps $2,(%r24),%xmm6
|
||||
vroundsd $3,(%r24),%xmm6,%xmm3
|
||||
@ -1,540 +0,0 @@
|
||||
diff -rupN binutils.orig/gold/testsuite/x86_64_ie_to_le.s binutils-2.41/gold/testsuite/x86_64_ie_to_le.s
|
||||
--- binutils.orig/gold/testsuite/x86_64_ie_to_le.s 1970-01-01 01:00:00.000000000 +0100
|
||||
+++ binutils-2.41/gold/testsuite/x86_64_ie_to_le.s 2024-07-01 15:47:30.204856624 +0100
|
||||
@@ -0,0 +1,17 @@
|
||||
+ .text
|
||||
+ .p2align 4
|
||||
+ .globl _start
|
||||
+ .type _start, @function
|
||||
+_start:
|
||||
+ addq foo@gottpoff(%rip), %r12
|
||||
+ movq foo@gottpoff(%rip), %rax
|
||||
+ addq foo@gottpoff(%rip), %r16
|
||||
+ movq foo@gottpoff(%rip), %r20
|
||||
+ .size _start, .-_start
|
||||
+ .section .tdata,"awT",@progbits
|
||||
+ .align 4
|
||||
+ .type foo, @object
|
||||
+ .size foo, 4
|
||||
+foo:
|
||||
+ .long 30
|
||||
+ .section .note.GNU-stack,"",@progbits
|
||||
diff -rupN binutils.orig/gold/testsuite/x86_64_ie_to_le.sh binutils-2.41/gold/testsuite/x86_64_ie_to_le.sh
|
||||
--- binutils.orig/gold/testsuite/x86_64_ie_to_le.sh 1970-01-01 01:00:00.000000000 +0100
|
||||
+++ binutils-2.41/gold/testsuite/x86_64_ie_to_le.sh 2024-07-01 15:47:30.204856624 +0100
|
||||
@@ -0,0 +1,29 @@
|
||||
+#!/bin/sh
|
||||
+
|
||||
+# x86_64_ie_to_le.sh -- a test for IE -> LE conversion.
|
||||
+
|
||||
+# Copyright (C) 2023 Free Software Foundation, Inc.
|
||||
+
|
||||
+# This file is part of gold.
|
||||
+
|
||||
+# This program is free software; you can redistribute it and/or modify
|
||||
+# it under the terms of the GNU General Public License as published by
|
||||
+# the Free Software Foundation; either version 3 of the License, or
|
||||
+# (at your option) any later version.
|
||||
+
|
||||
+# This program is distributed in the hope that it will be useful,
|
||||
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+# GNU General Public License for more details.
|
||||
+
|
||||
+# You should have received a copy of the GNU General Public License
|
||||
+# along with this program; if not, write to the Free Software
|
||||
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
|
||||
+# MA 02110-1301, USA.
|
||||
+
|
||||
+set -e
|
||||
+
|
||||
+grep -q "add[ \t]\+\$0x[a-f0-9]\+,%r12" x86_64_ie_to_le.stdout
|
||||
+grep -q "mov[ \t]\+\$0x[a-f0-9]\+,%rax" x86_64_ie_to_le.stdout
|
||||
+grep -q "add[ \t]\+\$0x[a-f0-9]\+,%r16" x86_64_ie_to_le.stdout
|
||||
+grep -q "mov[ \t]\+\$0x[a-f0-9]\+,%r20" x86_64_ie_to_le.stdout
|
||||
diff -rupN binutils.orig/ld/NEWS binutils-2.41/ld/NEWS
|
||||
--- binutils.orig/ld/NEWS 2024-07-01 15:14:02.065309252 +0100
|
||||
+++ binutils-2.41/ld/NEWS 2024-07-01 15:57:53.858506649 +0100
|
||||
@@ -3,6 +3,8 @@
|
||||
* Add --section-ordering-file <FILE> option to add extra mapping of input
|
||||
sections to output sections.
|
||||
|
||||
+* Support Intel APX relocations.
|
||||
+
|
||||
* On RISC-V, add ld target option --[no-]check-uleb128. Should rebuild the
|
||||
objects by binutils 2.42 and up if enabling the option and get warnings,
|
||||
since the non-zero addend of SUB_ULEB128 shouldn't be generated from .uleb128
|
||||
diff -rupN binutils.orig/ld/testsuite/ld-x86-64/apx-load1.s binutils-2.41/ld/testsuite/ld-x86-64/apx-load1.s
|
||||
--- binutils.orig/ld/testsuite/ld-x86-64/apx-load1.s 1970-01-01 01:00:00.000000000 +0100
|
||||
+++ binutils-2.41/ld/testsuite/ld-x86-64/apx-load1.s 2024-07-01 15:45:59.396610481 +0100
|
||||
@@ -0,0 +1,51 @@
|
||||
+ .data
|
||||
+ .type bar, @object
|
||||
+bar:
|
||||
+ .byte 1
|
||||
+ .size bar, .-bar
|
||||
+ .globl foo
|
||||
+ .type foo, @object
|
||||
+foo:
|
||||
+ .byte 1
|
||||
+ .size foo, .-foo
|
||||
+ .text
|
||||
+ .globl _start
|
||||
+ .type _start, @function
|
||||
+_start:
|
||||
+ adcl bar@GOTPCREL(%rip), %r16d
|
||||
+ addl bar@GOTPCREL(%rip), %r17d
|
||||
+ andl bar@GOTPCREL(%rip), %r18d
|
||||
+ cmpl bar@GOTPCREL(%rip), %r19d
|
||||
+ orl bar@GOTPCREL(%rip), %r20d
|
||||
+ sbbl bar@GOTPCREL(%rip), %r21d
|
||||
+ subl bar@GOTPCREL(%rip), %r22d
|
||||
+ xorl bar@GOTPCREL(%rip), %r23d
|
||||
+ testl %r24d, bar@GOTPCREL(%rip)
|
||||
+ adcq bar@GOTPCREL(%rip), %r16
|
||||
+ addq bar@GOTPCREL(%rip), %r17
|
||||
+ andq bar@GOTPCREL(%rip), %r18
|
||||
+ cmpq bar@GOTPCREL(%rip), %r19
|
||||
+ orq bar@GOTPCREL(%rip), %r20
|
||||
+ sbbq bar@GOTPCREL(%rip), %r21
|
||||
+ subq bar@GOTPCREL(%rip), %r22
|
||||
+ xorq bar@GOTPCREL(%rip), %r23
|
||||
+ testq %r24, bar@GOTPCREL(%rip)
|
||||
+ adcl foo@GOTPCREL(%rip), %r16d
|
||||
+ addl foo@GOTPCREL(%rip), %r17d
|
||||
+ andl foo@GOTPCREL(%rip), %r18d
|
||||
+ cmpl foo@GOTPCREL(%rip), %r19d
|
||||
+ orl foo@GOTPCREL(%rip), %r20d
|
||||
+ sbbl foo@GOTPCREL(%rip), %r21d
|
||||
+ subl foo@GOTPCREL(%rip), %r22d
|
||||
+ xorl foo@GOTPCREL(%rip), %r23d
|
||||
+ testl %r24d, foo@GOTPCREL(%rip)
|
||||
+ adcq foo@GOTPCREL(%rip), %r16
|
||||
+ addq foo@GOTPCREL(%rip), %r17
|
||||
+ andq foo@GOTPCREL(%rip), %r18
|
||||
+ cmpq foo@GOTPCREL(%rip), %r19
|
||||
+ orq foo@GOTPCREL(%rip), %r20
|
||||
+ sbbq foo@GOTPCREL(%rip), %r21
|
||||
+ subq foo@GOTPCREL(%rip), %r22
|
||||
+ xorq foo@GOTPCREL(%rip), %r23
|
||||
+ testq %r24, foo@GOTPCREL(%rip)
|
||||
+ .size _start, .-_start
|
||||
diff -rupN binutils.orig/ld/testsuite/ld-x86-64/apx-load1a.d binutils-2.41/ld/testsuite/ld-x86-64/apx-load1a.d
|
||||
--- binutils.orig/ld/testsuite/ld-x86-64/apx-load1a.d 1970-01-01 01:00:00.000000000 +0100
|
||||
+++ binutils-2.41/ld/testsuite/ld-x86-64/apx-load1a.d 2024-07-01 15:45:59.396610481 +0100
|
||||
@@ -0,0 +1,54 @@
|
||||
+#source: apx-load1.s
|
||||
+#as: --64 -mrelax-relocations=yes
|
||||
+#ld: -melf_x86_64 -z max-page-size=0x200000 -z noseparate-code
|
||||
+#objdump: -dw --sym
|
||||
+
|
||||
+.*: +file format .*
|
||||
+
|
||||
+SYMBOL TABLE:
|
||||
+#...
|
||||
+0+6001d0 l O .data 0+1 bar
|
||||
+#...
|
||||
+0+6001d1 g O .data 0+1 foo
|
||||
+#...
|
||||
+
|
||||
+Disassembly of section .text:
|
||||
+
|
||||
+0+4000b0 <_start>:
|
||||
+ +[a-f0-9]+: d5 10 81 d0 d0 01 60 00 adc \$0x6001d0,%r16d
|
||||
+ +[a-f0-9]+: d5 10 81 c1 d0 01 60 00 add \$0x6001d0,%r17d
|
||||
+ +[a-f0-9]+: d5 10 81 e2 d0 01 60 00 and \$0x6001d0,%r18d
|
||||
+ +[a-f0-9]+: d5 10 81 fb d0 01 60 00 cmp \$0x6001d0,%r19d
|
||||
+ +[a-f0-9]+: d5 10 81 cc d0 01 60 00 or \$0x6001d0,%r20d
|
||||
+ +[a-f0-9]+: d5 10 81 dd d0 01 60 00 sbb \$0x6001d0,%r21d
|
||||
+ +[a-f0-9]+: d5 10 81 ee d0 01 60 00 sub \$0x6001d0,%r22d
|
||||
+ +[a-f0-9]+: d5 10 81 f7 d0 01 60 00 xor \$0x6001d0,%r23d
|
||||
+ +[a-f0-9]+: d5 11 f7 c0 d0 01 60 00 test \$0x6001d0,%r24d
|
||||
+ +[a-f0-9]+: d5 18 81 d0 d0 01 60 00 adc \$0x6001d0,%r16
|
||||
+ +[a-f0-9]+: d5 18 81 c1 d0 01 60 00 add \$0x6001d0,%r17
|
||||
+ +[a-f0-9]+: d5 18 81 e2 d0 01 60 00 and \$0x6001d0,%r18
|
||||
+ +[a-f0-9]+: d5 18 81 fb d0 01 60 00 cmp \$0x6001d0,%r19
|
||||
+ +[a-f0-9]+: d5 18 81 cc d0 01 60 00 or \$0x6001d0,%r20
|
||||
+ +[a-f0-9]+: d5 18 81 dd d0 01 60 00 sbb \$0x6001d0,%r21
|
||||
+ +[a-f0-9]+: d5 18 81 ee d0 01 60 00 sub \$0x6001d0,%r22
|
||||
+ +[a-f0-9]+: d5 18 81 f7 d0 01 60 00 xor \$0x6001d0,%r23
|
||||
+ +[a-f0-9]+: d5 19 f7 c0 d0 01 60 00 test \$0x6001d0,%r24
|
||||
+ +[a-f0-9]+: d5 10 81 d0 d1 01 60 00 adc \$0x6001d1,%r16d
|
||||
+ +[a-f0-9]+: d5 10 81 c1 d1 01 60 00 add \$0x6001d1,%r17d
|
||||
+ +[a-f0-9]+: d5 10 81 e2 d1 01 60 00 and \$0x6001d1,%r18d
|
||||
+ +[a-f0-9]+: d5 10 81 fb d1 01 60 00 cmp \$0x6001d1,%r19d
|
||||
+ +[a-f0-9]+: d5 10 81 cc d1 01 60 00 or \$0x6001d1,%r20d
|
||||
+ +[a-f0-9]+: d5 10 81 dd d1 01 60 00 sbb \$0x6001d1,%r21d
|
||||
+ +[a-f0-9]+: d5 10 81 ee d1 01 60 00 sub \$0x6001d1,%r22d
|
||||
+ +[a-f0-9]+: d5 10 81 f7 d1 01 60 00 xor \$0x6001d1,%r23d
|
||||
+ +[a-f0-9]+: d5 11 f7 c0 d1 01 60 00 test \$0x6001d1,%r24d
|
||||
+ +[a-f0-9]+: d5 18 81 d0 d1 01 60 00 adc \$0x6001d1,%r16
|
||||
+ +[a-f0-9]+: d5 18 81 c1 d1 01 60 00 add \$0x6001d1,%r17
|
||||
+ +[a-f0-9]+: d5 18 81 e2 d1 01 60 00 and \$0x6001d1,%r18
|
||||
+ +[a-f0-9]+: d5 18 81 fb d1 01 60 00 cmp \$0x6001d1,%r19
|
||||
+ +[a-f0-9]+: d5 18 81 cc d1 01 60 00 or \$0x6001d1,%r20
|
||||
+ +[a-f0-9]+: d5 18 81 dd d1 01 60 00 sbb \$0x6001d1,%r21
|
||||
+ +[a-f0-9]+: d5 18 81 ee d1 01 60 00 sub \$0x6001d1,%r22
|
||||
+ +[a-f0-9]+: d5 18 81 f7 d1 01 60 00 xor \$0x6001d1,%r23
|
||||
+ +[a-f0-9]+: d5 19 f7 c0 d1 01 60 00 test \$0x6001d1,%r24
|
||||
+#pass
|
||||
diff -rupN binutils.orig/ld/testsuite/ld-x86-64/apx-load1b.d binutils-2.41/ld/testsuite/ld-x86-64/apx-load1b.d
|
||||
--- binutils.orig/ld/testsuite/ld-x86-64/apx-load1b.d 1970-01-01 01:00:00.000000000 +0100
|
||||
+++ binutils-2.41/ld/testsuite/ld-x86-64/apx-load1b.d 2024-07-01 15:45:59.396610481 +0100
|
||||
@@ -0,0 +1,55 @@
|
||||
+#source: apx-load1.s
|
||||
+#as: --x32 -mrelax-relocations=yes
|
||||
+#ld: -melf32_x86_64 -z max-page-size=0x200000 -z noseparate-code
|
||||
+#objdump: -dw --sym
|
||||
+
|
||||
+.*: +file format .*
|
||||
+
|
||||
+SYMBOL TABLE:
|
||||
+#...
|
||||
+0+600194 l O .data 0+1 bar
|
||||
+#...
|
||||
+0+600195 g O .data 0+1 foo
|
||||
+#...
|
||||
+
|
||||
+
|
||||
+Disassembly of section .text:
|
||||
+
|
||||
+0+400074 <_start>:
|
||||
+ +[a-f0-9]+: d5 10 81 d0 94 01 60 00 adc \$0x600194,%r16d
|
||||
+ +[a-f0-9]+: d5 10 81 c1 94 01 60 00 add \$0x600194,%r17d
|
||||
+ +[a-f0-9]+: d5 10 81 e2 94 01 60 00 and \$0x600194,%r18d
|
||||
+ +[a-f0-9]+: d5 10 81 fb 94 01 60 00 cmp \$0x600194,%r19d
|
||||
+ +[a-f0-9]+: d5 10 81 cc 94 01 60 00 or \$0x600194,%r20d
|
||||
+ +[a-f0-9]+: d5 10 81 dd 94 01 60 00 sbb \$0x600194,%r21d
|
||||
+ +[a-f0-9]+: d5 10 81 ee 94 01 60 00 sub \$0x600194,%r22d
|
||||
+ +[a-f0-9]+: d5 10 81 f7 94 01 60 00 xor \$0x600194,%r23d
|
||||
+ +[a-f0-9]+: d5 11 f7 c0 94 01 60 00 test \$0x600194,%r24d
|
||||
+ +[a-f0-9]+: d5 18 81 d0 94 01 60 00 adc \$0x600194,%r16
|
||||
+ +[a-f0-9]+: d5 18 81 c1 94 01 60 00 add \$0x600194,%r17
|
||||
+ +[a-f0-9]+: d5 18 81 e2 94 01 60 00 and \$0x600194,%r18
|
||||
+ +[a-f0-9]+: d5 18 81 fb 94 01 60 00 cmp \$0x600194,%r19
|
||||
+ +[a-f0-9]+: d5 18 81 cc 94 01 60 00 or \$0x600194,%r20
|
||||
+ +[a-f0-9]+: d5 18 81 dd 94 01 60 00 sbb \$0x600194,%r21
|
||||
+ +[a-f0-9]+: d5 18 81 ee 94 01 60 00 sub \$0x600194,%r22
|
||||
+ +[a-f0-9]+: d5 18 81 f7 94 01 60 00 xor \$0x600194,%r23
|
||||
+ +[a-f0-9]+: d5 19 f7 c0 94 01 60 00 test \$0x600194,%r24
|
||||
+ +[a-f0-9]+: d5 10 81 d0 95 01 60 00 adc \$0x600195,%r16d
|
||||
+ +[a-f0-9]+: d5 10 81 c1 95 01 60 00 add \$0x600195,%r17d
|
||||
+ +[a-f0-9]+: d5 10 81 e2 95 01 60 00 and \$0x600195,%r18d
|
||||
+ +[a-f0-9]+: d5 10 81 fb 95 01 60 00 cmp \$0x600195,%r19d
|
||||
+ +[a-f0-9]+: d5 10 81 cc 95 01 60 00 or \$0x600195,%r20d
|
||||
+ +[a-f0-9]+: d5 10 81 dd 95 01 60 00 sbb \$0x600195,%r21d
|
||||
+ +[a-f0-9]+: d5 10 81 ee 95 01 60 00 sub \$0x600195,%r22d
|
||||
+ +[a-f0-9]+: d5 10 81 f7 95 01 60 00 xor \$0x600195,%r23d
|
||||
+ +[a-f0-9]+: d5 11 f7 c0 95 01 60 00 test \$0x600195,%r24d
|
||||
+ +[a-f0-9]+: d5 18 81 d0 95 01 60 00 adc \$0x600195,%r16
|
||||
+ +[a-f0-9]+: d5 18 81 c1 95 01 60 00 add \$0x600195,%r17
|
||||
+ +[a-f0-9]+: d5 18 81 e2 95 01 60 00 and \$0x600195,%r18
|
||||
+ +[a-f0-9]+: d5 18 81 fb 95 01 60 00 cmp \$0x600195,%r19
|
||||
+ +[a-f0-9]+: d5 18 81 cc 95 01 60 00 or \$0x600195,%r20
|
||||
+ +[a-f0-9]+: d5 18 81 dd 95 01 60 00 sbb \$0x600195,%r21
|
||||
+ +[a-f0-9]+: d5 18 81 ee 95 01 60 00 sub \$0x600195,%r22
|
||||
+ +[a-f0-9]+: d5 18 81 f7 95 01 60 00 xor \$0x600195,%r23
|
||||
+ +[a-f0-9]+: d5 19 f7 c0 95 01 60 00 test \$0x600195,%r24
|
||||
+#pass
|
||||
diff -rupN binutils.orig/ld/testsuite/ld-x86-64/apx-load1c.d binutils-2.41/ld/testsuite/ld-x86-64/apx-load1c.d
|
||||
--- binutils.orig/ld/testsuite/ld-x86-64/apx-load1c.d 1970-01-01 01:00:00.000000000 +0100
|
||||
+++ binutils-2.41/ld/testsuite/ld-x86-64/apx-load1c.d 2024-07-01 15:45:59.397610484 +0100
|
||||
@@ -0,0 +1,47 @@
|
||||
+#source: apx-load1.s
|
||||
+#as: --64
|
||||
+#ld: -shared -melf_x86_64 --hash-style=sysv -z max-page-size=0x200000 -z noseparate-code $NO_DT_RELR_LDFLAGS
|
||||
+#objdump: -dw
|
||||
+
|
||||
+.*: +file format .*
|
||||
+
|
||||
+Disassembly of section .text:
|
||||
+
|
||||
+0+188 <_start>:
|
||||
+ +[a-f0-9]+: d5 40 13 05 f8 01 20 00 adc 0x2001f8\(%rip\),%r16d # 200388 <.*>
|
||||
+ +[a-f0-9]+: d5 40 03 0d f0 01 20 00 add 0x2001f0\(%rip\),%r17d # 200388 <.*>
|
||||
+ +[a-f0-9]+: d5 40 23 15 e8 01 20 00 and 0x2001e8\(%rip\),%r18d # 200388 <.*>
|
||||
+ +[a-f0-9]+: d5 40 3b 1d e0 01 20 00 cmp 0x2001e0\(%rip\),%r19d # 200388 <.*>
|
||||
+ +[a-f0-9]+: d5 40 0b 25 d8 01 20 00 or 0x2001d8\(%rip\),%r20d # 200388 <.*>
|
||||
+ +[a-f0-9]+: d5 40 1b 2d d0 01 20 00 sbb 0x2001d0\(%rip\),%r21d # 200388 <.*>
|
||||
+ +[a-f0-9]+: d5 40 2b 35 c8 01 20 00 sub 0x2001c8\(%rip\),%r22d # 200388 <.*>
|
||||
+ +[a-f0-9]+: d5 40 33 3d c0 01 20 00 xor 0x2001c0\(%rip\),%r23d # 200388 <.*>
|
||||
+ +[a-f0-9]+: d5 44 85 05 b8 01 20 00 test %r24d,0x2001b8\(%rip\) # 200388 <.*>
|
||||
+ +[a-f0-9]+: d5 48 13 05 b0 01 20 00 adc 0x2001b0\(%rip\),%r16 # 200388 <.*>
|
||||
+ +[a-f0-9]+: d5 48 03 0d a8 01 20 00 add 0x2001a8\(%rip\),%r17 # 200388 <.*>
|
||||
+ +[a-f0-9]+: d5 48 23 15 a0 01 20 00 and 0x2001a0\(%rip\),%r18 # 200388 <.*>
|
||||
+ +[a-f0-9]+: d5 48 3b 1d 98 01 20 00 cmp 0x200198\(%rip\),%r19 # 200388 <.*>
|
||||
+ +[a-f0-9]+: d5 48 0b 25 90 01 20 00 or 0x200190\(%rip\),%r20 # 200388 <.*>
|
||||
+ +[a-f0-9]+: d5 48 1b 2d 88 01 20 00 sbb 0x200188\(%rip\),%r21 # 200388 <.*>
|
||||
+ +[a-f0-9]+: d5 48 2b 35 80 01 20 00 sub 0x200180\(%rip\),%r22 # 200388 <.*>
|
||||
+ +[a-f0-9]+: d5 48 33 3d 78 01 20 00 xor 0x200178\(%rip\),%r23 # 200388 <.*>
|
||||
+ +[a-f0-9]+: d5 4c 85 05 70 01 20 00 test %r24,0x200170\(%rip\) # 200388 <.*>
|
||||
+ +[a-f0-9]+: d5 40 13 05 70 01 20 00 adc 0x200170\(%rip\),%r16d # 200390 <.*>
|
||||
+ +[a-f0-9]+: d5 40 03 0d 68 01 20 00 add 0x200168\(%rip\),%r17d # 200390 <.*>
|
||||
+ +[a-f0-9]+: d5 40 23 15 60 01 20 00 and 0x200160\(%rip\),%r18d # 200390 <.*>
|
||||
+ +[a-f0-9]+: d5 40 3b 1d 58 01 20 00 cmp 0x200158\(%rip\),%r19d # 200390 <.*>
|
||||
+ +[a-f0-9]+: d5 40 0b 25 50 01 20 00 or 0x200150\(%rip\),%r20d # 200390 <.*>
|
||||
+ +[a-f0-9]+: d5 40 1b 2d 48 01 20 00 sbb 0x200148\(%rip\),%r21d # 200390 <.*>
|
||||
+ +[a-f0-9]+: d5 40 2b 35 40 01 20 00 sub 0x200140\(%rip\),%r22d # 200390 <.*>
|
||||
+ +[a-f0-9]+: d5 40 33 3d 38 01 20 00 xor 0x200138\(%rip\),%r23d # 200390 <.*>
|
||||
+ +[a-f0-9]+: d5 44 85 05 30 01 20 00 test %r24d,0x200130\(%rip\) # 200390 <.*>
|
||||
+ +[a-f0-9]+: d5 48 13 05 28 01 20 00 adc 0x200128\(%rip\),%r16 # 200390 <.*>
|
||||
+ +[a-f0-9]+: d5 48 03 0d 20 01 20 00 add 0x200120\(%rip\),%r17 # 200390 <.*>
|
||||
+ +[a-f0-9]+: d5 48 23 15 18 01 20 00 and 0x200118\(%rip\),%r18 # 200390 <.*>
|
||||
+ +[a-f0-9]+: d5 48 3b 1d 10 01 20 00 cmp 0x200110\(%rip\),%r19 # 200390 <.*>
|
||||
+ +[a-f0-9]+: d5 48 0b 25 08 01 20 00 or 0x200108\(%rip\),%r20 # 200390 <.*>
|
||||
+ +[a-f0-9]+: d5 48 1b 2d 00 01 20 00 sbb 0x200100\(%rip\),%r21 # 200390 <.*>
|
||||
+ +[a-f0-9]+: d5 48 2b 35 f8 00 20 00 sub 0x2000f8\(%rip\),%r22 # 200390 <.*>
|
||||
+ +[a-f0-9]+: d5 48 33 3d f0 00 20 00 xor 0x2000f0\(%rip\),%r23 # 200390 <.*>
|
||||
+ +[a-f0-9]+: d5 4c 85 05 e8 00 20 00 test %r24,0x2000e8\(%rip\) # 200390 <.*>
|
||||
+#pass
|
||||
diff -rupN binutils.orig/ld/testsuite/ld-x86-64/apx-load1d.d binutils-2.41/ld/testsuite/ld-x86-64/apx-load1d.d
|
||||
--- binutils.orig/ld/testsuite/ld-x86-64/apx-load1d.d 1970-01-01 01:00:00.000000000 +0100
|
||||
+++ binutils-2.41/ld/testsuite/ld-x86-64/apx-load1d.d 2024-07-01 15:45:59.397610484 +0100
|
||||
@@ -0,0 +1,47 @@
|
||||
+#source: apx-load1.s
|
||||
+#as: --x32
|
||||
+#ld: -shared -melf32_x86_64 --hash-style=sysv -z max-page-size=0x200000 -z noseparate-code $NO_DT_RELR_LDFLAGS
|
||||
+#objdump: -dw
|
||||
+
|
||||
+.*: +file format .*
|
||||
+
|
||||
+Disassembly of section .text:
|
||||
+
|
||||
+0+100 <_start>:
|
||||
+ +[a-f0-9]+: d5 40 13 05 88 01 20 00 adc 0x200188\(%rip\),%r16d # 200290 <.*>
|
||||
+ +[a-f0-9]+: d5 40 03 0d 80 01 20 00 add 0x200180\(%rip\),%r17d # 200290 <.*>
|
||||
+ +[a-f0-9]+: d5 40 23 15 78 01 20 00 and 0x200178\(%rip\),%r18d # 200290 <.*>
|
||||
+ +[a-f0-9]+: d5 40 3b 1d 70 01 20 00 cmp 0x200170\(%rip\),%r19d # 200290 <.*>
|
||||
+ +[a-f0-9]+: d5 40 0b 25 68 01 20 00 or 0x200168\(%rip\),%r20d # 200290 <.*>
|
||||
+ +[a-f0-9]+: d5 40 1b 2d 60 01 20 00 sbb 0x200160\(%rip\),%r21d # 200290 <.*>
|
||||
+ +[a-f0-9]+: d5 40 2b 35 58 01 20 00 sub 0x200158\(%rip\),%r22d # 200290 <.*>
|
||||
+ +[a-f0-9]+: d5 40 33 3d 50 01 20 00 xor 0x200150\(%rip\),%r23d # 200290 <.*>
|
||||
+ +[a-f0-9]+: d5 44 85 05 48 01 20 00 test %r24d,0x200148\(%rip\) # 200290 <.*>
|
||||
+ +[a-f0-9]+: d5 48 13 05 40 01 20 00 adc 0x200140\(%rip\),%r16 # 200290 <.*>
|
||||
+ +[a-f0-9]+: d5 48 03 0d 38 01 20 00 add 0x200138\(%rip\),%r17 # 200290 <.*>
|
||||
+ +[a-f0-9]+: d5 48 23 15 30 01 20 00 and 0x200130\(%rip\),%r18 # 200290 <.*>
|
||||
+ +[a-f0-9]+: d5 48 3b 1d 28 01 20 00 cmp 0x200128\(%rip\),%r19 # 200290 <.*>
|
||||
+ +[a-f0-9]+: d5 48 0b 25 20 01 20 00 or 0x200120\(%rip\),%r20 # 200290 <.*>
|
||||
+ +[a-f0-9]+: d5 48 1b 2d 18 01 20 00 sbb 0x200118\(%rip\),%r21 # 200290 <.*>
|
||||
+ +[a-f0-9]+: d5 48 2b 35 10 01 20 00 sub 0x200110\(%rip\),%r22 # 200290 <.*>
|
||||
+ +[a-f0-9]+: d5 48 33 3d 08 01 20 00 xor 0x200108\(%rip\),%r23 # 200290 <.*>
|
||||
+ +[a-f0-9]+: d5 4c 85 05 00 01 20 00 test %r24,0x200100\(%rip\) # 200290 <.*>
|
||||
+ +[a-f0-9]+: d5 40 13 05 00 01 20 00 adc 0x200100\(%rip\),%r16d # 200298 <.*>
|
||||
+ +[a-f0-9]+: d5 40 03 0d f8 00 20 00 add 0x2000f8\(%rip\),%r17d # 200298 <.*>
|
||||
+ +[a-f0-9]+: d5 40 23 15 f0 00 20 00 and 0x2000f0\(%rip\),%r18d # 200298 <.*>
|
||||
+ +[a-f0-9]+: d5 40 3b 1d e8 00 20 00 cmp 0x2000e8\(%rip\),%r19d # 200298 <.*>
|
||||
+ +[a-f0-9]+: d5 40 0b 25 e0 00 20 00 or 0x2000e0\(%rip\),%r20d # 200298 <.*>
|
||||
+ +[a-f0-9]+: d5 40 1b 2d d8 00 20 00 sbb 0x2000d8\(%rip\),%r21d # 200298 <.*>
|
||||
+ +[a-f0-9]+: d5 40 2b 35 d0 00 20 00 sub 0x2000d0\(%rip\),%r22d # 200298 <.*>
|
||||
+ +[a-f0-9]+: d5 40 33 3d c8 00 20 00 xor 0x2000c8\(%rip\),%r23d # 200298 <.*>
|
||||
+ +[a-f0-9]+: d5 44 85 05 c0 00 20 00 test %r24d,0x2000c0\(%rip\) # 200298 <.*>
|
||||
+ +[a-f0-9]+: d5 48 13 05 b8 00 20 00 adc 0x2000b8\(%rip\),%r16 # 200298 <.*>
|
||||
+ +[a-f0-9]+: d5 48 03 0d b0 00 20 00 add 0x2000b0\(%rip\),%r17 # 200298 <.*>
|
||||
+ +[a-f0-9]+: d5 48 23 15 a8 00 20 00 and 0x2000a8\(%rip\),%r18 # 200298 <.*>
|
||||
+ +[a-f0-9]+: d5 48 3b 1d a0 00 20 00 cmp 0x2000a0\(%rip\),%r19 # 200298 <.*>
|
||||
+ +[a-f0-9]+: d5 48 0b 25 98 00 20 00 or 0x200098\(%rip\),%r20 # 200298 <.*>
|
||||
+ +[a-f0-9]+: d5 48 1b 2d 90 00 20 00 sbb 0x200090\(%rip\),%r21 # 200298 <.*>
|
||||
+ +[a-f0-9]+: d5 48 2b 35 88 00 20 00 sub 0x200088\(%rip\),%r22 # 200298 <.*>
|
||||
+ +[a-f0-9]+: d5 48 33 3d 80 00 20 00 xor 0x200080\(%rip\),%r23 # 200298 <.*>
|
||||
+ +[a-f0-9]+: d5 4c 85 05 78 00 20 00 test %r24,0x200078\(%rip\) # 200298 <.*>
|
||||
+#pass
|
||||
diff -rupN binutils.orig/ld/testsuite/ld-x86-64/tlsbindesc.dd binutils-2.41/ld/testsuite/ld-x86-64/tlsbindesc.dd
|
||||
--- binutils.orig/ld/testsuite/ld-x86-64/tlsbindesc.dd 2024-07-01 15:14:02.056309227 +0100
|
||||
+++ binutils-2.41/ld/testsuite/ld-x86-64/tlsbindesc.dd 2024-07-01 15:47:08.955799034 +0100
|
||||
@@ -165,6 +165,55 @@ Disassembly of section .text:
|
||||
+[0-9a-f]+: 90[ ]+nop *
|
||||
+[0-9a-f]+: c9[ ]+leave *
|
||||
+[0-9a-f]+: c3[ ]+ret *
|
||||
+# IE against global var
|
||||
+ +[0-9a-f]+: d5 48 03 05 ([0-9a-f]{2} ){3}[ ]+add 0x[0-9a-f]+\(%rip\),%r16 +# [0-9a-f]+ <sG2>
|
||||
+# -> R_X86_64_TPOFF64 sG2
|
||||
+ +[0-9a-f]+: 00 *
|
||||
+# IE -> LE against global var defined in exec
|
||||
+ +[0-9a-f]+: d5 18 81 c1 60 ff ff[ ]+add \$0xf+60,%r17
|
||||
+# sg1
|
||||
+ +[0-9a-f]+: ff *
|
||||
+# IE -> LE against local var
|
||||
+ +[0-9a-f]+: d5 18 81 c2 80 ff ff[ ]+add \$0xf+80,%r18
|
||||
+# sl1
|
||||
+ +[0-9a-f]+: ff *
|
||||
+# IE -> LE against hidden var
|
||||
+ +[0-9a-f]+: d5 18 81 c3 a0 ff ff[ ]+add \$0xf+a0,%r19
|
||||
+# sh1
|
||||
+ +[0-9a-f]+: ff *
|
||||
+# Direct access through %fs
|
||||
+# IE against global var
|
||||
+ +[0-9a-f]+: d5 48 8b 25 ([0-9a-f]{2} ){3}[ ]+mov 0x[0-9a-f]+\(%rip\),%r20 +# [0-9a-f]+ <sG5>
|
||||
+# -> R_X86_64_TPOFF64 sG5
|
||||
+ +[0-9a-f]+: 00 *
|
||||
+# IE->LE against local var
|
||||
+ +[0-9a-f]+: d5 18 c7 c5 90 ff ff[ ]+mov \$0xf+90,%r21
|
||||
+# sl5
|
||||
+ +[0-9a-f]+: ff *
|
||||
+# IE->LE against hidden var
|
||||
+ +[0-9a-f]+: d5 18 c7 c6 b0 ff ff[ ]+mov \$0xf+b0,%r22
|
||||
+ +[0-9a-f]+: ff *
|
||||
+# GD -> IE because variable is not defined in executable
|
||||
+ +[0-9a-f]+: d5 48 8b 05 ([0-9a-f]{2} ){3}[ ]+mov 0x[0-9a-f]+\(%rip\),%r16 +# [0-9a-f]+ <sG1>
|
||||
+# -> R_X86_64_TPOFF64 sG1
|
||||
+ +[0-9a-f]+: 00 *
|
||||
+# GD -> IE because variable is not defined in executable where
|
||||
+# the variable is referenced through IE too
|
||||
+ +[0-9a-f]+: d5 48 8b 0d ([0-9a-f]{2} ){3}[ ]+mov 0x[0-9a-f]+\(%rip\),%r17 +# [0-9a-f]+ <sG2>
|
||||
+# -> R_X86_64_TPOFF64 sG2
|
||||
+ +[0-9a-f]+: 00 *
|
||||
+# GD -> LE with global variable defined in executable
|
||||
+ +[0-9a-f]+: d5 18 c7 c2 60 ff ff[ ]+mov \$0xf+60,%r18
|
||||
+# sg1
|
||||
+ +[0-9a-f]+: ff *
|
||||
+# GD -> LE with local variable defined in executable
|
||||
+ +[0-9a-f]+: d5 18 c7 c3 80 ff ff[ ]+mov \$0xf+80,%r19
|
||||
+# sl1
|
||||
+ +[0-9a-f]+: ff *
|
||||
+# GD -> LE with hidden variable defined in executable
|
||||
+ +[0-9a-f]+: d5 18 c7 c4 a0 ff ff[ ]+mov \$0xf+a0,%r20
|
||||
+# sh1
|
||||
+ +[0-9a-f]+: ff *
|
||||
|
||||
[0-9a-f]+ <_start>:
|
||||
+[0-9a-f]+: 55[ ]+push %rbp
|
||||
diff -rupN binutils.orig/ld/testsuite/ld-x86-64/tlsbindesc.rd binutils-2.41/ld/testsuite/ld-x86-64/tlsbindesc.rd
|
||||
--- binutils.orig/ld/testsuite/ld-x86-64/tlsbindesc.rd 2024-07-01 15:14:02.056309227 +0100
|
||||
+++ binutils-2.41/ld/testsuite/ld-x86-64/tlsbindesc.rd 2024-07-01 15:47:08.956799037 +0100
|
||||
@@ -15,12 +15,12 @@ Section Headers:
|
||||
+\[[ 0-9]+\] .dynsym +.*
|
||||
+\[[ 0-9]+\] .dynstr +.*
|
||||
+\[[ 0-9]+\] .rela.dyn +.*
|
||||
- +\[[ 0-9]+\] .text +PROGBITS +0+401000 0+1000 0+1fd 00 +AX +0 +0 +4096
|
||||
- +\[[ 0-9]+\] .tdata +PROGBITS +0+6011fd 0+11fd 0+60 00 WAT +0 +0 +1
|
||||
- +\[[ 0-9]+\] .tbss +NOBITS +0+60125d 0+125d 0+40 00 WAT +0 +0 +1
|
||||
- +\[[ 0-9]+\] .dynamic +DYNAMIC +0+601260 0+1260 0+100 10 +WA +4 +0 +8
|
||||
- +\[[ 0-9]+\] .got +PROGBITS +0+601360 0+1360 0+20 08 +WA +0 +0 +8
|
||||
- +\[[ 0-9]+\] .got.plt +PROGBITS +0+601380 0+1380 0+18 08 +WA +0 +0 +8
|
||||
+ +\[[ 0-9]+\] .text +PROGBITS +0+401000 0+1000 0+25d 00 +AX +0 +0 +4096
|
||||
+ +\[[ 0-9]+\] .tdata +PROGBITS +0+60125d 0+125d 0+60 00 WAT +0 +0 +1
|
||||
+ +\[[ 0-9]+\] .tbss +NOBITS +0+6012bd 0+12bd 0+40 00 WAT +0 +0 +1
|
||||
+ +\[[ 0-9]+\] .dynamic +DYNAMIC +0+6012c0 0+12c0 0+100 10 +WA +4 +0 +8
|
||||
+ +\[[ 0-9]+\] .got +PROGBITS +0+6013c0 0+13c0 0+20 08 +WA +0 +0 +8
|
||||
+ +\[[ 0-9]+\] .got.plt +PROGBITS +0+6013e0 0+13e0 0+18 08 +WA +0 +0 +8
|
||||
+\[[ 0-9]+\] .symtab +.*
|
||||
+\[[ 0-9]+\] .strtab +.*
|
||||
+\[[ 0-9]+\] .shstrtab +.*
|
||||
@@ -28,7 +28,7 @@ Key to Flags:
|
||||
#...
|
||||
|
||||
Elf file type is EXEC \(Executable file\)
|
||||
-Entry point 0x401105
|
||||
+Entry point 0x401165
|
||||
There are [0-9]+ program headers, starting at offset [0-9]+
|
||||
|
||||
Program Headers:
|
||||
@@ -36,10 +36,10 @@ Program Headers:
|
||||
+PHDR.*
|
||||
+INTERP.*
|
||||
.*Requesting program interpreter.*
|
||||
- +LOAD +0x0+ 0x0+400000 0x0+400000 0x0+11fd 0x0+11fd R E 0x200000
|
||||
- +LOAD +0x0+11fd 0x0+6011fd 0x0+6011fd 0x0+19b 0x0+19b RW +0x200000
|
||||
- +DYNAMIC +0x0+1260 0x0+601260 0x0+601260 0x0+100 0x0+100 RW +0x8
|
||||
- +TLS +0x0+11fd 0x0+6011fd 0x0+6011fd 0x0+60 0x0+a0 R +0x1
|
||||
+ +LOAD +0x0+ 0x0+400000 0x0+400000 0x0+125d 0x0+125d R E 0x200000
|
||||
+ +LOAD +0x0+125d 0x0+60125d 0x0+60125d 0x0+19b 0x0+19b RW +0x200000
|
||||
+ +DYNAMIC +0x0+12c0 0x0+6012c0 0x0+6012c0 0x0+100 0x0+100 RW +0x8
|
||||
+ +TLS +0x0+125d 0x0+60125d 0x0+60125d 0x0+60 0x0+a0 R +0x1
|
||||
|
||||
Section to Segment mapping:
|
||||
+Segment Sections...
|
||||
@@ -52,10 +52,10 @@ Program Headers:
|
||||
|
||||
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 4 entries:
|
||||
+Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
|
||||
-0+601360 +0+100000012 R_X86_64_TPOFF64 +0+ sG5 \+ 0
|
||||
-0+601368 +0+200000012 R_X86_64_TPOFF64 +0+ sG2 \+ 0
|
||||
-0+601370 +0+300000012 R_X86_64_TPOFF64 +0+ sG6 \+ 0
|
||||
-0+601378 +0+400000012 R_X86_64_TPOFF64 +0+ sG1 \+ 0
|
||||
+0+6013c0 +0+100000012 R_X86_64_TPOFF64 +0+ sG5 \+ 0
|
||||
+0+6013c8 +0+200000012 R_X86_64_TPOFF64 +0+ sG2 \+ 0
|
||||
+0+6013d0 +0+300000012 R_X86_64_TPOFF64 +0+ sG6 \+ 0
|
||||
+0+6013d8 +0+400000012 R_X86_64_TPOFF64 +0+ sG1 \+ 0
|
||||
|
||||
Symbol table '\.dynsym' contains [0-9]+ entries:
|
||||
+Num: +Value +Size +Type +Bind +Vis +Ndx +Name
|
||||
@@ -88,8 +88,8 @@ Symbol table '\.symtab' contains [0-9]+
|
||||
+[0-9]+: 0+9c +0 +TLS +LOCAL +DEFAULT +8 bl8
|
||||
.* FILE +LOCAL +DEFAULT +ABS
|
||||
+[0-9]+: 0+a0 +0 +TLS +LOCAL +DEFAULT +7 _TLS_MODULE_BASE_
|
||||
- +[0-9]+: 0+601260 +0 +OBJECT +LOCAL +DEFAULT +9 _DYNAMIC
|
||||
- +[0-9]+: 0+601380 +0 +OBJECT +LOCAL +DEFAULT +11 _GLOBAL_OFFSET_TABLE_
|
||||
+ +[0-9]+: 0+6012c0 +0 +OBJECT +LOCAL +DEFAULT +9 _DYNAMIC
|
||||
+ +[0-9]+: 0+6013e0 +0 +OBJECT +LOCAL +DEFAULT +11 _GLOBAL_OFFSET_TABLE_
|
||||
+[0-9]+: 0+1c +0 +TLS +GLOBAL +DEFAULT +7 sg8
|
||||
+[0-9]+: 0+7c +0 +TLS +GLOBAL +DEFAULT +8 bg8
|
||||
+[0-9]+: 0+74 +0 +TLS +GLOBAL +DEFAULT +8 bg6
|
||||
@@ -104,7 +104,7 @@ Symbol table '\.symtab' contains [0-9]+
|
||||
+[0-9]+: 0+58 +0 +TLS +GLOBAL +HIDDEN +7 sh7
|
||||
+[0-9]+: 0+5c +0 +TLS +GLOBAL +HIDDEN +7 sh8
|
||||
+[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +7 sg1
|
||||
- +[0-9]+: 0+401105 +0 +FUNC +GLOBAL +DEFAULT +6 _start
|
||||
+ +[0-9]+: 0+401165 +0 +FUNC +GLOBAL +DEFAULT +6 _start
|
||||
+[0-9]+: 0+4c +0 +TLS +GLOBAL +HIDDEN +7 sh4
|
||||
+[0-9]+: 0+78 +0 +TLS +GLOBAL +DEFAULT +8 bg7
|
||||
+[0-9]+: 0+50 +0 +TLS +GLOBAL +HIDDEN +7 sh5
|
||||
diff -rupN binutils.orig/ld/testsuite/ld-x86-64/tlsbindesc.s binutils-2.41/ld/testsuite/ld-x86-64/tlsbindesc.s
|
||||
--- binutils.orig/ld/testsuite/ld-x86-64/tlsbindesc.s 2024-07-01 15:14:02.056309227 +0100
|
||||
+++ binutils-2.41/ld/testsuite/ld-x86-64/tlsbindesc.s 2024-07-01 15:47:08.956799037 +0100
|
||||
@@ -126,3 +126,42 @@ fn2:
|
||||
|
||||
leave
|
||||
ret
|
||||
+
|
||||
+ /* IE against global var */
|
||||
+ addq sG2@gottpoff(%rip), %r16
|
||||
+
|
||||
+ /* IE -> LE against global var defined in exec */
|
||||
+ addq sg1@gottpoff(%rip), %r17
|
||||
+
|
||||
+ /* IE -> LE against local var */
|
||||
+ addq sl1@gottpoff(%rip), %r18
|
||||
+
|
||||
+ /* IE -> LE against hidden var */
|
||||
+ addq sh1@gottpoff(%rip), %r19
|
||||
+
|
||||
+ /* Direct access through %fs */
|
||||
+
|
||||
+ /* IE against global var */
|
||||
+ movq sG5@gottpoff(%rip), %r20
|
||||
+
|
||||
+ /* IE->LE against local var */
|
||||
+ movq sl5@gottpoff(%rip), %r21
|
||||
+
|
||||
+ /* IE->LE against hidden var */
|
||||
+ movq sh5@gottpoff(%rip), %r22
|
||||
+
|
||||
+ /* GD -> IE because variable is not defined in executable */
|
||||
+ leaq sG1@tlsdesc(%rip), %r16
|
||||
+
|
||||
+ /* GD -> IE because variable is not defined in executable where
|
||||
+ the variable is referenced through IE too */
|
||||
+ leaq sG2@tlsdesc(%rip), %r17
|
||||
+
|
||||
+ /* GD -> LE with global variable defined in executable */
|
||||
+ leaq sg1@tlsdesc(%rip), %r18
|
||||
+
|
||||
+ /* GD -> LE with local variable defined in executable */
|
||||
+ leaq sl1@tlsdesc(%rip), %r19
|
||||
+
|
||||
+ /* GD -> LE with hidden variable defined in executable */
|
||||
+ leaq sh1@tlsdesc(%rip), %r20
|
||||
diff -rupN binutils.orig/ld/testsuite/ld-x86-64/x86-64.exp binutils-2.41/ld/testsuite/ld-x86-64/x86-64.exp
|
||||
--- binutils.orig/ld/testsuite/ld-x86-64/x86-64.exp 2024-07-01 15:14:02.060309238 +0100
|
||||
+++ binutils-2.41/ld/testsuite/ld-x86-64/x86-64.exp 2024-07-01 15:45:59.397610484 +0100
|
||||
@@ -604,6 +604,10 @@ run_dump_test "load1a"
|
||||
run_dump_test "load1b"
|
||||
run_dump_test "load1c"
|
||||
run_dump_test "load1d"
|
||||
+run_dump_test "apx-load1a"
|
||||
+run_dump_test "apx-load1b"
|
||||
+run_dump_test "apx-load1c"
|
||||
+run_dump_test "apx-load1d"
|
||||
run_dump_test "load2"
|
||||
run_dump_test "call1a"
|
||||
run_dump_test "call1b"
|
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,223 @@
|
||||
diff -rup binutils.orig/bfd/bfd-in2.h binutils-2.35.1/bfd/bfd-in2.h
|
||||
--- binutils.orig/bfd/bfd-in2.h 2021-01-04 13:18:10.234368481 +0000
|
||||
+++ binutils-2.35.1/bfd/bfd-in2.h 2021-01-04 13:18:20.596301287 +0000
|
||||
@@ -1177,6 +1177,9 @@ typedef struct bfd_section
|
||||
struct bfd_symbol *symbol;
|
||||
struct bfd_symbol **symbol_ptr_ptr;
|
||||
|
||||
+ /* The matching section name pattern in linker script. */
|
||||
+ const char *pattern;
|
||||
+
|
||||
/* Early in the link process, map_head and map_tail are used to build
|
||||
a list of input sections attached to an output section. Later,
|
||||
output sections use these fields for a list of bfd_link_order
|
||||
@@ -1370,8 +1373,8 @@ discarded_section (const asection *sec)
|
||||
/* target_index, used_by_bfd, constructor_chain, owner, */ \
|
||||
0, NULL, NULL, NULL, \
|
||||
\
|
||||
- /* symbol, symbol_ptr_ptr, */ \
|
||||
- (struct bfd_symbol *) SYM, &SEC.symbol, \
|
||||
+ /* symbol, symbol_ptr_ptr, pattern, */ \
|
||||
+ (struct bfd_symbol *) SYM, &SEC.symbol, NULL, \
|
||||
\
|
||||
/* map_head, map_tail, already_assigned */ \
|
||||
{ NULL }, { NULL }, NULL \
|
||||
diff -rup binutils.orig/bfd/elflink.c binutils-2.35.1/bfd/elflink.c
|
||||
--- binutils.orig/bfd/elflink.c 2021-01-04 13:18:10.223368552 +0000
|
||||
+++ binutils-2.35.1/bfd/elflink.c 2021-01-04 13:18:20.599301268 +0000
|
||||
@@ -11662,8 +11662,21 @@ compare_link_order (const void *a, const
|
||||
const struct bfd_link_order *blo = *(const struct bfd_link_order **) b;
|
||||
asection *asec = elf_linked_to_section (alo->u.indirect.section);
|
||||
asection *bsec = elf_linked_to_section (blo->u.indirect.section);
|
||||
- bfd_vma apos = asec->output_section->lma + asec->output_offset;
|
||||
- bfd_vma bpos = bsec->output_section->lma + bsec->output_offset;
|
||||
+ bfd_vma apos, bpos;
|
||||
+
|
||||
+ /* Check if any sections are unordered. */
|
||||
+ if (asec == NULL || bsec == NULL)
|
||||
+ {
|
||||
+ /* Place ordered sections before unordered sections. */
|
||||
+ if (bsec != NULL)
|
||||
+ return 1;
|
||||
+ else if (asec != NULL)
|
||||
+ return -1;
|
||||
+ return 0;
|
||||
+ }
|
||||
+
|
||||
+ apos = asec->output_section->lma + asec->output_offset;
|
||||
+ bpos = bsec->output_section->lma + bsec->output_offset;
|
||||
|
||||
if (apos < bpos)
|
||||
return -1;
|
||||
@@ -11698,14 +11711,14 @@ compare_link_order (const void *a, const
|
||||
sections. Ideally we'd do this in the linker proper. */
|
||||
|
||||
static bfd_boolean
|
||||
-elf_fixup_link_order (bfd *abfd, asection *o)
|
||||
+elf_fixup_link_order (struct bfd_link_info *info, bfd *abfd, asection *o)
|
||||
{
|
||||
size_t seen_linkorder;
|
||||
size_t seen_other;
|
||||
size_t n;
|
||||
struct bfd_link_order *p;
|
||||
bfd *sub;
|
||||
- struct bfd_link_order **sections;
|
||||
+ struct bfd_link_order **sections, **indirect_sections;
|
||||
asection *other_sec, *linkorder_sec;
|
||||
bfd_vma offset; /* Octets. */
|
||||
|
||||
@@ -11736,7 +11749,9 @@ elf_fixup_link_order (bfd *abfd, asectio
|
||||
else
|
||||
seen_other++;
|
||||
|
||||
- if (seen_other && seen_linkorder)
|
||||
+ /* Allow mixed ordered and unordered input sections for
|
||||
+ non-relocatable link. */
|
||||
+ if (bfd_link_relocatable (info) && seen_other && seen_linkorder)
|
||||
{
|
||||
if (other_sec && linkorder_sec)
|
||||
_bfd_error_handler
|
||||
@@ -11756,6 +11771,10 @@ elf_fixup_link_order (bfd *abfd, asectio
|
||||
if (!seen_linkorder)
|
||||
return TRUE;
|
||||
|
||||
+ /* Non-relocatable output can have both ordered and unordered input
|
||||
+ sections. */
|
||||
+ seen_linkorder += seen_other;
|
||||
+
|
||||
sections = bfd_malloc (seen_linkorder * sizeof (*sections));
|
||||
if (sections == NULL)
|
||||
return FALSE;
|
||||
@@ -11764,22 +11783,51 @@ elf_fixup_link_order (bfd *abfd, asectio
|
||||
for (p = o->map_head.link_order; p != NULL; p = p->next)
|
||||
sections[seen_linkorder++] = p;
|
||||
|
||||
- /* Sort the input sections in the order of their linked section. */
|
||||
- qsort (sections, seen_linkorder, sizeof (*sections), compare_link_order);
|
||||
+ for (indirect_sections = sections, n = 0; n < seen_linkorder;)
|
||||
+ {
|
||||
+ /* Find the first bfd_indirect_link_order section. */
|
||||
+ if (indirect_sections[0]->type == bfd_indirect_link_order)
|
||||
+ {
|
||||
+ /* Count the consecutive bfd_indirect_link_order sections
|
||||
+ with the same pattern. */
|
||||
+ size_t i, n_indirect;
|
||||
+ const char *pattern
|
||||
+ = indirect_sections[0]->u.indirect.section->pattern;
|
||||
+ for (i = n + 1; i < seen_linkorder; i++)
|
||||
+ if (sections[i]->type != bfd_indirect_link_order
|
||||
+ || sections[i]->u.indirect.section->pattern != pattern)
|
||||
+ break;
|
||||
+ n_indirect = i - n;
|
||||
+ /* Sort the bfd_indirect_link_order sections in the order of
|
||||
+ their linked section. */
|
||||
+ qsort (indirect_sections, n_indirect, sizeof (*sections),
|
||||
+ compare_link_order);
|
||||
+ indirect_sections += n_indirect;
|
||||
+ n += n_indirect;
|
||||
+ }
|
||||
+ else
|
||||
+ {
|
||||
+ indirect_sections++;
|
||||
+ n++;
|
||||
+ }
|
||||
+ }
|
||||
|
||||
- /* Change the offsets of the sections. */
|
||||
+ /* Change the offsets of the bfd_indirect_link_order sections. */
|
||||
offset = 0;
|
||||
for (n = 0; n < seen_linkorder; n++)
|
||||
- {
|
||||
- bfd_vma mask;
|
||||
- asection *s = sections[n]->u.indirect.section;
|
||||
- unsigned int opb = bfd_octets_per_byte (abfd, s);
|
||||
-
|
||||
- mask = ~(bfd_vma) 0 << s->alignment_power * opb;
|
||||
- offset = (offset + ~mask) & mask;
|
||||
- sections[n]->offset = s->output_offset = offset / opb;
|
||||
- offset += sections[n]->size;
|
||||
- }
|
||||
+ if (sections[n]->type == bfd_indirect_link_order)
|
||||
+ {
|
||||
+ bfd_vma mask;
|
||||
+ asection *s = sections[n]->u.indirect.section;
|
||||
+ unsigned int opb = bfd_octets_per_byte (abfd, s);
|
||||
+
|
||||
+ mask = ~(bfd_vma) 0 << s->alignment_power * opb;
|
||||
+ offset = (offset + ~mask) & mask;
|
||||
+ sections[n]->offset = s->output_offset = offset / opb;
|
||||
+ offset += sections[n]->size;
|
||||
+ }
|
||||
+ else
|
||||
+ offset = sections[n]->offset + sections[n]->size;
|
||||
|
||||
free (sections);
|
||||
return TRUE;
|
||||
@@ -12408,7 +12456,7 @@ bfd_elf_final_link (bfd *abfd, struct bf
|
||||
/* Reorder SHF_LINK_ORDER sections. */
|
||||
for (o = abfd->sections; o != NULL; o = o->next)
|
||||
{
|
||||
- if (!elf_fixup_link_order (abfd, o))
|
||||
+ if (!elf_fixup_link_order (info, abfd, o))
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
diff -rup binutils.orig/bfd/section.c binutils-2.35.1/bfd/section.c
|
||||
--- binutils.orig/bfd/section.c 2021-01-04 13:18:10.233368487 +0000
|
||||
+++ binutils-2.35.1/bfd/section.c 2021-01-04 13:18:20.599301268 +0000
|
||||
@@ -541,6 +541,9 @@ CODE_FRAGMENT
|
||||
. struct bfd_symbol *symbol;
|
||||
. struct bfd_symbol **symbol_ptr_ptr;
|
||||
.
|
||||
+. {* The matching section name pattern in linker script. *}
|
||||
+. const char *pattern;
|
||||
+.
|
||||
. {* Early in the link process, map_head and map_tail are used to build
|
||||
. a list of input sections attached to an output section. Later,
|
||||
. output sections use these fields for a list of bfd_link_order
|
||||
@@ -734,8 +737,8 @@ CODE_FRAGMENT
|
||||
. {* target_index, used_by_bfd, constructor_chain, owner, *} \
|
||||
. 0, NULL, NULL, NULL, \
|
||||
. \
|
||||
-. {* symbol, symbol_ptr_ptr, *} \
|
||||
-. (struct bfd_symbol *) SYM, &SEC.symbol, \
|
||||
+. {* symbol, symbol_ptr_ptr, pattern, *} \
|
||||
+. (struct bfd_symbol *) SYM, &SEC.symbol, NULL, \
|
||||
. \
|
||||
. {* map_head, map_tail, already_assigned *} \
|
||||
. { NULL }, { NULL }, NULL \
|
||||
diff -rup binutils.orig/gas/config/obj-elf.c binutils-2.35.1/gas/config/obj-elf.c
|
||||
--- binutils.orig/gas/config/obj-elf.c 2021-01-04 13:18:09.942370375 +0000
|
||||
+++ binutils-2.35.1/gas/config/obj-elf.c 2021-01-04 13:18:20.599301268 +0000
|
||||
@@ -659,7 +659,9 @@ obj_elf_change_section (const char *name
|
||||
}
|
||||
}
|
||||
|
||||
- if (old_sec == NULL && ((attr & ~(SHF_MASKOS | SHF_MASKPROC))
|
||||
+ if (old_sec == NULL && ((attr & ~(SHF_LINK_ORDER
|
||||
+ | SHF_MASKOS
|
||||
+ | SHF_MASKPROC))
|
||||
& ~ssect->attr) != 0)
|
||||
{
|
||||
/* As a GNU extension, we permit a .note section to be
|
||||
diff -rup binutils.orig/ld/ldlang.c binutils-2.35.1/ld/ldlang.c
|
||||
--- binutils.orig/ld/ldlang.c 2021-01-04 13:18:09.691372002 +0000
|
||||
+++ binutils-2.35.1/ld/ldlang.c 2021-01-04 13:18:20.600301261 +0000
|
||||
@@ -7421,7 +7421,7 @@ lang_reset_memory_regions (void)
|
||||
|
||||
static void
|
||||
gc_section_callback (lang_wild_statement_type *ptr,
|
||||
- struct wildcard_list *sec ATTRIBUTE_UNUSED,
|
||||
+ struct wildcard_list *sec,
|
||||
asection *section,
|
||||
struct flag_info *sflag_info ATTRIBUTE_UNUSED,
|
||||
lang_input_statement_type *file ATTRIBUTE_UNUSED,
|
||||
@@ -7431,6 +7431,8 @@ gc_section_callback (lang_wild_statement
|
||||
should be as well. */
|
||||
if (ptr->keep_sections)
|
||||
section->flags |= SEC_KEEP;
|
||||
+ if (sec)
|
||||
+ section->pattern = sec->spec.name;
|
||||
}
|
||||
|
||||
/* Iterate over sections marking them against GC. */
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,139 +0,0 @@
|
||||
diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
|
||||
index 4592bd6da27..4faf642b422 100644
|
||||
--- a/bfd/elfnn-aarch64.c
|
||||
+++ b/bfd/elfnn-aarch64.c
|
||||
@@ -3675,7 +3675,7 @@ group_sections (struct elf_aarch64_link_hash_table *htab,
|
||||
/* True if the inserted stub does not break BTI compatibility. */
|
||||
|
||||
static bool
|
||||
-aarch64_bti_stub_p (bfd *input_bfd,
|
||||
+aarch64_bti_stub_p (struct bfd_link_info *info,
|
||||
struct elf_aarch64_stub_hash_entry *stub_entry)
|
||||
{
|
||||
/* Stubs without indirect branch are BTI compatible. */
|
||||
@@ -3685,12 +3685,22 @@ aarch64_bti_stub_p (bfd *input_bfd,
|
||||
|
||||
/* Return true if the target instruction is compatible with BR x16. */
|
||||
|
||||
+ struct elf_aarch64_link_hash_table *globals = elf_aarch64_hash_table (info);
|
||||
asection *section = stub_entry->target_section;
|
||||
bfd_byte loc[4];
|
||||
file_ptr off = stub_entry->target_value;
|
||||
bfd_size_type count = sizeof (loc);
|
||||
|
||||
- if (!bfd_get_section_contents (input_bfd, section, loc, off, count))
|
||||
+ /* PLT code is not generated yet, so treat it specially.
|
||||
+ Note: Checking elf_aarch64_obj_tdata.plt_type & PLT_BTI is not
|
||||
+ enough because it only implies BTI in the PLT0 and tlsdesc PLT
|
||||
+ entries. Normal PLT entries don't have BTI in a shared library
|
||||
+ (because such PLT is normally not called indirectly and adding
|
||||
+ the BTI when a stub targets a PLT would change the PLT layout
|
||||
+ and it's too late for that here). */
|
||||
+ if (section == globals->root.splt)
|
||||
+ memcpy (loc, globals->plt_entry, count);
|
||||
+ else if (!bfd_get_section_contents (section->owner, section, loc, off, count))
|
||||
return false;
|
||||
|
||||
uint32_t insn = bfd_getl32 (loc);
|
||||
@@ -4637,11 +4647,24 @@ _bfd_aarch64_add_call_stub_entries (bool *stub_changed, bfd *output_bfd,
|
||||
|
||||
/* A stub with indirect jump may break BTI compatibility, so
|
||||
insert another stub with direct jump near the target then. */
|
||||
- if (need_bti && !aarch64_bti_stub_p (input_bfd, stub_entry))
|
||||
+ if (need_bti && !aarch64_bti_stub_p (info, stub_entry))
|
||||
{
|
||||
+ id_sec_bti = htab->stub_group[sym_sec->id].link_sec;
|
||||
+
|
||||
+ /* If the stub with indirect jump and the BTI stub are in
|
||||
+ the same stub group: change the indirect jump stub into
|
||||
+ a BTI stub since a direct branch can reach the target.
|
||||
+ The BTI landing pad is still needed in case another
|
||||
+ stub indirectly jumps to it. */
|
||||
+ if (id_sec_bti == id_sec)
|
||||
+ {
|
||||
+ stub_entry->stub_type = aarch64_stub_bti_direct_branch;
|
||||
+ goto skip_double_stub;
|
||||
+ }
|
||||
+
|
||||
stub_entry->double_stub = true;
|
||||
htab->has_double_stub = true;
|
||||
- id_sec_bti = htab->stub_group[sym_sec->id].link_sec;
|
||||
+
|
||||
stub_name_bti =
|
||||
elfNN_aarch64_stub_name (id_sec_bti, sym_sec, hash, irela);
|
||||
if (!stub_name_bti)
|
||||
@@ -4653,33 +4676,41 @@ _bfd_aarch64_add_call_stub_entries (bool *stub_changed, bfd *output_bfd,
|
||||
stub_entry_bti =
|
||||
aarch64_stub_hash_lookup (&htab->stub_hash_table,
|
||||
stub_name_bti, false, false);
|
||||
- if (stub_entry_bti == NULL)
|
||||
- stub_entry_bti =
|
||||
- _bfd_aarch64_add_stub_entry_in_group (stub_name_bti,
|
||||
- sym_sec, htab);
|
||||
- if (stub_entry_bti == NULL)
|
||||
+ if (stub_entry_bti != NULL)
|
||||
+ BFD_ASSERT (stub_entry_bti->stub_type
|
||||
+ == aarch64_stub_bti_direct_branch);
|
||||
+ else
|
||||
{
|
||||
- free (stub_name);
|
||||
- free (stub_name_bti);
|
||||
- goto error_ret_free_internal;
|
||||
- }
|
||||
-
|
||||
- stub_entry_bti->target_value = sym_value + irela->r_addend;
|
||||
- stub_entry_bti->target_section = sym_sec;
|
||||
- stub_entry_bti->stub_type = aarch64_stub_bti_direct_branch;
|
||||
- stub_entry_bti->h = hash;
|
||||
- stub_entry_bti->st_type = st_type;
|
||||
+ stub_entry_bti =
|
||||
+ _bfd_aarch64_add_stub_entry_in_group (stub_name_bti,
|
||||
+ sym_sec, htab);
|
||||
+ if (stub_entry_bti == NULL)
|
||||
+ {
|
||||
+ free (stub_name);
|
||||
+ free (stub_name_bti);
|
||||
+ goto error_ret_free_internal;
|
||||
+ }
|
||||
|
||||
- len = sizeof (BTI_STUB_ENTRY_NAME) + strlen (sym_name);
|
||||
- stub_entry_bti->output_name = bfd_alloc (htab->stub_bfd, len);
|
||||
- if (stub_entry_bti->output_name == NULL)
|
||||
- {
|
||||
- free (stub_name);
|
||||
- free (stub_name_bti);
|
||||
- goto error_ret_free_internal;
|
||||
+ stub_entry_bti->target_value =
|
||||
+ sym_value + irela->r_addend;
|
||||
+ stub_entry_bti->target_section = sym_sec;
|
||||
+ stub_entry_bti->stub_type =
|
||||
+ aarch64_stub_bti_direct_branch;
|
||||
+ stub_entry_bti->h = hash;
|
||||
+ stub_entry_bti->st_type = st_type;
|
||||
+
|
||||
+ len = sizeof (BTI_STUB_ENTRY_NAME) + strlen (sym_name);
|
||||
+ stub_entry_bti->output_name = bfd_alloc (htab->stub_bfd,
|
||||
+ len);
|
||||
+ if (stub_entry_bti->output_name == NULL)
|
||||
+ {
|
||||
+ free (stub_name);
|
||||
+ free (stub_name_bti);
|
||||
+ goto error_ret_free_internal;
|
||||
+ }
|
||||
+ snprintf (stub_entry_bti->output_name, len,
|
||||
+ BTI_STUB_ENTRY_NAME, sym_name);
|
||||
}
|
||||
- snprintf (stub_entry_bti->output_name, len,
|
||||
- BTI_STUB_ENTRY_NAME, sym_name);
|
||||
|
||||
/* Update the indirect call stub to target the BTI stub. */
|
||||
stub_entry->target_value = 0;
|
||||
@@ -4688,7 +4719,7 @@ _bfd_aarch64_add_call_stub_entries (bool *stub_changed, bfd *output_bfd,
|
||||
stub_entry->h = NULL;
|
||||
stub_entry->st_type = STT_FUNC;
|
||||
}
|
||||
-
|
||||
+skip_double_stub:
|
||||
*stub_changed = true;
|
||||
}
|
||||
|
||||
@ -0,0 +1,93 @@
|
||||
diff -rup binutils.orig/bfd/elfnn-aarch64.c binutils-2.35/bfd/elfnn-aarch64.c
|
||||
--- binutils.orig/bfd/elfnn-aarch64.c 2020-09-10 17:03:31.738458044 +0100
|
||||
+++ binutils-2.35/bfd/elfnn-aarch64.c 2020-09-10 17:04:03.643344898 +0100
|
||||
@@ -5445,7 +5445,6 @@ elfNN_aarch64_final_link_relocate (reloc
|
||||
bfd_vma orig_value = value;
|
||||
bfd_boolean resolved_to_zero;
|
||||
bfd_boolean abs_symbol_p;
|
||||
- bfd_boolean via_plt_p;
|
||||
|
||||
globals = elf_aarch64_hash_table (info);
|
||||
|
||||
@@ -5467,8 +5466,6 @@ elfNN_aarch64_final_link_relocate (reloc
|
||||
: bfd_is_und_section (sym_sec));
|
||||
abs_symbol_p = h != NULL && bfd_is_abs_symbol (&h->root);
|
||||
|
||||
- via_plt_p = (globals->root.splt != NULL && h != NULL
|
||||
- && h->plt.offset != (bfd_vma) - 1);
|
||||
|
||||
/* Since STT_GNU_IFUNC symbol must go through PLT, we handle
|
||||
it here if it is defined in a non-shared object. */
|
||||
@@ -5805,23 +5802,12 @@ elfNN_aarch64_final_link_relocate (reloc
|
||||
value += signed_addend;
|
||||
break;
|
||||
|
||||
- case BFD_RELOC_AARCH64_BRANCH19:
|
||||
- case BFD_RELOC_AARCH64_TSTBR14:
|
||||
- /* A conditional branch to an undefined weak symbol is converted to a
|
||||
- branch to itself. */
|
||||
- if (weak_undef_p && !via_plt_p)
|
||||
- {
|
||||
- value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
|
||||
- place, value,
|
||||
- signed_addend,
|
||||
- weak_undef_p);
|
||||
- break;
|
||||
- }
|
||||
- /* Fall through. */
|
||||
case BFD_RELOC_AARCH64_CALL26:
|
||||
case BFD_RELOC_AARCH64_JUMP26:
|
||||
{
|
||||
asection *splt = globals->root.splt;
|
||||
+ bfd_boolean via_plt_p =
|
||||
+ splt != NULL && h != NULL && h->plt.offset != (bfd_vma) - 1;
|
||||
|
||||
/* A call to an undefined weak symbol is converted to a jump to
|
||||
the next instruction unless a PLT entry will be created.
|
||||
@@ -5902,6 +5888,23 @@ elfNN_aarch64_final_link_relocate (reloc
|
||||
bfd_set_error (bfd_error_bad_value);
|
||||
return bfd_reloc_notsupported;
|
||||
}
|
||||
+ value = _bfd_aarch64_elf_resolve_relocation (input_bfd, bfd_r_type,
|
||||
+ place, value,
|
||||
+ signed_addend,
|
||||
+ weak_undef_p);
|
||||
+ break;
|
||||
+
|
||||
+ case BFD_RELOC_AARCH64_BRANCH19:
|
||||
+ case BFD_RELOC_AARCH64_TSTBR14:
|
||||
+ if (h && h->root.type == bfd_link_hash_undefined)
|
||||
+ {
|
||||
+ _bfd_error_handler
|
||||
+ /* xgettext:c-format */
|
||||
+ (_("%pB: conditional branch to undefined symbol `%s' "
|
||||
+ "not allowed"), input_bfd, h->root.root.string);
|
||||
+ bfd_set_error (bfd_error_bad_value);
|
||||
+ return bfd_reloc_notsupported;
|
||||
+ }
|
||||
/* Fall through. */
|
||||
|
||||
case BFD_RELOC_AARCH64_16:
|
||||
@@ -7967,8 +7970,6 @@ elfNN_aarch64_check_relocs (bfd *abfd, s
|
||||
break;
|
||||
}
|
||||
|
||||
- case BFD_RELOC_AARCH64_BRANCH19:
|
||||
- case BFD_RELOC_AARCH64_TSTBR14:
|
||||
case BFD_RELOC_AARCH64_CALL26:
|
||||
case BFD_RELOC_AARCH64_JUMP26:
|
||||
/* If this is a local symbol then we resolve it
|
||||
Only in binutils-2.35/bfd: elfnn-aarch64.c.orig
|
||||
diff -rup binutils.orig/ld/testsuite/ld-aarch64/emit-relocs-560.d binutils-2.35/ld/testsuite/ld-aarch64/emit-relocs-560.d
|
||||
--- binutils.orig/ld/testsuite/ld-aarch64/emit-relocs-560.d 2020-09-10 17:03:31.067460424 +0100
|
||||
+++ binutils-2.35/ld/testsuite/ld-aarch64/emit-relocs-560.d 2020-09-10 17:04:03.644344895 +0100
|
||||
@@ -1,8 +1,3 @@
|
||||
#source: emit-relocs-560.s
|
||||
#ld: -shared
|
||||
-#readelf: -r
|
||||
-
|
||||
-Relocation section '.rela.plt' at offset 0x[0-9a-f]+ contains 2 entries:
|
||||
- Offset Info Type Sym. Value Sym. Name \+ Addend
|
||||
-[0-9a-f]+ 000100000402 R_AARCH64_JUMP_SL 0000000000000000 baz \+ 0
|
||||
-[0-9a-f]+ 000200000402 R_AARCH64_JUMP_SL 0000000000000000 bar \+ 0
|
||||
+#error: .*: conditional branch to undefined symbol `bar' not allowed
|
||||
@ -0,0 +1,152 @@
|
||||
diff -rup binutils.orig/gas/NEWS binutils-2.35.2/gas/NEWS
|
||||
--- binutils.orig/gas/NEWS 2023-04-26 11:29:49.525097847 +0100
|
||||
+++ binutils-2.35.2/gas/NEWS 2023-04-26 11:30:59.811955065 +0100
|
||||
@@ -1,5 +1,7 @@
|
||||
-*- text -*-
|
||||
|
||||
+* Add support for +flagm feature for -march in Armv8.4 AArch64.
|
||||
+
|
||||
* Add support for Intel AMX instructions.
|
||||
|
||||
* Add {disp16} pseudo prefix to x86 assembler.
|
||||
diff -rup binutils.orig/gas/config/tc-aarch64.c binutils-2.35.2/gas/config/tc-aarch64.c
|
||||
--- binutils.orig/gas/config/tc-aarch64.c 2023-04-26 11:29:48.944099025 +0100
|
||||
+++ binutils-2.35.2/gas/config/tc-aarch64.c 2023-04-26 11:31:42.994864009 +0100
|
||||
@@ -9080,6 +9080,8 @@ static const struct aarch64_option_cpu_v
|
||||
AARCH64_FEATURE (AARCH64_FEATURE_SVE, 0)},
|
||||
{"f64mm", AARCH64_FEATURE (AARCH64_FEATURE_F64MM, 0),
|
||||
AARCH64_FEATURE (AARCH64_FEATURE_SVE, 0)},
|
||||
+ {"flagm", AARCH64_FEATURE (AARCH64_FEATURE_FLAGM, 0),
|
||||
+ AARCH64_ARCH_NONE},
|
||||
{NULL, AARCH64_ARCH_NONE, AARCH64_ARCH_NONE},
|
||||
};
|
||||
|
||||
diff -rup binutils.orig/gas/doc/c-aarch64.texi binutils-2.35.2/gas/doc/c-aarch64.texi
|
||||
--- binutils.orig/gas/doc/c-aarch64.texi 2023-04-26 11:29:48.881099153 +0100
|
||||
+++ binutils-2.35.2/gas/doc/c-aarch64.texi 2023-04-26 11:32:22.402780914 +0100
|
||||
@@ -222,6 +222,8 @@ automatically cause those extensions to
|
||||
@code{pmullt} and @code{pmullb} instructions.
|
||||
@item @code{sve2-sha3} @tab ARMv8-A @tab No
|
||||
@tab Enable SVE2 SHA3 Extension.
|
||||
+@item @code{flagm} @tab ARMv8-A @tab ARMv8.4-A or later
|
||||
+ @tab Enable Flag Manipulation instructions.
|
||||
@end multitable
|
||||
|
||||
@node AArch64 Syntax
|
||||
diff -rup binutils.orig/include/opcode/aarch64.h binutils-2.35.2/include/opcode/aarch64.h
|
||||
--- binutils.orig/include/opcode/aarch64.h 2023-04-26 11:29:48.702099517 +0100
|
||||
+++ binutils-2.35.2/include/opcode/aarch64.h 2023-04-26 11:35:17.346412224 +0100
|
||||
@@ -69,7 +69,7 @@ typedef uint32_t aarch64_insn;
|
||||
#define AARCH64_FEATURE_AES (1ULL << 35) /* AES instructions. */
|
||||
#define AARCH64_FEATURE_F16_FML (1ULL << 36) /* v8.2 FP16FML ins. */
|
||||
#define AARCH64_FEATURE_V8_5 (1ULL << 37) /* ARMv8.5 processors. */
|
||||
-#define AARCH64_FEATURE_FLAGMANIP (1ULL << 38) /* Flag Manipulation insns. */
|
||||
+#define AARCH64_FEATURE_FLAGMANIP (1ULL << 38) /* v8.5 Flag Manipulation version 2. */
|
||||
#define AARCH64_FEATURE_FRINTTS (1ULL << 39) /* FRINT[32,64][Z,X] insns. */
|
||||
#define AARCH64_FEATURE_SB (1ULL << 40) /* SB instruction. */
|
||||
#define AARCH64_FEATURE_PREDRES (1ULL << 41) /* Execution and Data Prediction Restriction instructions. */
|
||||
@@ -84,6 +84,7 @@ typedef uint32_t aarch64_insn;
|
||||
#define AARCH64_FEATURE_I8MM (1ULL << 52) /* Matrix Multiply instructions. */
|
||||
#define AARCH64_FEATURE_F32MM (1ULL << 53)
|
||||
#define AARCH64_FEATURE_F64MM (1ULL << 54)
|
||||
+#define AARCH64_FEATURE_FLAGM (1ULL << 55) /* v8.4 Flag Manipulation. */
|
||||
|
||||
/* Crypto instructions are the combination of AES and SHA2. */
|
||||
#define AARCH64_FEATURE_CRYPTO (AARCH64_FEATURE_SHA2 | AARCH64_FEATURE_AES)
|
||||
@@ -109,6 +110,7 @@ typedef uint32_t aarch64_insn;
|
||||
#define AARCH64_ARCH_V8_4 AARCH64_FEATURE (AARCH64_ARCH_V8_3, \
|
||||
AARCH64_FEATURE_V8_4 \
|
||||
| AARCH64_FEATURE_DOTPROD \
|
||||
+ | AARCH64_FEATURE_FLAGM \
|
||||
| AARCH64_FEATURE_F16_FML)
|
||||
#define AARCH64_ARCH_V8_5 AARCH64_FEATURE (AARCH64_ARCH_V8_4, \
|
||||
AARCH64_FEATURE_V8_5 \
|
||||
diff -rup binutils.orig/opcodes/aarch64-tbl.h binutils-2.35.2/opcodes/aarch64-tbl.h
|
||||
--- binutils.orig/opcodes/aarch64-tbl.h 2023-04-26 11:29:48.705099511 +0100
|
||||
+++ binutils-2.35.2/opcodes/aarch64-tbl.h 2023-04-26 11:37:27.299161621 +0100
|
||||
@@ -2406,6 +2406,8 @@ static const aarch64_feature_set aarch64
|
||||
static const aarch64_feature_set aarch64_feature_f64mm_sve =
|
||||
AARCH64_FEATURE (AARCH64_FEATURE_V8_2 | AARCH64_FEATURE_F64MM
|
||||
| AARCH64_FEATURE_SVE, 0);
|
||||
+static const aarch64_feature_set aarch64_feature_flagm =
|
||||
+ AARCH64_FEATURE (AARCH64_FEATURE_FLAGM, 0);
|
||||
|
||||
|
||||
#define CORE &aarch64_feature_v8
|
||||
@@ -2450,6 +2452,7 @@ static const aarch64_feature_set aarch64
|
||||
#define F32MM_SVE &aarch64_feature_f32mm_sve
|
||||
#define F64MM_SVE &aarch64_feature_f64mm_sve
|
||||
#define I8MM &aarch64_feature_i8mm
|
||||
+#define FLAGM &aarch64_feature_flagm
|
||||
|
||||
#define CORE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \
|
||||
{ NAME, OPCODE, MASK, CLASS, OP, CORE, OPS, QUALS, FLAGS, 0, 0, NULL }
|
||||
@@ -2553,6 +2556,8 @@ static const aarch64_feature_set aarch64
|
||||
{ NAME, OPCODE, MASK, CLASS, 0, F64MM_SVE, OPS, QUALS, FLAGS, CONSTRAINTS, TIED, NULL }
|
||||
#define F32MATMUL_SVE_INSNC(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS, CONSTRAINTS, TIED) \
|
||||
{ NAME, OPCODE, MASK, CLASS, 0, F32MM_SVE, OPS, QUALS, FLAGS, CONSTRAINTS, TIED, NULL }
|
||||
+#define FLAGM_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
|
||||
+ { NAME, OPCODE, MASK, CLASS, 0, FLAGM, OPS, QUALS, FLAGS, 0, 0, NULL }
|
||||
|
||||
struct aarch64_opcode aarch64_opcode_table[] =
|
||||
{
|
||||
@@ -3865,7 +3870,7 @@ struct aarch64_opcode aarch64_opcode_tab
|
||||
potentially alias with too many instructions and so the tree can't be constructed. As a work
|
||||
around we just place cfinv before msr. This means the order between these two shouldn't be
|
||||
changed. */
|
||||
- V8_4_INSN ("cfinv", 0xd500401f, 0xffffffff, ic_system, OP0 (), {}, 0),
|
||||
+ FLAGM_INSN ("cfinv", 0xd500401f, 0xffffffff, ic_system, OP0 (), {}, 0),
|
||||
CORE_INSN ("msr", 0xd5000000, 0xffe00000, ic_system, 0, OP2 (SYSREG, Rt), QL_SRC_X, F_SYS_WRITE),
|
||||
CORE_INSN ("sysl",0xd5280000, 0xfff80000, ic_system, 0, OP5 (Rt, UIMM3_OP1, CRn, CRm, UIMM3_OP2), QL_SYSL, 0),
|
||||
CORE_INSN ("mrs", 0xd5200000, 0xffe00000, ic_system, 0, OP2 (Rt, SYSREG), QL_DST_X, F_SYS_READ),
|
||||
@@ -5043,9 +5048,9 @@ struct aarch64_opcode aarch64_opcode_tab
|
||||
FP16_V8_2_INSN ("fmlal2", 0x6f808000, 0xffc0f400, asimdelem, OP3 (Vd, Vn, Em16), QL_V2FML4S, 0),
|
||||
FP16_V8_2_INSN ("fmlsl2", 0x6f80c000, 0xffc0f400, asimdelem, OP3 (Vd, Vn, Em16), QL_V2FML4S, 0),
|
||||
/* System extensions ARMv8.4-a. */
|
||||
- V8_4_INSN ("rmif", 0xba000400, 0xffe07c10, ic_system, OP3 (Rn, IMM_2, MASK), QL_RMIF, 0),
|
||||
- V8_4_INSN ("setf8", 0x3a00080d, 0xfffffc1f, ic_system, OP1 (Rn), QL_SETF, 0),
|
||||
- V8_4_INSN ("setf16", 0x3a00480d, 0xfffffc1f, ic_system, OP1 (Rn), QL_SETF, 0),
|
||||
+ FLAGM_INSN ("rmif", 0xba000400, 0xffe07c10, ic_system, OP3 (Rn, IMM_2, MASK), QL_RMIF, 0),
|
||||
+ FLAGM_INSN ("setf8", 0x3a00080d, 0xfffffc1f, ic_system, OP1 (Rn), QL_SETF, 0),
|
||||
+ FLAGM_INSN ("setf16", 0x3a00480d, 0xfffffc1f, ic_system, OP1 (Rn), QL_SETF, 0),
|
||||
/* Memory access instructions ARMv8.4-a. */
|
||||
V8_4_INSN ("stlurb" , 0x19000000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
|
||||
V8_4_INSN ("ldapurb", 0x19400000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
|
||||
--- /dev/null 2023-04-26 09:16:03.694889721 +0100
|
||||
+++ binutils-2.35.2/gas/testsuite/gas/aarch64/flagm.d 2023-04-26 11:33:08.910682842 +0100
|
||||
@@ -0,0 +1,16 @@
|
||||
+#name: FLAGM (Condition flag manipulation) feature
|
||||
+#objdump: -dr
|
||||
+
|
||||
+.*: file format .*
|
||||
+
|
||||
+Disassembly of section \.text:
|
||||
+
|
||||
+0+ <.*>:
|
||||
+.*: d500401f cfinv
|
||||
+.*: ba0407cf rmif x30, #8, #15
|
||||
+.*: 3a00080d setf8 w0
|
||||
+.*: 3a00480d setf16 w0
|
||||
+.*: d500401f cfinv
|
||||
+.*: ba0407cf rmif x30, #8, #15
|
||||
+.*: 3a00080d setf8 w0
|
||||
+.*: 3a00480d setf16 w0
|
||||
--- /dev/null 2023-04-26 09:16:03.694889721 +0100
|
||||
+++ binutils-2.35.2/gas/testsuite/gas/aarch64/flagm.s 2023-04-26 11:39:10.597962432 +0100
|
||||
@@ -0,0 +1,16 @@
|
||||
+/* FLAGM (Condition flag manipulation) feature from Armv8.4-A. */
|
||||
+.arch armv8.4-a
|
||||
+
|
||||
+ cfinv
|
||||
+ rmif x30, #8, #15
|
||||
+ setf8 w0
|
||||
+ setf16 w0
|
||||
+
|
||||
+
|
||||
+/* FLAGM feature enabled with +flagm. */
|
||||
+.arch armv8-a+flagm
|
||||
+
|
||||
+ cfinv
|
||||
+ rmif x30, #8, #15
|
||||
+ setf8 w0
|
||||
+ setf16 w0
|
||||
@ -0,0 +1,53 @@
|
||||
Only in binutils-2.35.2/gas/testsuite/gas/aarch64: rng-1.d
|
||||
Only in binutils-2.35.2/gas/testsuite/gas/aarch64: rng-1.s
|
||||
diff -rup binutils.orig/opcodes/aarch64-opc.c binutils-2.35.2/opcodes/aarch64-opc.c
|
||||
--- binutils.orig/opcodes/aarch64-opc.c 2022-04-05 11:50:10.131798329 +0100
|
||||
+++ binutils-2.35.2/opcodes/aarch64-opc.c 2022-04-05 11:54:32.596827591 +0100
|
||||
@@ -3810,9 +3810,6 @@ aarch64_print_operand (char *buf, size_t
|
||||
#define SR_FEAT(n,e,f,feat) \
|
||||
SYSREG ((n), (e), (f) | F_ARCHEXT, AARCH64_FEATURE_##feat)
|
||||
|
||||
-#define SR_RNG(n,e,f) \
|
||||
- SYSREG ((n), (e), (f) | F_ARCHEXT, AARCH64_FEATURE_RNG | AARCH64_FEATURE_V8_5)
|
||||
-
|
||||
#define SR_V8_1(n,e,f) SR_FEAT (n,e,f,V8_1)
|
||||
#define SR_V8_2(n,e,f) SR_FEAT (n,e,f,V8_2)
|
||||
#define SR_V8_3(n,e,f) SR_FEAT (n,e,f,V8_3)
|
||||
@@ -3820,6 +3817,7 @@ aarch64_print_operand (char *buf, size_t
|
||||
#define SR_V8_4(n,e,f) SR_FEAT (n,e,f,V8_4)
|
||||
#define SR_PAN(n,e,f) SR_FEAT (n,e,f,PAN)
|
||||
#define SR_RAS(n,e,f) SR_FEAT (n,e,f,RAS)
|
||||
+#define SR_RNG(n,e,f) SR_FEAT (n,e,f,RNG)
|
||||
#define SR_SSBS(n,e,f) SR_FEAT (n,e,f,SSBS)
|
||||
#define SR_SVE(n,e,f) SR_FEAT (n,e,f,SVE)
|
||||
#define SR_ID_PFR2(n,e,f) SR_FEAT (n,e,f,ID_PFR2)
|
||||
--- /dev/null 2022-04-05 09:32:54.900867346 +0100
|
||||
+++ binutils-2.35.2/gas/testsuite/gas/aarch64/rng-1.s 2022-04-05 11:55:13.973674567 +0100
|
||||
@@ -0,0 +1,3 @@
|
||||
+ .arch armv8.4-a+rng
|
||||
+ mrs x5, rndr
|
||||
+ mrs x6, rndrrs
|
||||
--- /dev/null 2022-04-05 09:32:54.900867346 +0100
|
||||
+++ binutils-2.35.2/gas/testsuite/gas/aarch64/rng-1.d 2022-04-05 11:55:45.338558554 +0100
|
||||
@@ -0,0 +1,10 @@
|
||||
+#source: rng-1.s
|
||||
+#objdump: -dr
|
||||
+
|
||||
+.*: file format .*
|
||||
+
|
||||
+Disassembly of section \.text:
|
||||
+
|
||||
+0+ <.*>:
|
||||
+.*: d53b2405 mrs x5, rndr
|
||||
+.*: d53b2426 mrs x6, rndrrs
|
||||
--- binutils.orig/gas/config/tc-aarch64.c 2022-05-23 09:44:07.623234684 +0100
|
||||
+++ binutils-2.35.2/gas/config/tc-aarch64.c 2022-05-23 09:47:09.147696001 +0100
|
||||
@@ -9206,7 +9206,7 @@ aarch64_parse_features (const char *str,
|
||||
break;
|
||||
}
|
||||
|
||||
- if (opt->name == NULL)
|
||||
+ if (opt->name == NULL && adding_value)
|
||||
{
|
||||
as_bad (_("unknown architectural extension `%s'"), str);
|
||||
return 0;
|
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,70 @@
|
||||
diff -rup binutils.orig/gas/config/obj-elf.c binutils-2.34/gas/config/obj-elf.c
|
||||
--- binutils.orig/gas/config/obj-elf.c 2020-02-02 11:34:11.858321477 +0000
|
||||
+++ binutils-2.34/gas/config/obj-elf.c 2020-02-02 11:34:30.099247619 +0000
|
||||
@@ -78,9 +78,11 @@ static void obj_elf_gnu_attribute (int);
|
||||
static void obj_elf_tls_common (int);
|
||||
static void obj_elf_lcomm (int);
|
||||
static void obj_elf_struct (int);
|
||||
+static void obj_elf_attach_to_group (int);
|
||||
|
||||
static const pseudo_typeS elf_pseudo_table[] =
|
||||
{
|
||||
+ {"attach_to_group", obj_elf_attach_to_group, 0},
|
||||
{"comm", obj_elf_common, 0},
|
||||
{"common", obj_elf_common, 1},
|
||||
{"ident", obj_elf_ident, 0},
|
||||
@@ -1003,6 +1005,27 @@ obj_elf_section_name (void)
|
||||
return name;
|
||||
}
|
||||
|
||||
+static void
|
||||
+obj_elf_attach_to_group (int dummy ATTRIBUTE_UNUSED)
|
||||
+{
|
||||
+ const char * gname = obj_elf_section_name ();
|
||||
+
|
||||
+ if (gname == NULL)
|
||||
+ {
|
||||
+ as_warn ("group name not parseable");
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
+ if (elf_group_name (now_seg))
|
||||
+ {
|
||||
+ as_warn ("already has a group");
|
||||
+ return;
|
||||
+ }
|
||||
+
|
||||
+ elf_group_name (now_seg) = xstrdup (gname);
|
||||
+ elf_section_flags (now_seg) |= SHF_GROUP;
|
||||
+}
|
||||
+
|
||||
void
|
||||
obj_elf_section (int push)
|
||||
{
|
||||
Only in binutils-2.34/gas/config: obj-elf.c.orig
|
||||
diff -rup binutils.orig/gas/doc/as.texi binutils-2.34/gas/doc/as.texi
|
||||
--- binutils.orig/gas/doc/as.texi 2020-02-02 11:34:11.850321509 +0000
|
||||
+++ binutils-2.34/gas/doc/as.texi 2020-02-02 11:35:11.359080560 +0000
|
||||
@@ -4359,6 +4359,7 @@ Some machine configurations provide addi
|
||||
* Altmacro:: @code{.altmacro}
|
||||
* Ascii:: @code{.ascii "@var{string}"}@dots{}
|
||||
* Asciz:: @code{.asciz "@var{string}"}@dots{}
|
||||
+* Attach_to_group:: @code{.attach_to_group @var{name}}
|
||||
* Balign:: @code{.balign [@var{abs-expr}[, @var{abs-expr}]]}
|
||||
* Bundle directives:: @code{.bundle_align_mode @var{abs-expr}}, etc
|
||||
* Byte:: @code{.byte @var{expressions}}
|
||||
@@ -4656,6 +4657,12 @@ trailing zero byte) into consecutive add
|
||||
@code{.asciz} is just like @code{.ascii}, but each string is followed by
|
||||
a zero byte. The ``z'' in @samp{.asciz} stands for ``zero''.
|
||||
|
||||
+@node Attach_to_group
|
||||
+@section @code{.attach_to_group @var{name}}
|
||||
+Attaches the current section to the named group. This is like declaring
|
||||
+the section with the @code{G} attribute, but can be done after the section
|
||||
+has been created.
|
||||
+
|
||||
@node Balign
|
||||
@section @code{.balign[wl] [@var{abs-expr}[, @var{abs-expr}[, @var{abs-expr}]]]}
|
||||
|
||||
Only in binutils-2.34/gas/doc: as.texi.orig
|
||||
Only in binutils-2.34/gas/doc: as.texi.rej
|
||||
@ -1,29 +0,0 @@
|
||||
--- binutils.orig/bfd/merge.c 2023-11-07 09:49:56.923358543 +0000
|
||||
+++ binutils-2.41/bfd/merge.c 2023-11-07 09:51:47.031552039 +0000
|
||||
@@ -167,7 +167,7 @@ static bool
|
||||
sec_merge_maybe_resize (struct sec_merge_hash *table, unsigned added)
|
||||
{
|
||||
struct bfd_hash_table *bfdtab = &table->table;
|
||||
- if (bfdtab->count + added > table->nbuckets * 2 / 3)
|
||||
+ if (bfdtab->count + added > table->nbuckets / 3 * 2)
|
||||
{
|
||||
unsigned i;
|
||||
unsigned long newnb = table->nbuckets * 2;
|
||||
@@ -175,7 +175,7 @@ sec_merge_maybe_resize (struct sec_merge
|
||||
uint64_t *newl;
|
||||
unsigned long alloc;
|
||||
|
||||
- while (bfdtab->count + added > newnb * 2 / 3)
|
||||
+ while (bfdtab->count + added > newnb / 3 * 2)
|
||||
{
|
||||
newnb *= 2;
|
||||
if (!newnb)
|
||||
@@ -240,7 +240,7 @@ sec_merge_hash_insert (struct sec_merge_
|
||||
hashp->u.suffix = NULL;
|
||||
hashp->next = NULL;
|
||||
// We must not need resizing, otherwise _index is wrong
|
||||
- BFD_ASSERT (bfdtab->count + 1 <= table->nbuckets * 2 / 3);
|
||||
+ BFD_ASSERT (bfdtab->count + 1 <= table->nbuckets / 3 * 2);
|
||||
bfdtab->count++;
|
||||
table->key_lens[_index] = (hash << 32) | (uint32_t)len;
|
||||
table->values[_index] = hashp;
|
||||
@ -0,0 +1,44 @@
|
||||
diff -Nrup a/libiberty/aclocal.m4 b/libiberty/aclocal.m4
|
||||
--- a/libiberty/aclocal.m4 2019-01-19 09:01:34.000000000 -0700
|
||||
+++ b/libiberty/aclocal.m4 2020-01-09 22:00:27.183312982 -0700
|
||||
@@ -147,7 +147,7 @@ if test $ac_cv_os_cray = yes; then
|
||||
fi
|
||||
|
||||
AC_CACHE_CHECK(stack direction for C alloca, ac_cv_c_stack_direction,
|
||||
-[AC_TRY_RUN([find_stack_direction ()
|
||||
+[AC_TRY_RUN([__attribute__ ((noclone,noinline)) find_stack_direction ()
|
||||
{
|
||||
static char *addr = 0;
|
||||
auto char dummy;
|
||||
diff --git a/config/intdiv0.m4 b/config/intdiv0.m4
|
||||
index 55dddcf1..ba906efc 100644
|
||||
--- a/config/intdiv0.m4
|
||||
+++ b/config/intdiv0.m4
|
||||
@@ -31,10 +31,10 @@ sigfpe_handler (sig) int sig;
|
||||
exit (sig != SIGFPE);
|
||||
}
|
||||
|
||||
-int x = 1;
|
||||
-int y = 0;
|
||||
-int z;
|
||||
-int nan;
|
||||
+volatile int x = 1;
|
||||
+volatile int y = 0;
|
||||
+volatile int z;
|
||||
+volatile int nan;
|
||||
|
||||
int main ()
|
||||
{
|
||||
diff --git a/libiberty/configure.ac b/libiberty/configure.ac
|
||||
index f1ce7601..fc20d228 100644
|
||||
--- a/libiberty/configure.ac
|
||||
+++ b/libiberty/configure.ac
|
||||
@@ -661,7 +661,7 @@ if test -z "${setobjs}"; then
|
||||
for v in $vars; do
|
||||
AC_MSG_CHECKING([for $v])
|
||||
AC_CACHE_VAL(libiberty_cv_var_$v,
|
||||
- [AC_LINK_IFELSE([AC_LANG_PROGRAM([[int *p;]],[[extern int $v []; p = $v;]])],
|
||||
+ [AC_LINK_IFELSE([AC_LANG_PROGRAM([[__attribute__ ((used)) int *p;]],[[extern int $v []; p = $v;]])],
|
||||
[eval "libiberty_cv_var_$v=yes"],
|
||||
[eval "libiberty_cv_var_$v=no"])])
|
||||
if eval "test \"`echo '$libiberty_cv_var_'$v`\" = yes"; then
|
||||
@ -1,374 +0,0 @@
|
||||
--- binutils.orig/include/demangle.h 2024-01-17 09:54:10.945686323 +0000
|
||||
+++ binutils-2.41/include/demangle.h 2024-01-17 09:54:55.696760281 +0000
|
||||
@@ -1,5 +1,5 @@
|
||||
/* Defs for interface to demanglers.
|
||||
- Copyright (C) 1992-2023 Free Software Foundation, Inc.
|
||||
+ Copyright (C) 1992-2024 Free Software Foundation, Inc.
|
||||
|
||||
This program is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Library General Public License
|
||||
@@ -448,6 +448,8 @@ enum demangle_component_type
|
||||
DEMANGLE_COMPONENT_TRANSACTION_SAFE,
|
||||
/* A cloned function. */
|
||||
DEMANGLE_COMPONENT_CLONE,
|
||||
+ /* A member-like friend function. */
|
||||
+ DEMANGLE_COMPONENT_FRIEND,
|
||||
DEMANGLE_COMPONENT_NOEXCEPT,
|
||||
DEMANGLE_COMPONENT_THROW_SPEC,
|
||||
|
||||
@@ -464,6 +466,8 @@ enum demangle_component_type
|
||||
DEMANGLE_COMPONENT_TEMPLATE_TEMPLATE_PARM,
|
||||
DEMANGLE_COMPONENT_TEMPLATE_PACK_PARM,
|
||||
|
||||
+ DEMANGLE_COMPONENT_CONSTRAINTS,
|
||||
+
|
||||
/* A builtin type with argument. This holds the builtin type
|
||||
information. */
|
||||
DEMANGLE_COMPONENT_EXTENDED_BUILTIN_TYPE
|
||||
diff -rup binutils.orig/libiberty/cp-demangle.c binutils-2.41/libiberty/cp-demangle.c
|
||||
--- binutils.orig/libiberty/cp-demangle.c 2024-01-17 09:54:11.323686947 +0000
|
||||
+++ binutils-2.41/libiberty/cp-demangle.c 2024-01-17 09:54:42.468738420 +0000
|
||||
@@ -1,5 +1,5 @@
|
||||
/* Demangler for g++ V3 ABI.
|
||||
- Copyright (C) 2003-2023 Free Software Foundation, Inc.
|
||||
+ Copyright (C) 2003-2024 Free Software Foundation, Inc.
|
||||
Written by Ian Lance Taylor <ian@wasabisystems.com>.
|
||||
|
||||
This file is part of the libiberty library, which is part of GCC.
|
||||
@@ -993,6 +993,7 @@ d_make_comp (struct d_info *di, enum dem
|
||||
case DEMANGLE_COMPONENT_VECTOR_TYPE:
|
||||
case DEMANGLE_COMPONENT_CLONE:
|
||||
case DEMANGLE_COMPONENT_MODULE_ENTITY:
|
||||
+ case DEMANGLE_COMPONENT_CONSTRAINTS:
|
||||
if (left == NULL || right == NULL)
|
||||
return NULL;
|
||||
break;
|
||||
@@ -1036,6 +1037,7 @@ d_make_comp (struct d_info *di, enum dem
|
||||
case DEMANGLE_COMPONENT_TEMPLATE_NON_TYPE_PARM:
|
||||
case DEMANGLE_COMPONENT_TEMPLATE_TEMPLATE_PARM:
|
||||
case DEMANGLE_COMPONENT_TEMPLATE_PACK_PARM:
|
||||
+ case DEMANGLE_COMPONENT_FRIEND:
|
||||
if (left == NULL)
|
||||
return NULL;
|
||||
break;
|
||||
@@ -1344,6 +1346,22 @@ is_ctor_dtor_or_conversion (struct deman
|
||||
}
|
||||
}
|
||||
|
||||
+/* [ Q <constraint-expression> ] */
|
||||
+
|
||||
+static struct demangle_component *
|
||||
+d_maybe_constraints (struct d_info *di, struct demangle_component *dc)
|
||||
+{
|
||||
+ if (d_peek_char (di) == 'Q')
|
||||
+ {
|
||||
+ d_advance (di, 1);
|
||||
+ struct demangle_component *expr = d_expression (di);
|
||||
+ if (expr == NULL)
|
||||
+ return NULL;
|
||||
+ dc = d_make_comp (di, DEMANGLE_COMPONENT_CONSTRAINTS, dc, expr);
|
||||
+ }
|
||||
+ return dc;
|
||||
+}
|
||||
+
|
||||
/* <encoding> ::= <(function) name> <bare-function-type>
|
||||
::= <(data) name>
|
||||
::= <special-name>
|
||||
@@ -1397,21 +1415,21 @@ d_encoding (struct d_info *di, int top_l
|
||||
struct demangle_component *ftype;
|
||||
|
||||
ftype = d_bare_function_type (di, has_return_type (dc));
|
||||
- if (ftype)
|
||||
- {
|
||||
- /* If this is a non-top-level local-name, clear the
|
||||
- return type, so it doesn't confuse the user by
|
||||
- being confused with the return type of whaever
|
||||
- this is nested within. */
|
||||
- if (!top_level && dc->type == DEMANGLE_COMPONENT_LOCAL_NAME
|
||||
- && ftype->type == DEMANGLE_COMPONENT_FUNCTION_TYPE)
|
||||
- d_left (ftype) = NULL;
|
||||
+ if (!ftype)
|
||||
+ return NULL;
|
||||
|
||||
- dc = d_make_comp (di, DEMANGLE_COMPONENT_TYPED_NAME,
|
||||
- dc, ftype);
|
||||
- }
|
||||
- else
|
||||
- dc = NULL;
|
||||
+ /* If this is a non-top-level local-name, clear the
|
||||
+ return type, so it doesn't confuse the user by
|
||||
+ being confused with the return type of whaever
|
||||
+ this is nested within. */
|
||||
+ if (!top_level && dc->type == DEMANGLE_COMPONENT_LOCAL_NAME
|
||||
+ && ftype->type == DEMANGLE_COMPONENT_FUNCTION_TYPE)
|
||||
+ d_left (ftype) = NULL;
|
||||
+
|
||||
+ ftype = d_maybe_constraints (di, ftype);
|
||||
+
|
||||
+ dc = d_make_comp (di, DEMANGLE_COMPONENT_TYPED_NAME,
|
||||
+ dc, ftype);
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1681,6 +1699,7 @@ d_maybe_module_name (struct d_info *di,
|
||||
/* <unqualified-name> ::= [<module-name>] <operator-name> [<abi-tags>]
|
||||
::= [<module-name>] <ctor-dtor-name> [<abi-tags>]
|
||||
::= [<module-name>] <source-name> [<abi-tags>]
|
||||
+ ::= [<module-name>] F <source-name> [<abi-tags>]
|
||||
::= [<module-name>] <local-source-name> [<abi-tags>]
|
||||
::= [<module-name>] DC <source-name>+ E [<abi-tags>]
|
||||
<local-source-name> ::= L <source-name> <discriminator> [<abi-tags>]
|
||||
@@ -1692,11 +1711,18 @@ d_unqualified_name (struct d_info *di, s
|
||||
{
|
||||
struct demangle_component *ret;
|
||||
char peek;
|
||||
+ int member_like_friend = 0;
|
||||
|
||||
if (!d_maybe_module_name (di, &module))
|
||||
return NULL;
|
||||
|
||||
peek = d_peek_char (di);
|
||||
+ if (peek == 'F')
|
||||
+ {
|
||||
+ member_like_friend = 1;
|
||||
+ d_advance (di, 1);
|
||||
+ peek = d_peek_char (di);
|
||||
+ }
|
||||
if (IS_DIGIT (peek))
|
||||
ret = d_source_name (di);
|
||||
else if (IS_LOWER (peek))
|
||||
@@ -1773,6 +1799,8 @@ d_unqualified_name (struct d_info *di, s
|
||||
ret = d_make_comp (di, DEMANGLE_COMPONENT_MODULE_ENTITY, ret, module);
|
||||
if (d_peek_char (di) == 'B')
|
||||
ret = d_abi_tags (di, ret);
|
||||
+ if (member_like_friend)
|
||||
+ ret = d_make_comp (di, DEMANGLE_COMPONENT_FRIEND, ret, NULL);
|
||||
if (scope)
|
||||
ret = d_make_comp (di, DEMANGLE_COMPONENT_QUAL_NAME, scope, ret);
|
||||
|
||||
@@ -3012,7 +3040,7 @@ d_parmlist (struct d_info *di)
|
||||
struct demangle_component *type;
|
||||
|
||||
char peek = d_peek_char (di);
|
||||
- if (peek == '\0' || peek == 'E' || peek == '.')
|
||||
+ if (peek == '\0' || peek == 'E' || peek == '.' || peek == 'Q')
|
||||
break;
|
||||
if ((peek == 'R' || peek == 'O')
|
||||
&& d_peek_next_char (di) == 'E')
|
||||
@@ -3248,7 +3276,7 @@ d_template_args (struct d_info *di)
|
||||
return d_template_args_1 (di);
|
||||
}
|
||||
|
||||
-/* <template-arg>* E */
|
||||
+/* <template-arg>* [Q <constraint-expression>] E */
|
||||
|
||||
static struct demangle_component *
|
||||
d_template_args_1 (struct d_info *di)
|
||||
@@ -3284,13 +3312,17 @@ d_template_args_1 (struct d_info *di)
|
||||
return NULL;
|
||||
pal = &d_right (*pal);
|
||||
|
||||
- if (d_peek_char (di) == 'E')
|
||||
- {
|
||||
- d_advance (di, 1);
|
||||
- break;
|
||||
- }
|
||||
+ char peek = d_peek_char (di);
|
||||
+ if (peek == 'E' || peek == 'Q')
|
||||
+ break;
|
||||
}
|
||||
|
||||
+ al = d_maybe_constraints (di, al);
|
||||
+
|
||||
+ if (d_peek_char (di) != 'E')
|
||||
+ return NULL;
|
||||
+ d_advance (di, 1);
|
||||
+
|
||||
di->last_name = hold_last_name;
|
||||
|
||||
return al;
|
||||
@@ -4431,6 +4463,7 @@ d_count_templates_scopes (struct d_print
|
||||
case DEMANGLE_COMPONENT_PACK_EXPANSION:
|
||||
case DEMANGLE_COMPONENT_TAGGED_NAME:
|
||||
case DEMANGLE_COMPONENT_CLONE:
|
||||
+ case DEMANGLE_COMPONENT_CONSTRAINTS:
|
||||
recurse_left_right:
|
||||
/* PR 89394 - Check for too much recursion. */
|
||||
if (dpi->recursion > DEMANGLE_RECURSION_LIMIT)
|
||||
@@ -4459,6 +4492,7 @@ d_count_templates_scopes (struct d_print
|
||||
case DEMANGLE_COMPONENT_GLOBAL_CONSTRUCTORS:
|
||||
case DEMANGLE_COMPONENT_GLOBAL_DESTRUCTORS:
|
||||
case DEMANGLE_COMPONENT_MODULE_ENTITY:
|
||||
+ case DEMANGLE_COMPONENT_FRIEND:
|
||||
d_count_templates_scopes (dpi, d_left (dc));
|
||||
break;
|
||||
|
||||
@@ -5189,6 +5223,22 @@ d_print_comp_inner (struct d_print_info
|
||||
dpt.next = dpi->templates;
|
||||
dpi->templates = &dpt;
|
||||
dpt.template_decl = typed_name;
|
||||
+
|
||||
+ /* Constraints are mangled as part of the template argument list,
|
||||
+ so they wrap the _TEMPLATE_ARGLIST. But
|
||||
+ d_lookup_template_argument expects the RHS of _TEMPLATE to be
|
||||
+ the _ARGLIST, and constraints need to refer to these args. So
|
||||
+ move the _CONSTRAINTS out of the _TEMPLATE and onto the type.
|
||||
+ This will result in them being printed after the () like a
|
||||
+ trailing requires-clause, but that seems like our best option
|
||||
+ given that we aren't printing a template-head. */
|
||||
+ struct demangle_component *tnr = d_right (typed_name);
|
||||
+ if (tnr->type == DEMANGLE_COMPONENT_CONSTRAINTS)
|
||||
+ {
|
||||
+ d_right (typed_name) = d_left (tnr);
|
||||
+ d_left (tnr) = d_right (dc);
|
||||
+ d_right (dc) = tnr;
|
||||
+ }
|
||||
}
|
||||
|
||||
d_print_comp (dpi, options, d_right (dc));
|
||||
@@ -6197,6 +6247,11 @@ d_print_comp_inner (struct d_print_info
|
||||
d_append_char (dpi, ']');
|
||||
return;
|
||||
|
||||
+ case DEMANGLE_COMPONENT_FRIEND:
|
||||
+ d_print_comp (dpi, options, d_left (dc));
|
||||
+ d_append_string (dpi, "[friend]");
|
||||
+ return;
|
||||
+
|
||||
case DEMANGLE_COMPONENT_TEMPLATE_HEAD:
|
||||
{
|
||||
d_append_char (dpi, '<');
|
||||
@@ -6231,6 +6286,12 @@ d_print_comp_inner (struct d_print_info
|
||||
d_append_string (dpi, "...");
|
||||
return;
|
||||
|
||||
+ case DEMANGLE_COMPONENT_CONSTRAINTS:
|
||||
+ d_print_comp (dpi, options, d_left (dc));
|
||||
+ d_append_string (dpi, " requires ");
|
||||
+ d_print_comp (dpi, options, d_right (dc));
|
||||
+ return;
|
||||
+
|
||||
default:
|
||||
d_print_error (dpi);
|
||||
return;
|
||||
--- binutils.orig/include/demangle.h 2024-01-17 11:06:11.111229985 +0000
|
||||
+++ binutils-2.41/include/demangle.h 2024-01-17 11:06:21.281242709 +0000
|
||||
@@ -314,6 +314,8 @@ enum demangle_component_type
|
||||
/* C++11: An rvalue reference modifying a member function. The one
|
||||
subtree is the type which is being referenced. */
|
||||
DEMANGLE_COMPONENT_RVALUE_REFERENCE_THIS,
|
||||
+ /* C++23: A member function with explict object parameter. */
|
||||
+ DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION,
|
||||
/* A vendor qualifier. The left subtree is the type which is being
|
||||
qualified, and the right subtree is the name of the
|
||||
qualifier. */
|
||||
--- binutils.orig/libiberty/cp-demangle.c 2024-01-17 11:06:11.246230153 +0000
|
||||
+++ binutils-2.41/libiberty/cp-demangle.c 2024-01-17 11:06:21.282242710 +0000
|
||||
@@ -581,6 +581,7 @@ static char *d_demangle (const char *, i
|
||||
case DEMANGLE_COMPONENT_CONST_THIS: \
|
||||
case DEMANGLE_COMPONENT_REFERENCE_THIS: \
|
||||
case DEMANGLE_COMPONENT_RVALUE_REFERENCE_THIS: \
|
||||
+ case DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION: \
|
||||
case DEMANGLE_COMPONENT_TRANSACTION_SAFE: \
|
||||
case DEMANGLE_COMPONENT_NOEXCEPT: \
|
||||
case DEMANGLE_COMPONENT_THROW_SPEC
|
||||
@@ -749,6 +750,9 @@ d_dump (struct demangle_component *dc, i
|
||||
case DEMANGLE_COMPONENT_RVALUE_REFERENCE_THIS:
|
||||
printf ("rvalue reference this\n");
|
||||
break;
|
||||
+ case DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION:
|
||||
+ printf ("explicit object parameter\n");
|
||||
+ break;
|
||||
case DEMANGLE_COMPONENT_TRANSACTION_SAFE:
|
||||
printf ("transaction_safe this\n");
|
||||
break;
|
||||
@@ -1547,6 +1551,8 @@ d_name (struct d_info *di, int substable
|
||||
|
||||
/* <nested-name> ::= N [<CV-qualifiers>] [<ref-qualifier>] <prefix> <unqualified-name> E
|
||||
::= N [<CV-qualifiers>] [<ref-qualifier>] <template-prefix> <template-args> E
|
||||
+ ::= N H <prefix> <unqualified-name> E
|
||||
+ ::= N H <template-prefix> <template-args> E
|
||||
*/
|
||||
|
||||
static struct demangle_component *
|
||||
@@ -1559,13 +1565,24 @@ d_nested_name (struct d_info *di)
|
||||
if (! d_check_char (di, 'N'))
|
||||
return NULL;
|
||||
|
||||
- pret = d_cv_qualifiers (di, &ret, 1);
|
||||
- if (pret == NULL)
|
||||
- return NULL;
|
||||
+ if (d_peek_char (di) == 'H')
|
||||
+ {
|
||||
+ d_advance (di, 1);
|
||||
+ di->expansion += sizeof "this";
|
||||
+ pret = &ret;
|
||||
+ rqual = d_make_comp (di, DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION,
|
||||
+ NULL, NULL);
|
||||
+ }
|
||||
+ else
|
||||
+ {
|
||||
+ pret = d_cv_qualifiers (di, &ret, 1);
|
||||
+ if (pret == NULL)
|
||||
+ return NULL;
|
||||
|
||||
- /* Parse the ref-qualifier now and then attach it
|
||||
- once we have something to attach it to. */
|
||||
- rqual = d_ref_qualifier (di, NULL);
|
||||
+ /* Parse the ref-qualifier now and then attach it
|
||||
+ once we have something to attach it to. */
|
||||
+ rqual = d_ref_qualifier (di, NULL);
|
||||
+ }
|
||||
|
||||
*pret = d_prefix (di, 1);
|
||||
if (*pret == NULL)
|
||||
@@ -4427,6 +4444,7 @@ d_count_templates_scopes (struct d_print
|
||||
case DEMANGLE_COMPONENT_CONST_THIS:
|
||||
case DEMANGLE_COMPONENT_REFERENCE_THIS:
|
||||
case DEMANGLE_COMPONENT_RVALUE_REFERENCE_THIS:
|
||||
+ case DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION:
|
||||
case DEMANGLE_COMPONENT_TRANSACTION_SAFE:
|
||||
case DEMANGLE_COMPONENT_NOEXCEPT:
|
||||
case DEMANGLE_COMPONENT_THROW_SPEC:
|
||||
@@ -6521,6 +6539,8 @@ d_print_mod (struct d_print_info *dpi, i
|
||||
case DEMANGLE_COMPONENT_RVALUE_REFERENCE:
|
||||
d_append_string (dpi, "&&");
|
||||
return;
|
||||
+ case DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION:
|
||||
+ return;
|
||||
case DEMANGLE_COMPONENT_COMPLEX:
|
||||
d_append_string (dpi, " _Complex");
|
||||
return;
|
||||
@@ -6559,11 +6579,13 @@ d_print_function_type (struct d_print_in
|
||||
{
|
||||
int need_paren;
|
||||
int need_space;
|
||||
+ int xobj_memfn;
|
||||
struct d_print_mod *p;
|
||||
struct d_print_mod *hold_modifiers;
|
||||
|
||||
need_paren = 0;
|
||||
need_space = 0;
|
||||
+ xobj_memfn = 0;
|
||||
for (p = mods; p != NULL; p = p->next)
|
||||
{
|
||||
if (p->printed)
|
||||
@@ -6586,7 +6608,8 @@ d_print_function_type (struct d_print_in
|
||||
need_space = 1;
|
||||
need_paren = 1;
|
||||
break;
|
||||
- FNQUAL_COMPONENT_CASE:
|
||||
+ case DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION:
|
||||
+ xobj_memfn = 1;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
@@ -6617,6 +6640,8 @@ d_print_function_type (struct d_print_in
|
||||
d_append_char (dpi, ')');
|
||||
|
||||
d_append_char (dpi, '(');
|
||||
+ if (xobj_memfn)
|
||||
+ d_append_string (dpi, "this ");
|
||||
|
||||
if (d_right (dc) != NULL)
|
||||
d_print_comp (dpi, options, d_right (dc));
|
||||
@ -0,0 +1,34 @@
|
||||
diff -rup binutils.orig/ld/ldlang.c binutils-2.35.1/ld/ldlang.c
|
||||
--- binutils.orig/ld/ldlang.c 2021-01-04 15:20:32.901498036 +0000
|
||||
+++ binutils-2.35.1/ld/ldlang.c 2021-01-04 15:22:03.151916333 +0000
|
||||
@@ -1529,6 +1529,8 @@ lang_output_section_statement_lookup (co
|
||||
|
||||
entry->s.output_section_statement.name = name;
|
||||
entry->s.output_section_statement.constraint = constraint;
|
||||
+ entry->s.output_section_statement.dup_output = (create == 2
|
||||
+ || constraint == SPECIAL);
|
||||
return &entry->s.output_section_statement;
|
||||
}
|
||||
|
||||
@@ -2390,7 +2392,7 @@ init_os (lang_output_section_statement_t
|
||||
if (strcmp (s->name, DISCARD_SECTION_NAME) == 0)
|
||||
einfo (_("%F%P: illegal use of `%s' section\n"), DISCARD_SECTION_NAME);
|
||||
|
||||
- if (s->constraint != SPECIAL)
|
||||
+ if (!s->dup_output)
|
||||
s->bfd_section = bfd_get_section_by_name (link_info.output_bfd, s->name);
|
||||
if (s->bfd_section == NULL)
|
||||
s->bfd_section = bfd_make_section_anyway_with_flags (link_info.output_bfd,
|
||||
diff -rup binutils.orig/ld/ldlang.h binutils-2.35.1/ld/ldlang.h
|
||||
--- binutils.orig/ld/ldlang.h 2021-01-04 15:20:32.627499830 +0000
|
||||
+++ binutils-2.35.1/ld/ldlang.h 2021-01-04 15:21:06.688277003 +0000
|
||||
@@ -173,6 +173,9 @@ typedef struct lang_output_section_state
|
||||
unsigned int after_end : 1;
|
||||
/* If this section uses the alignment of its input sections. */
|
||||
unsigned int align_lma_with_input : 1;
|
||||
+ /* If script has duplicate output section statements of the same name
|
||||
+ create duplicate output sections. */
|
||||
+ unsigned int dup_output : 1;
|
||||
} lang_output_section_statement_type;
|
||||
|
||||
typedef struct
|
||||
@ -0,0 +1,186 @@
|
||||
diff -rup binutils.orig/gas/dwarf2dbg.c binutils-2.35.2/gas/dwarf2dbg.c
|
||||
--- binutils.orig/gas/dwarf2dbg.c 2021-08-09 17:50:48.324447191 +0100
|
||||
+++ binutils-2.35.2/gas/dwarf2dbg.c 2021-08-09 17:51:03.308359865 +0100
|
||||
@@ -616,7 +616,22 @@ get_directory_table_entry (const char *
|
||||
if (can_use_zero)
|
||||
{
|
||||
if (dirs == NULL || dirs[0] == NULL)
|
||||
- d = 0;
|
||||
+ {
|
||||
+ const char * pwd = getpwd ();
|
||||
+
|
||||
+ if (dwarf_level >= 5 && strcmp (dirname, pwd) != 0)
|
||||
+ {
|
||||
+ /* In DWARF-5 the 0 entry in the directory table is expected to be
|
||||
+ the same as the DW_AT_comp_dir (which is set to the current build
|
||||
+ directory). Since we are about to create a directory entry that
|
||||
+ is not the same, allocate the current directory first.
|
||||
+ FIXME: Alternatively we could generate an error message here. */
|
||||
+ (void) get_directory_table_entry (pwd, strlen (pwd), TRUE);
|
||||
+ d = 1;
|
||||
+ }
|
||||
+ else
|
||||
+ d = 0;
|
||||
+ }
|
||||
}
|
||||
else if (d == 0)
|
||||
d = 1;
|
||||
@@ -624,8 +639,8 @@ get_directory_table_entry (const char *
|
||||
if (d >= dirs_allocated)
|
||||
{
|
||||
unsigned int old = dirs_allocated;
|
||||
-
|
||||
- dirs_allocated = d + 32;
|
||||
+#define DIR_TABLE_INCREMENT 32
|
||||
+ dirs_allocated = d + DIR_TABLE_INCREMENT;
|
||||
dirs = XRESIZEVEC (char *, dirs, dirs_allocated);
|
||||
memset (dirs + old, 0, (dirs_allocated - old) * sizeof (char *));
|
||||
}
|
||||
@@ -820,7 +835,7 @@ allocate_filename_to_slot (const char *
|
||||
dirlen = strlen (dirname);
|
||||
file = filename;
|
||||
}
|
||||
-
|
||||
+
|
||||
d = get_directory_table_entry (dirname, dirlen, num == 0);
|
||||
i = num;
|
||||
|
||||
@@ -2062,7 +2077,12 @@ out_dir_and_file_list (segT line_seg, in
|
||||
Otherwise use pwd as main file directory. */
|
||||
if (dirs_in_use > 0 && dirs != NULL && dirs[0] != NULL)
|
||||
dir = remap_debug_filename (dirs[0]);
|
||||
- else if (dirs_in_use > 1 && dirs != NULL && dirs[1] != NULL)
|
||||
+ else if (dirs_in_use > 1
|
||||
+ && dirs != NULL
|
||||
+ && dirs[1] != NULL
|
||||
+ /* DWARF-5 directory tables expect dir[0] to be the same as
|
||||
+ DW_AT_comp_dir, which is the same as pwd. */
|
||||
+ && dwarf_level < 5)
|
||||
dir = remap_debug_filename (dirs[1]);
|
||||
else
|
||||
dir = remap_debug_filename (getpwd ());
|
||||
@@ -2165,8 +2185,8 @@ out_dir_and_file_list (segT line_seg, in
|
||||
uses slot zero, but that is only set explicitly using a
|
||||
.file 0 directive. If that isn't used, but file 1 is,
|
||||
then use that as main file name. */
|
||||
- if (DWARF2_LINE_VERSION >= 5 && i == 0 && files_in_use >= 1)
|
||||
- files[0].filename = files[1].filename;
|
||||
+ if (DWARF2_LINE_VERSION >= 5 && i == 0 && files_in_use >= 1 && files[0].filename == NULL)
|
||||
+ files[0].filename = files[1].filename;
|
||||
else
|
||||
files[i].filename = "";
|
||||
if (DWARF2_LINE_VERSION < 5 || i != 0)
|
||||
Only in binutils-2.35.2/gas/: dwarf2dbg.c.orig
|
||||
Only in binutils-2.35.2/gas/: dwarf2dbg.c.rej
|
||||
diff -rup binutils.orig/gas/testsuite/gas/elf/dwarf-5-file0.d binutils-2.35.2/gas/testsuite/gas/elf/dwarf-5-file0.d
|
||||
--- binutils.orig/gas/testsuite/gas/elf/dwarf-5-file0.d 2021-08-09 17:50:48.394446783 +0100
|
||||
+++ binutils-2.35.2/gas/testsuite/gas/elf/dwarf-5-file0.d 2021-08-09 17:53:36.567466668 +0100
|
||||
@@ -3,17 +3,18 @@
|
||||
#readelf: -wl
|
||||
|
||||
#...
|
||||
- The Directory Table \(offset 0x.*, lines 3, columns 1\):
|
||||
+ The Directory Table \(offset 0x.*, lines 4, columns 1\):
|
||||
Entry Name
|
||||
- 0 \(indirect line string, offset: 0x.*\): master directory
|
||||
- 1 \(indirect line string, offset: 0x.*\): secondary directory
|
||||
- 2 \(indirect line string, offset: 0x.*\): /tmp
|
||||
+#...
|
||||
+ 1 \(indirect line string, offset: 0x.*\): master directory
|
||||
+ 2 \(indirect line string, offset: 0x.*\): secondary directory
|
||||
+ 3 \(indirect line string, offset: 0x.*\): /tmp
|
||||
|
||||
The File Name Table \(offset 0x.*, lines 3, columns 3\):
|
||||
Entry Dir MD5 Name
|
||||
- 0 0 0x00000000000000000000000000000000 \(indirect line string, offset: 0x.*\): master source file
|
||||
- 1 1 0x00000000000000000000000000000000 \(indirect line string, offset: 0x.*\): secondary source file
|
||||
- 2 2 0x95828e8bc4f7404dbf7526fb7bd0f192 \(indirect line string, offset: 0x.*\): foo.c
|
||||
+ 0 1 0x00000000000000000000000000000000 \(indirect line string, offset: 0x.*\): master source file
|
||||
+ 1 2 0x00000000000000000000000000000000 \(indirect line string, offset: 0x.*\): secondary source file
|
||||
+ 2 3 0x95828e8bc4f7404dbf7526fb7bd0f192 \(indirect line string, offset: 0x.*\): foo.c
|
||||
#pass
|
||||
|
||||
|
||||
Only in binutils-2.35.2/gas/testsuite/gas/elf: dwarf-5-file0.d.orig
|
||||
Only in binutils-2.35.2/gas/testsuite/gas/elf: dwarf-5-file0.d.rej
|
||||
diff -rup binutils.orig/gas/testsuite/gas/elf/elf.exp binutils-2.35.2/gas/testsuite/gas/elf/elf.exp
|
||||
--- binutils.orig/gas/testsuite/gas/elf/elf.exp 2021-08-09 17:50:48.395446778 +0100
|
||||
+++ binutils-2.35.2/gas/testsuite/gas/elf/elf.exp 2021-08-09 17:51:03.308359865 +0100
|
||||
@@ -274,6 +274,7 @@ if { [is_elf_format] } then {
|
||||
run_dump_test "dwarf2-18" $dump_opts
|
||||
run_dump_test "dwarf2-19" $dump_opts
|
||||
run_dump_test "dwarf-5-file0" $dump_opts
|
||||
+ run_dump_test "dwarf-5-dir0" $dump_opts
|
||||
run_dump_test "dwarf-4-cu" $dump_opts
|
||||
run_dump_test "dwarf-5-cu" $dump_opts
|
||||
run_dump_test "dwarf-5-nop-for-line-table" $dump_opts
|
||||
Only in binutils-2.35.2/gas/testsuite/gas/elf: elf.exp.orig
|
||||
diff -rup binutils.orig/gas/testsuite/gas/i386/dwarf5-line-1.d binutils-2.35.2/gas/testsuite/gas/i386/dwarf5-line-1.d
|
||||
--- binutils.orig/gas/testsuite/gas/i386/dwarf5-line-1.d 2021-08-09 17:50:48.363446964 +0100
|
||||
+++ binutils-2.35.2/gas/testsuite/gas/i386/dwarf5-line-1.d 2021-08-09 17:51:03.308359865 +0100
|
||||
@@ -33,7 +33,7 @@ Raw dump of debug contents of section \.
|
||||
|
||||
The Directory Table \(offset 0x.*, lines 2, columns 1\):
|
||||
Entry Name
|
||||
- 0 \(indirect line string, offset: 0x.*\): .*/gas/testsuite/gas/i386
|
||||
+ 0 \(indirect line string, offset: 0x.*\): .*/gas/testsuite
|
||||
1 \(indirect line string, offset: 0x.*\): .*/gas/testsuite/gas/i386
|
||||
|
||||
The File Name Table \(offset 0x.*, lines 2, columns 3\):
|
||||
diff -rup binutils.orig/gas/testsuite/gas/i386/dwarf5-line-2.d binutils-2.35.2/gas/testsuite/gas/i386/dwarf5-line-2.d
|
||||
--- binutils.orig/gas/testsuite/gas/i386/dwarf5-line-2.d 2021-08-09 17:50:48.365446953 +0100
|
||||
+++ binutils-2.35.2/gas/testsuite/gas/i386/dwarf5-line-2.d 2021-08-09 17:51:03.308359865 +0100
|
||||
@@ -33,7 +33,7 @@ Raw dump of debug contents of section \.
|
||||
|
||||
The Directory Table \(offset 0x.*, lines 2, columns 1\):
|
||||
Entry Name
|
||||
- 0 \(indirect line string, offset: 0x.*\): .*/gas/testsuite/gas/i386
|
||||
+ 0 \(indirect line string, offset: 0x.*\): .*/gas/testsuite
|
||||
1 \(indirect line string, offset: 0x.*\): .*/gas/testsuite/gas/i386
|
||||
|
||||
The File Name Table \(offset 0x.*, lines 1, columns 3\):
|
||||
--- /dev/null 2021-08-09 07:51:33.817495606 +0100
|
||||
+++ binutils-2.35.2/gas/testsuite/gas/elf/dwarf-5-dir0.s 2021-08-09 17:55:06.745941103 +0100
|
||||
@@ -0,0 +1,19 @@
|
||||
+ .section .debug_info,"",%progbits
|
||||
+ .4byte 0x8a
|
||||
+ .2byte 0x2
|
||||
+ .4byte .Ldebug_abbrev0
|
||||
+ .byte 0x4
|
||||
+ .uleb128 0x1
|
||||
+
|
||||
+ .file 0 "../not-the-build-directory/master-source-file.c"
|
||||
+ .line 1
|
||||
+ .text
|
||||
+ .octa 0x12345678901234567890123456789012
|
||||
+
|
||||
+ .file 1 "secondary directory/secondary source file"
|
||||
+ .line 2
|
||||
+ .word 2
|
||||
+
|
||||
+ .file 2 "/tmp" "foo.c" md5 0x95828e8bc4f7404dbf7526fb7bd0f192
|
||||
+ .line 5
|
||||
+ .word 6
|
||||
--- /dev/null 2021-08-09 07:51:33.817495606 +0100
|
||||
+++ binutils-2.35.2/gas/testsuite/gas/elf/dwarf-5-dir0.d 2021-08-09 17:55:06.745941103 +0100
|
||||
@@ -0,0 +1,20 @@
|
||||
+#as: --gdwarf-5
|
||||
+#name: DWARF5 dir[0]
|
||||
+#readelf: -wl
|
||||
+
|
||||
+#...
|
||||
+ The Directory Table \(offset 0x.*, lines 4, columns 1\):
|
||||
+ Entry Name
|
||||
+ 0 \(indirect line string, offset: 0x0\): .*/gas/testsuite
|
||||
+ 1 \(indirect line string, offset: 0x.*\): ../not-the-build-directory
|
||||
+ 2 \(indirect line string, offset: 0x.*\): secondary directory
|
||||
+ 3 \(indirect line string, offset: 0x.*\): /tmp
|
||||
+
|
||||
+ The File Name Table \(offset 0x.*, lines 3, columns 3\):
|
||||
+ Entry Dir MD5 Name
|
||||
+ 0 1 0x0+ \(indirect line string, offset: 0x.*\): master-source-file.c
|
||||
+ 1 2 0x0+ \(indirect line string, offset: 0x.*\): secondary source file
|
||||
+ 2 3 0x95828e8bc4f7404dbf7526fb7bd0f192 \(indirect line string, offset: 0x.*\): foo.c
|
||||
+#pass
|
||||
+
|
||||
+
|
||||
@ -0,0 +1,36 @@
|
||||
--- binutils.orig/bfd/elflink.c 2020-07-31 10:45:48.747912761 +0100
|
||||
+++ binutils-2.35/bfd/elflink.c 2020-07-31 10:47:26.336262770 +0100
|
||||
@@ -505,6 +505,16 @@ bfd_elf_link_record_dynamic_symbol (stru
|
||||
const char *name;
|
||||
size_t indx;
|
||||
|
||||
+ if (h->root.type == bfd_link_hash_defined
|
||||
+ || h->root.type == bfd_link_hash_defweak)
|
||||
+ {
|
||||
+ /* An IR symbol should not be made dynamic. */
|
||||
+ if (h->root.u.def.section != NULL
|
||||
+ && h->root.u.def.section->owner != NULL
|
||||
+ && (h->root.u.def.section->owner->flags & BFD_PLUGIN) != 0)
|
||||
+ return TRUE;
|
||||
+ }
|
||||
+
|
||||
/* XXX: The ABI draft says the linker must turn hidden and
|
||||
internal symbols into STB_LOCAL symbols when producing the
|
||||
DSO. However, if ld.so honors st_other in the dynamic table,
|
||||
@@ -5199,15 +5209,11 @@ elf_link_add_object_symbols (bfd *abfd,
|
||||
break;
|
||||
}
|
||||
|
||||
- /* Don't add DT_NEEDED for references from the dummy bfd nor
|
||||
- for unmatched symbol. */
|
||||
if (!add_needed
|
||||
&& matched
|
||||
&& definition
|
||||
&& ((dynsym
|
||||
- && h->ref_regular_nonweak
|
||||
- && (old_bfd == NULL
|
||||
- || (old_bfd->flags & BFD_PLUGIN) == 0))
|
||||
+ && h->ref_regular_nonweak)
|
||||
|| (h->ref_dynamic_nonweak
|
||||
&& (elf_dyn_lib_class (abfd) & DYN_AS_NEEDED) != 0
|
||||
&& !on_needed_list (elf_dt_name (abfd),
|
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,657 @@
|
||||
Only in binutils-2.35.1/gas: ChangeLog.orig
|
||||
Only in binutils-2.35.1/gas: ChangeLog.rej
|
||||
Only in binutils-2.35.1/gas/config: tc-s390.c.rej
|
||||
diff -rup binutils.orig/gas/doc/c-s390.texi binutils-2.35.1/gas/doc/c-s390.texi
|
||||
--- binutils.orig/gas/doc/c-s390.texi 2021-03-25 14:35:40.951633346 +0000
|
||||
+++ binutils-2.35.1/gas/doc/c-s390.texi 2021-03-25 14:39:39.910468584 +0000
|
||||
@@ -313,7 +313,7 @@ field. The notation changes as follows:
|
||||
@cindex instruction formats, s390
|
||||
@cindex s390 instruction formats
|
||||
|
||||
-The Principles of Operation manuals lists 26 instruction formats where
|
||||
+The Principles of Operation manuals lists 35 instruction formats where
|
||||
some of the formats have multiple variants. For the @samp{.insn}
|
||||
pseudo directive the assembler recognizes some of the formats.
|
||||
Typically, the most general variant of the instruction format is used
|
||||
@@ -545,6 +545,54 @@ with the @samp{.insn} pseudo directive:
|
||||
0 8 12 16 20 32 36 47
|
||||
@end verbatim
|
||||
|
||||
+@item VRV format: <insn> V1,D2(V2,B2),M3
|
||||
+@verbatim
|
||||
++--------+----+----+----+-------------+----+------------+
|
||||
+| OpCode | V1 | V2 | B2 | D2 | M3 | Opcode |
|
||||
++--------+----+----+----+-------------+----+------------+
|
||||
+0 8 12 16 20 32 36 47
|
||||
+@end verbatim
|
||||
+
|
||||
+@item VRI format: <insn> V1,V2,I3,M4,M5
|
||||
+@verbatim
|
||||
++--------+----+----+-------------+----+----+------------+
|
||||
+| OpCode | V1 | V2 | I3 | M5 | M4 | Opcode |
|
||||
++--------+----+----+-------------+----+----+------------+
|
||||
+0 8 12 16 28 32 36 47
|
||||
+@end verbatim
|
||||
+
|
||||
+@item VRX format: <insn> V1,D2(R2,B2),M3
|
||||
+@verbatim
|
||||
++--------+----+----+----+-------------+----+------------+
|
||||
+| OpCode | V1 | R2 | B2 | D2 | M3 | Opcode |
|
||||
++--------+----+----+----+-------------+----+------------+
|
||||
+0 8 12 16 20 32 36 47
|
||||
+@end verbatim
|
||||
+
|
||||
+@item VRS format: <insn> R1,V3,D2(B2),M4
|
||||
+@verbatim
|
||||
++--------+----+----+----+-------------+----+------------+
|
||||
+| OpCode | R1 | V3 | B2 | D2 | M4 | Opcode |
|
||||
++--------+----+----+----+-------------+----+------------+
|
||||
+0 8 12 16 20 32 36 47
|
||||
+@end verbatim
|
||||
+
|
||||
+@item VRR format: <insn> V1,V2,V3,M4,M5,M6
|
||||
+@verbatim
|
||||
++--------+----+----+----+---+----+----+----+------------+
|
||||
+| OpCode | V1 | V2 | V3 |///| M6 | M5 | M4 | Opcode |
|
||||
++--------+----+----+----+---+----+----+----+------------+
|
||||
+0 8 12 16 24 28 32 36 47
|
||||
+@end verbatim
|
||||
+
|
||||
+@item VSI format: <insn> V1,D2(B2),I3
|
||||
+@verbatim
|
||||
++--------+---------+----+-------------+----+------------+
|
||||
+| OpCode | I3 | B2 | D2 | V1 | Opcode |
|
||||
++--------+---------+----+-------------+----+------------+
|
||||
+0 8 16 20 32 36 47
|
||||
+@end verbatim
|
||||
+
|
||||
@end table
|
||||
|
||||
For the complete list of all instruction format variants see the
|
||||
Only in binutils-2.35.1/gas/doc: c-s390.texi.orig
|
||||
Only in binutils-2.35.1/gas/doc: c-s390.texi.rej
|
||||
diff -rup binutils.orig/gas/testsuite/gas/s390/esa-g5.d binutils-2.35.1/gas/testsuite/gas/s390/esa-g5.d
|
||||
--- binutils.orig/gas/testsuite/gas/s390/esa-g5.d 2021-03-25 14:35:41.038632922 +0000
|
||||
+++ binutils-2.35.1/gas/testsuite/gas/s390/esa-g5.d 2021-03-25 14:39:56.533387550 +0000
|
||||
@@ -78,10 +78,14 @@ Disassembly of section .text:
|
||||
.*: 07 29 [ ]*bhr %r9
|
||||
.*: 07 f9 [ ]*br %r9
|
||||
.*: a7 95 00 00 [ ]*bras %r9,e2 <foo\+0xe2>
|
||||
-.*: a7 64 00 00 [ ]*jlh e6 <foo\+0xe6>
|
||||
-.*: a7 66 00 00 [ ]*brct %r6,ea <foo\+0xea>
|
||||
-.*: 84 69 00 00 [ ]*brxh %r6,%r9,ee <foo\+0xee>
|
||||
-.*: 85 69 00 00 [ ]*brxle %r6,%r9,f2 <foo\+0xf2>
|
||||
+.*: a7 65 00 00 [ ]*bras %r6,e6 <foo\+0xe6>
|
||||
+.*: a7 64 00 00 [ ]*jlh ea <foo\+0xea>
|
||||
+.*: a7 66 00 00 [ ]*brct %r6,ee <foo\+0xee>
|
||||
+.*: a7 66 00 00 [ ]*brct %r6,f2 <foo\+0xf2>
|
||||
+.*: 84 69 00 00 [ ]*brxh %r6,%r9,f6 <foo\+0xf6>
|
||||
+.*: 84 69 00 00 [ ]*brxh %r6,%r9,fa <foo\+0xfa>
|
||||
+.*: 85 69 00 00 [ ]*brxle %r6,%r9,fe <foo\+0xfe>
|
||||
+.*: 85 69 00 00 [ ]*brxle %r6,%r9,102 <foo\+0x102>
|
||||
.*: b2 5a 00 69 [ ]*bsa %r6,%r9
|
||||
.*: b2 58 00 69 [ ]*bsg %r6,%r9
|
||||
.*: 0b 69 [ ]*bsm %r6,%r9
|
||||
@@ -180,27 +184,49 @@ Disassembly of section .text:
|
||||
.*: b2 21 00 69 [ ]*ipte %r6,%r9
|
||||
.*: b2 29 00 69 [ ]*iske %r6,%r9
|
||||
.*: b2 23 00 69 [ ]*ivsk %r6,%r9
|
||||
-.*: a7 f4 00 00 [ ]*j 278 <foo\+0x278>
|
||||
-.*: a7 84 00 00 [ ]*je 27c <foo\+0x27c>
|
||||
-.*: a7 24 00 00 [ ]*jh 280 <foo\+0x280>
|
||||
-.*: a7 a4 00 00 [ ]*jhe 284 <foo\+0x284>
|
||||
-.*: a7 44 00 00 [ ]*jl 288 <foo\+0x288>
|
||||
-.*: a7 c4 00 00 [ ]*jle 28c <foo\+0x28c>
|
||||
-.*: a7 64 00 00 [ ]*jlh 290 <foo\+0x290>
|
||||
-.*: a7 44 00 00 [ ]*jl 294 <foo\+0x294>
|
||||
-.*: a7 74 00 00 [ ]*jne 298 <foo\+0x298>
|
||||
-.*: a7 d4 00 00 [ ]*jnh 29c <foo\+0x29c>
|
||||
-.*: a7 54 00 00 [ ]*jnhe 2a0 <foo\+0x2a0>
|
||||
-.*: a7 b4 00 00 [ ]*jnl 2a4 <foo\+0x2a4>
|
||||
-.*: a7 34 00 00 [ ]*jnle 2a8 <foo\+0x2a8>
|
||||
-.*: a7 94 00 00 [ ]*jnlh 2ac <foo\+0x2ac>
|
||||
-.*: a7 b4 00 00 [ ]*jnl 2b0 <foo\+0x2b0>
|
||||
-.*: a7 e4 00 00 [ ]*jno 2b4 <foo\+0x2b4>
|
||||
-.*: a7 d4 00 00 [ ]*jnh 2b8 <foo\+0x2b8>
|
||||
-.*: a7 74 00 00 [ ]*jne 2bc <foo\+0x2bc>
|
||||
-.*: a7 14 00 00 [ ]*jo 2c0 <foo\+0x2c0>
|
||||
-.*: a7 24 00 00 [ ]*jh 2c4 <foo\+0x2c4>
|
||||
-.*: a7 84 00 00 [ ]*je 2c8 <foo\+0x2c8>
|
||||
+.*: a7 f4 00 00 [ ]*j 288 <foo\+0x288>
|
||||
+.*: a7 84 00 00 [ ]*je 28c <foo\+0x28c>
|
||||
+.*: a7 24 00 00 [ ]*jh 290 <foo\+0x290>
|
||||
+.*: a7 a4 00 00 [ ]*jhe 294 <foo\+0x294>
|
||||
+.*: a7 44 00 00 [ ]*jl 298 <foo\+0x298>
|
||||
+.*: a7 c4 00 00 [ ]*jle 29c <foo\+0x29c>
|
||||
+.*: a7 64 00 00 [ ]*jlh 2a0 <foo\+0x2a0>
|
||||
+.*: a7 44 00 00 [ ]*jl 2a4 <foo\+0x2a4>
|
||||
+.*: a7 74 00 00 [ ]*jne 2a8 <foo\+0x2a8>
|
||||
+.*: a7 d4 00 00 [ ]*jnh 2ac <foo\+0x2ac>
|
||||
+.*: a7 54 00 00 [ ]*jnhe 2b0 <foo\+0x2b0>
|
||||
+.*: a7 b4 00 00 [ ]*jnl 2b4 <foo\+0x2b4>
|
||||
+.*: a7 34 00 00 [ ]*jnle 2b8 <foo\+0x2b8>
|
||||
+.*: a7 94 00 00 [ ]*jnlh 2bc <foo\+0x2bc>
|
||||
+.*: a7 b4 00 00 [ ]*jnl 2c0 <foo\+0x2c0>
|
||||
+.*: a7 e4 00 00 [ ]*jno 2c4 <foo\+0x2c4>
|
||||
+.*: a7 d4 00 00 [ ]*jnh 2c8 <foo\+0x2c8>
|
||||
+.*: a7 74 00 00 [ ]*jne 2cc <foo\+0x2cc>
|
||||
+.*: a7 14 00 00 [ ]*jo 2d0 <foo\+0x2d0>
|
||||
+.*: a7 24 00 00 [ ]*jh 2d4 <foo\+0x2d4>
|
||||
+.*: a7 84 00 00 [ ]*je 2d8 <foo\+0x2d8>
|
||||
+.*: a7 04 00 00 [ ]*jnop 2dc <foo\+0x2dc>
|
||||
+.*: a7 14 00 00 [ ]*jo 2e0 <foo\+0x2e0>
|
||||
+.*: a7 24 00 00 [ ]*jh 2e4 <foo\+0x2e4>
|
||||
+.*: a7 24 00 00 [ ]*jh 2e8 <foo\+0x2e8>
|
||||
+.*: a7 34 00 00 [ ]*jnle 2ec <foo\+0x2ec>
|
||||
+.*: a7 44 00 00 [ ]*jl 2f0 <foo\+0x2f0>
|
||||
+.*: a7 44 00 00 [ ]*jl 2f4 <foo\+0x2f4>
|
||||
+.*: a7 54 00 00 [ ]*jnhe 2f8 <foo\+0x2f8>
|
||||
+.*: a7 64 00 00 [ ]*jlh 2fc <foo\+0x2fc>
|
||||
+.*: a7 74 00 00 [ ]*jne 300 <foo\+0x300>
|
||||
+.*: a7 74 00 00 [ ]*jne 304 <foo\+0x304>
|
||||
+.*: a7 84 00 00 [ ]*je 308 <foo\+0x308>
|
||||
+.*: a7 84 00 00 [ ]*je 30c <foo\+0x30c>
|
||||
+.*: a7 94 00 00 [ ]*jnlh 310 <foo\+0x310>
|
||||
+.*: a7 a4 00 00 [ ]*jhe 314 <foo\+0x314>
|
||||
+.*: a7 b4 00 00 [ ]*jnl 318 <foo\+0x318>
|
||||
+.*: a7 b4 00 00 [ ]*jnl 31c <foo\+0x31c>
|
||||
+.*: a7 c4 00 00 [ ]*jle 320 <foo\+0x320>
|
||||
+.*: a7 d4 00 00 [ ]*jnh 324 <foo\+0x324>
|
||||
+.*: a7 d4 00 00 [ ]*jnh 328 <foo\+0x328>
|
||||
+.*: a7 e4 00 00 [ ]*jno 32c <foo\+0x32c>
|
||||
+.*: a7 f4 00 00 [ ]*j 330 <foo\+0x330>
|
||||
.*: ed 65 af ff 00 18 [ ]*kdb %f6,4095\(%r5,%r10\)
|
||||
.*: b3 18 00 69 [ ]*kdbr %f6,%f9
|
||||
.*: ed 65 af ff 00 08 [ ]*keb %f6,4095\(%r5,%r10\)
|
||||
@@ -483,4 +509,4 @@ Disassembly of section .text:
|
||||
.*: f8 58 5f ff af ff [ ]*zap 4095\(6,%r5\),4095\(9,%r10\)
|
||||
.*: b2 21 b0 69 [ ]*ipte %r6,%r9,%r11
|
||||
.*: b2 21 bd 69 [ ]*ipte %r6,%r9,%r11,13
|
||||
-.*: 07 07 [ ]*nopr %r7
|
||||
+.*: 07 07 [ ]*nopr %r7
|
||||
diff -rup binutils.orig/gas/testsuite/gas/s390/esa-g5.s binutils-2.35.1/gas/testsuite/gas/s390/esa-g5.s
|
||||
--- binutils.orig/gas/testsuite/gas/s390/esa-g5.s 2021-03-25 14:35:41.038632922 +0000
|
||||
+++ binutils-2.35.1/gas/testsuite/gas/s390/esa-g5.s 2021-03-25 14:39:56.534387545 +0000
|
||||
@@ -72,10 +72,14 @@ foo:
|
||||
bpr %r9
|
||||
br %r9
|
||||
bras %r9,.
|
||||
+ jas %r6,.
|
||||
brc 6,.
|
||||
brct 6,.
|
||||
+ jct %r6,.
|
||||
brxh %r6,%r9,.
|
||||
+ jxh %r6,%r9,.
|
||||
brxle %r6,%r9,.
|
||||
+ jxle %r6,%r9,.
|
||||
bsa %r6,%r9
|
||||
bsg %r6,%r9
|
||||
bsm %r6,%r9
|
||||
@@ -195,6 +199,28 @@ foo:
|
||||
jo .
|
||||
jp .
|
||||
jz .
|
||||
+ jnop .
|
||||
+ bro .
|
||||
+ brh .
|
||||
+ brp .
|
||||
+ brnle .
|
||||
+ brl .
|
||||
+ brm .
|
||||
+ brnhe .
|
||||
+ brlh .
|
||||
+ brne .
|
||||
+ brnz .
|
||||
+ bre .
|
||||
+ brz .
|
||||
+ brnlh .
|
||||
+ brhe .
|
||||
+ brnl .
|
||||
+ brnm .
|
||||
+ brle .
|
||||
+ brnh .
|
||||
+ brnp .
|
||||
+ brno .
|
||||
+ bru .
|
||||
kdb %f6,4095(%r5,%r10)
|
||||
kdbr %f6,%f9
|
||||
keb %f6,4095(%r5,%r10)
|
||||
diff -rup binutils.orig/gas/testsuite/gas/s390/esa-z900.d binutils-2.35.1/gas/testsuite/gas/s390/esa-z900.d
|
||||
--- binutils.orig/gas/testsuite/gas/s390/esa-z900.d 2021-03-25 14:35:41.038632922 +0000
|
||||
+++ binutils-2.35.1/gas/testsuite/gas/s390/esa-z900.d 2021-03-25 14:39:56.534387545 +0000
|
||||
@@ -6,29 +6,52 @@
|
||||
Disassembly of section .text:
|
||||
|
||||
.* <foo>:
|
||||
-.*: c0 f4 00 00 00 00 [ ]*jg 0 \<foo\>
|
||||
-.*: c0 14 00 00 00 00 [ ]*jgo 6 \<foo\+0x6>
|
||||
-.*: c0 24 00 00 00 00 [ ]*jgh c \<foo\+0xc>
|
||||
-.*: c0 24 00 00 00 00 [ ]*jgh 12 \<foo\+0x12>
|
||||
-.*: c0 34 00 00 00 00 [ ]*jgnle 18 \<foo\+0x18>
|
||||
-.*: c0 44 00 00 00 00 [ ]*jgl 1e \<foo\+0x1e>
|
||||
-.*: c0 44 00 00 00 00 [ ]*jgl 24 \<foo\+0x24>
|
||||
-.*: c0 54 00 00 00 00 [ ]*jgnhe 2a \<foo\+0x2a>
|
||||
-.*: c0 64 00 00 00 00 [ ]*jglh 30 \<foo\+0x30>
|
||||
-.*: c0 74 00 00 00 00 [ ]*jgne 36 \<foo\+0x36>
|
||||
-.*: c0 74 00 00 00 00 [ ]*jgne 3c \<foo\+0x3c>
|
||||
-.*: c0 84 00 00 00 00 [ ]*jge 42 \<foo\+0x42>
|
||||
-.*: c0 84 00 00 00 00 [ ]*jge 48 \<foo\+0x48>
|
||||
-.*: c0 94 00 00 00 00 [ ]*jgnlh 4e \<foo\+0x4e>
|
||||
-.*: c0 a4 00 00 00 00 [ ]*jghe 54 \<foo\+0x54>
|
||||
-.*: c0 b4 00 00 00 00 [ ]*jgnl 5a \<foo\+0x5a>
|
||||
-.*: c0 b4 00 00 00 00 [ ]*jgnl 60 \<foo\+0x60>
|
||||
-.*: c0 c4 00 00 00 00 [ ]*jgle 66 \<foo\+0x66>
|
||||
-.*: c0 d4 00 00 00 00 [ ]*jgnh 6c \<foo\+0x6c>
|
||||
-.*: c0 d4 00 00 00 00 [ ]*jgnh 72 \<foo\+0x72>
|
||||
-.*: c0 e4 00 00 00 00 [ ]*jgno 78 \<foo\+0x78>
|
||||
-.*: c0 f4 00 00 00 00 [ ]*jg 7e \<foo\+0x7e>
|
||||
-.*: c0 65 00 00 00 00 [ ]*brasl %r6,84 \<foo\+0x84>
|
||||
+.*: c0 f4 00 00 00 00 [ ]*jg 0 <foo>
|
||||
+.*: c0 04 00 00 00 00 [ ]*jgnop 6 <foo\+0x6>
|
||||
+.*: c0 14 00 00 00 00 [ ]*jgo c <foo\+0xc>
|
||||
+.*: c0 24 00 00 00 00 [ ]*jgh 12 <foo\+0x12>
|
||||
+.*: c0 24 00 00 00 00 [ ]*jgh 18 <foo\+0x18>
|
||||
+.*: c0 34 00 00 00 00 [ ]*jgnle 1e <foo\+0x1e>
|
||||
+.*: c0 44 00 00 00 00 [ ]*jgl 24 <foo\+0x24>
|
||||
+.*: c0 44 00 00 00 00 [ ]*jgl 2a <foo\+0x2a>
|
||||
+.*: c0 54 00 00 00 00 [ ]*jgnhe 30 <foo\+0x30>
|
||||
+.*: c0 64 00 00 00 00 [ ]*jglh 36 <foo\+0x36>
|
||||
+.*: c0 74 00 00 00 00 [ ]*jgne 3c <foo\+0x3c>
|
||||
+.*: c0 74 00 00 00 00 [ ]*jgne 42 <foo\+0x42>
|
||||
+.*: c0 84 00 00 00 00 [ ]*jge 48 <foo\+0x48>
|
||||
+.*: c0 84 00 00 00 00 [ ]*jge 4e <foo\+0x4e>
|
||||
+.*: c0 94 00 00 00 00 [ ]*jgnlh 54 <foo\+0x54>
|
||||
+.*: c0 a4 00 00 00 00 [ ]*jghe 5a <foo\+0x5a>
|
||||
+.*: c0 b4 00 00 00 00 [ ]*jgnl 60 <foo\+0x60>
|
||||
+.*: c0 b4 00 00 00 00 [ ]*jgnl 66 <foo\+0x66>
|
||||
+.*: c0 c4 00 00 00 00 [ ]*jgle 6c <foo\+0x6c>
|
||||
+.*: c0 d4 00 00 00 00 [ ]*jgnh 72 <foo\+0x72>
|
||||
+.*: c0 d4 00 00 00 00 [ ]*jgnh 78 <foo\+0x78>
|
||||
+.*: c0 e4 00 00 00 00 [ ]*jgno 7e <foo\+0x7e>
|
||||
+.*: c0 f4 00 00 00 00 [ ]*jg 84 <foo\+0x84>
|
||||
+.*: c0 14 00 00 00 00 [ ]*jgo 8a <foo\+0x8a>
|
||||
+.*: c0 24 00 00 00 00 [ ]*jgh 90 <foo\+0x90>
|
||||
+.*: c0 24 00 00 00 00 [ ]*jgh 96 <foo\+0x96>
|
||||
+.*: c0 34 00 00 00 00 [ ]*jgnle 9c <foo\+0x9c>
|
||||
+.*: c0 44 00 00 00 00 [ ]*jgl a2 <foo\+0xa2>
|
||||
+.*: c0 44 00 00 00 00 [ ]*jgl a8 <foo\+0xa8>
|
||||
+.*: c0 54 00 00 00 00 [ ]*jgnhe ae <foo\+0xae>
|
||||
+.*: c0 64 00 00 00 00 [ ]*jglh b4 <foo\+0xb4>
|
||||
+.*: c0 74 00 00 00 00 [ ]*jgne ba <foo\+0xba>
|
||||
+.*: c0 74 00 00 00 00 [ ]*jgne c0 <foo\+0xc0>
|
||||
+.*: c0 84 00 00 00 00 [ ]*jge c6 <foo\+0xc6>
|
||||
+.*: c0 84 00 00 00 00 [ ]*jge cc <foo\+0xcc>
|
||||
+.*: c0 94 00 00 00 00 [ ]*jgnlh d2 <foo\+0xd2>
|
||||
+.*: c0 a4 00 00 00 00 [ ]*jghe d8 <foo\+0xd8>
|
||||
+.*: c0 b4 00 00 00 00 [ ]*jgnl de <foo\+0xde>
|
||||
+.*: c0 b4 00 00 00 00 [ ]*jgnl e4 <foo\+0xe4>
|
||||
+.*: c0 c4 00 00 00 00 [ ]*jgle ea <foo\+0xea>
|
||||
+.*: c0 d4 00 00 00 00 [ ]*jgnh f0 <foo\+0xf0>
|
||||
+.*: c0 d4 00 00 00 00 [ ]*jgnh f6 <foo\+0xf6>
|
||||
+.*: c0 e4 00 00 00 00 [ ]*jgno fc <foo\+0xfc>
|
||||
+.*: c0 f4 00 00 00 00 [ ]*jg 102 <foo\+0x102>
|
||||
+.*: c0 65 00 00 00 00 [ ]*brasl %r6,108 <foo\+0x108>
|
||||
+.*: c0 65 00 00 00 00 [ ]*brasl %r6,10e <foo\+0x10e>
|
||||
.*: 01 0b [ ]*tam
|
||||
.*: 01 0c [ ]*sam24
|
||||
.*: 01 0d [ ]*sam31
|
||||
@@ -39,7 +62,7 @@ Disassembly of section .text:
|
||||
.*: b9 97 00 69 [ ]*dlr %r6,%r9
|
||||
.*: b9 98 00 69 [ ]*alcr %r6,%r9
|
||||
.*: b9 99 00 69 [ ]*slbr %r6,%r9
|
||||
-.*: c0 60 00 00 00 00 [ ]*larl %r6,ac \<foo\+0xac\>
|
||||
+.*: c0 60 00 00 00 00 [ ]*larl %r6,136 <foo\+0x136>
|
||||
.*: e3 65 af ff 00 1e [ ]*lrv %r6,4095\(%r5,%r10\)
|
||||
.*: e3 65 af ff 00 1f [ ]*lrvh %r6,4095\(%r5,%r10\)
|
||||
.*: e3 65 af ff 00 3e [ ]*strv %r6,4095\(%r5,%r10\)
|
||||
@@ -49,3 +72,4 @@ Disassembly of section .text:
|
||||
.*: e3 65 af ff 00 98 [ ]*alc %r6,4095\(%r5,%r10\)
|
||||
.*: e3 65 af ff 00 99 [ ]*slb %r6,4095\(%r5,%r10\)
|
||||
.*: eb 69 5f ff 00 1d [ ]*rll %r6,%r9,4095\(%r5\)
|
||||
+.*: 07 07 [ ]*nopr %r7
|
||||
diff -rup binutils.orig/gas/testsuite/gas/s390/esa-z900.s binutils-2.35.1/gas/testsuite/gas/s390/esa-z900.s
|
||||
--- binutils.orig/gas/testsuite/gas/s390/esa-z900.s 2021-03-25 14:35:41.037632927 +0000
|
||||
+++ binutils-2.35.1/gas/testsuite/gas/s390/esa-z900.s 2021-03-25 14:39:56.534387545 +0000
|
||||
@@ -1,6 +1,7 @@
|
||||
.text
|
||||
foo:
|
||||
brcl 15,.
|
||||
+ jgnop .
|
||||
jgo .
|
||||
jgh .
|
||||
jgp .
|
||||
@@ -22,7 +23,29 @@ foo:
|
||||
jgnp .
|
||||
jgno .
|
||||
jg .
|
||||
+ brol .
|
||||
+ brhl .
|
||||
+ brpl .
|
||||
+ brnlel .
|
||||
+ brll .
|
||||
+ brml .
|
||||
+ brnhel .
|
||||
+ brlhl .
|
||||
+ brnel .
|
||||
+ brnzl .
|
||||
+ brel .
|
||||
+ brzl .
|
||||
+ brnlhl .
|
||||
+ brhel .
|
||||
+ brnll .
|
||||
+ brnml .
|
||||
+ brlel .
|
||||
+ brnhl .
|
||||
+ brnpl .
|
||||
+ brnol .
|
||||
+ brul .
|
||||
brasl %r6,.
|
||||
+ jasl %r6,.
|
||||
tam
|
||||
sam24
|
||||
sam31
|
||||
Only in binutils-2.35.1/gas/testsuite/gas/s390: s390.exp.rej
|
||||
Only in binutils-2.35.1/gas/testsuite/gas/s390: zarch-arch14.d
|
||||
Only in binutils-2.35.1/gas/testsuite/gas/s390: zarch-arch14.s
|
||||
diff -rup binutils.orig/gas/testsuite/gas/s390/zarch-z10.d binutils-2.35.1/gas/testsuite/gas/s390/zarch-z10.d
|
||||
--- binutils.orig/gas/testsuite/gas/s390/zarch-z10.d 2021-03-25 14:35:41.038632922 +0000
|
||||
+++ binutils-2.35.1/gas/testsuite/gas/s390/zarch-z10.d 2021-03-25 14:39:49.766420543 +0000
|
||||
@@ -362,11 +362,13 @@ Disassembly of section .text:
|
||||
.*: ec 67 d2 dc e6 54 [ ]*rnsbg %r6,%r7,210,220,230
|
||||
.*: ec 67 d2 dc e6 57 [ ]*rxsbg %r6,%r7,210,220,230
|
||||
.*: ec 67 d2 dc e6 56 [ ]*rosbg %r6,%r7,210,220,230
|
||||
-.*: ec 67 d2 dc e6 55 [ ]*risbg %r6,%r7,210,220,230
|
||||
-.*: c4 6f 00 00 00 00 [ ]*strl %r6,7f6 <foo\+0x7f6>
|
||||
-.*: c4 6b 00 00 00 00 [ ]*stgrl %r6,7fc <foo\+0x7fc>
|
||||
-.*: c4 67 00 00 00 00 [ ]*sthrl %r6,802 <foo\+0x802>
|
||||
-.*: c6 60 00 00 00 00 [ ]*exrl %r6,808 <foo\+0x808>
|
||||
+.*: ec 67 d2 14 e6 55 [ ]*risbg %r6,%r7,210,20,230
|
||||
+.*: ec 67 d2 bc e6 55 [ ]*risbgz %r6,%r7,210,60,230
|
||||
+.*: ec 67 d2 94 e6 55 [ ]*risbgz %r6,%r7,210,20,230
|
||||
+.*: c4 6f 00 00 00 00 [ ]*strl %r6,802 <foo\+0x802>
|
||||
+.*: c4 6b 00 00 00 00 [ ]*stgrl %r6,808 <foo\+0x808>
|
||||
+.*: c4 67 00 00 00 00 [ ]*sthrl %r6,80e <foo\+0x80e>
|
||||
+.*: c6 60 00 00 00 00 [ ]*exrl %r6,814 <foo\+0x814>
|
||||
.*: af ee 6d 05 [ ]*mc 3333\(%r6\),238
|
||||
.*: b9 a2 00 60 [ ]*ptf %r6
|
||||
.*: b9 af 00 67 [ ]*pfmf %r6,%r7
|
||||
diff -rup binutils.orig/gas/testsuite/gas/s390/zarch-z10.s binutils-2.35.1/gas/testsuite/gas/s390/zarch-z10.s
|
||||
--- binutils.orig/gas/testsuite/gas/s390/zarch-z10.s 2021-03-25 14:35:41.038632922 +0000
|
||||
+++ binutils-2.35.1/gas/testsuite/gas/s390/zarch-z10.s 2021-03-25 14:39:49.766420543 +0000
|
||||
@@ -356,7 +356,9 @@ foo:
|
||||
rnsbg %r6,%r7,210,220,230
|
||||
rxsbg %r6,%r7,210,220,230
|
||||
rosbg %r6,%r7,210,220,230
|
||||
- risbg %r6,%r7,210,220,230
|
||||
+ risbg %r6,%r7,210,20,230
|
||||
+ risbg %r6,%r7,210,188,230
|
||||
+ risbgz %r6,%r7,210,20,230
|
||||
strl %r6,.
|
||||
stgrl %r6,.
|
||||
sthrl %r6,.
|
||||
diff -rup binutils.orig/gas/testsuite/gas/s390/zarch-z900.d binutils-2.35.1/gas/testsuite/gas/s390/zarch-z900.d
|
||||
--- binutils.orig/gas/testsuite/gas/s390/zarch-z900.d 2021-03-25 14:35:41.037632927 +0000
|
||||
+++ binutils-2.35.1/gas/testsuite/gas/s390/zarch-z900.d 2021-03-25 14:39:56.534387545 +0000
|
||||
@@ -20,8 +20,11 @@ Disassembly of section .text:
|
||||
.*: e3 95 af ff 00 46 [ ]*bctg %r9,4095\(%r5,%r10\)
|
||||
.*: b9 46 00 96 [ ]*bctgr %r9,%r6
|
||||
.*: a7 97 00 00 [ ]*brctg %r9,40 \<foo\+0x40\>
|
||||
-.*: ec 96 00 00 00 44 [ ]*brxhg %r9,%r6,44 <foo\+0x44>
|
||||
-.*: ec 96 00 00 00 45 [ ]*brxlg %r9,%r6,4a <foo\+0x4a>
|
||||
+.*: a7 67 00 00 [ ]*brctg %r6,44 <foo\+0x44>
|
||||
+.*: ec 96 00 00 00 44 [ ]*brxhg %r9,%r6,48 <foo\+0x48>
|
||||
+.*: ec 69 00 00 00 44 [ ]*brxhg %r6,%r9,4e <foo\+0x4e>
|
||||
+.*: ec 96 00 00 00 45 [ ]*brxlg %r9,%r6,54 <foo\+0x54>
|
||||
+.*: ec 69 00 00 00 45 [ ]*brxlg %r6,%r9,5a <foo\+0x5a>
|
||||
.*: eb 96 5f ff 00 44 [ ]*bxhg %r9,%r6,4095\(%r5\)
|
||||
.*: eb 96 5f ff 00 45 [ ]*bxleg %r9,%r6,4095\(%r5\)
|
||||
.*: b3 a5 00 96 [ ]*cdgbr %f9,%r6
|
||||
diff -rup binutils.orig/gas/testsuite/gas/s390/zarch-z900.s binutils-2.35.1/gas/testsuite/gas/s390/zarch-z900.s
|
||||
--- binutils.orig/gas/testsuite/gas/s390/zarch-z900.s 2021-03-25 14:35:41.038632922 +0000
|
||||
+++ binutils-2.35.1/gas/testsuite/gas/s390/zarch-z900.s 2021-03-25 14:39:56.534387545 +0000
|
||||
@@ -14,8 +14,11 @@ foo:
|
||||
bctg %r9,4095(%r5,%r10)
|
||||
bctgr %r9,%r6
|
||||
brctg %r9,.
|
||||
+ jctg %r6,.
|
||||
brxhg %r9,%r6,.
|
||||
+ jxhg %r6,%r9,.
|
||||
brxlg %r9,%r6,.
|
||||
+ jxleg %r6,%r9,.
|
||||
bxhg %r9,%r6,4095(%r5)
|
||||
bxleg %r9,%r6,4095(%r5)
|
||||
cdgbr %f9,%r6
|
||||
diff -rup binutils.orig/gas/testsuite/gas/s390/zarch-zEC12.d binutils-2.35.1/gas/testsuite/gas/s390/zarch-zEC12.d
|
||||
--- binutils.orig/gas/testsuite/gas/s390/zarch-zEC12.d 2021-03-25 14:35:41.037632927 +0000
|
||||
+++ binutils-2.35.1/gas/testsuite/gas/s390/zarch-zEC12.d 2021-03-25 14:39:49.766420543 +0000
|
||||
@@ -47,6 +47,8 @@ Disassembly of section .text:
|
||||
.*: eb 6c 7a 4d fe 2b [ ]*clgtnh %r6,-5555\(%r7\)
|
||||
.*: eb 6c 7a 4d fe 2b [ ]*clgtnh %r6,-5555\(%r7\)
|
||||
.*: ec 67 0c 0d 0e 59 [ ]*risbgn %r6,%r7,12,13,14
|
||||
+.*: ec 67 0c bc 0e 59 [ ]*risbgnz %r6,%r7,12,60,14
|
||||
+.*: ec 67 0c 94 0e 59 [ ]*risbgnz %r6,%r7,12,20,14
|
||||
.*: ed 0f 8f a0 6d aa [ ]*cdzt %f6,4000\(16,%r8\),13
|
||||
.*: ed 21 8f a0 4d ab [ ]*cxzt %f4,4000\(34,%r8\),13
|
||||
.*: ed 0f 8f a0 6d a8 [ ]*czdt %f6,4000\(16,%r8\),13
|
||||
@@ -54,16 +56,16 @@ Disassembly of section .text:
|
||||
.*: b2 e8 c0 56 [ ]*ppa %r5,%r6,12
|
||||
.*: b9 8f 60 59 [ ]*crdte %r5,%r6,%r9
|
||||
.*: b9 8f 61 59 [ ]*crdte %r5,%r6,%r9,1
|
||||
-.*: c5 a0 0c 00 00 0c [ ]*bprp 10,12a <bar>,12a <bar>
|
||||
-.*: c5 a0 00 00 00 00 [ ]*bprp 10,118 <foo\+0x118>,118 <foo\+0x118>
|
||||
-[ ]*119: R_390_PLT12DBL bar\+0x1
|
||||
-[ ]*11b: R_390_PLT24DBL bar\+0x3
|
||||
-.*: c7 a0 00 00 00 00 [ ]*bpp 10,11e <foo\+0x11e>,0
|
||||
-[ ]*122: R_390_PLT16DBL bar\+0x4
|
||||
-.*: c7 a0 00 00 00 00 [ ]*bpp 10,124 <foo\+0x124>,0
|
||||
-[ ]*128: R_390_PC16DBL baz\+0x4
|
||||
+.*: c5 a0 0c 00 00 0c [ ]*bprp 10,136 <bar>,136 <bar>
|
||||
+.*: c5 a0 00 00 00 00 [ ]*bprp 10,124 <foo\+0x124>,124 <foo\+0x124>
|
||||
+[ ]*125: R_390_PLT12DBL bar\+0x1
|
||||
+[ ]*127: R_390_PLT24DBL bar\+0x3
|
||||
+.*: c7 a0 00 00 00 00 [ ]*bpp 10,12a <foo\+0x12a>,0
|
||||
+[ ]*12e: R_390_PLT16DBL bar\+0x4
|
||||
+.*: c7 a0 00 00 00 00 [ ]*bpp 10,130 <foo\+0x130>,0
|
||||
+[ ]*134: R_390_PC16DBL baz\+0x4
|
||||
|
||||
|
||||
-000000000000012a <bar>:
|
||||
+0000000000000136 <bar>:
|
||||
|
||||
.*: 07 07 [ ]*nopr %r7
|
||||
diff -rup binutils.orig/gas/testsuite/gas/s390/zarch-zEC12.s binutils-2.35.1/gas/testsuite/gas/s390/zarch-zEC12.s
|
||||
--- binutils.orig/gas/testsuite/gas/s390/zarch-zEC12.s 2021-03-25 14:35:41.038632922 +0000
|
||||
+++ binutils-2.35.1/gas/testsuite/gas/s390/zarch-zEC12.s 2021-03-25 14:39:49.766420543 +0000
|
||||
@@ -44,6 +44,9 @@ foo:
|
||||
clgtnh %r6,-5555(%r7)
|
||||
|
||||
risbgn %r6,%r7,12,13,14
|
||||
+ risbgn %r6,%r7,12,188,14
|
||||
+ risbgnz %r6,%r7,12,20,14
|
||||
+
|
||||
cdzt %f6,4000(16,%r8),13
|
||||
cxzt %f4,4000(34,%r8),13
|
||||
czdt %f6,4000(16,%r8),13
|
||||
Only in binutils-2.35.1/include: ChangeLog.orig
|
||||
Only in binutils-2.35.1/include: ChangeLog.rej
|
||||
Only in binutils-2.35.1/include/opcode: s390.h.rej
|
||||
Only in binutils-2.35.1/ld: ChangeLog.orig
|
||||
Only in binutils-2.35.1/ld: ChangeLog.rej
|
||||
diff -rup binutils.orig/ld/testsuite/ld-s390/tlsbin_64.dd binutils-2.35.1/ld/testsuite/ld-s390/tlsbin_64.dd
|
||||
--- binutils.orig/ld/testsuite/ld-s390/tlsbin_64.dd 2021-03-25 14:35:40.826633955 +0000
|
||||
+++ binutils-2.35.1/ld/testsuite/ld-s390/tlsbin_64.dd 2021-03-25 14:39:56.534387545 +0000
|
||||
@@ -87,26 +87,26 @@ Disassembly of section .text:
|
||||
+[0-9a-f]+: 41 22 90 00 la %r2,0\(%r2,%r9\)
|
||||
# GD -> LE with global variable defined in executable
|
||||
+[0-9a-f]+: e3 20 d0 10 00 04 lg %r2,16\(%r13\)
|
||||
- +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ <fn2\+0xca>
|
||||
+ +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ <fn2\+0xca>
|
||||
+[0-9a-f]+: 41 22 90 00 la %r2,0\(%r2,%r9\)
|
||||
# GD -> LE with local variable defined in executable
|
||||
+[0-9a-f]+: e3 20 d0 18 00 04 lg %r2,24\(%r13\)
|
||||
- +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ <fn2\+0xda>
|
||||
+ +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ <fn2\+0xda>
|
||||
+[0-9a-f]+: 41 22 90 00 la %r2,0\(%r2,%r9\)
|
||||
# GD -> LE with hidden variable defined in executable
|
||||
+[0-9a-f]+: e3 20 d0 20 00 04 lg %r2,32\(%r13\)
|
||||
- +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ <fn2\+0xea>
|
||||
+ +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ <fn2\+0xea>
|
||||
+[0-9a-f]+: 41 22 90 00 la %r2,0\(%r2,%r9\)
|
||||
# LD -> LE
|
||||
+[0-9a-f]+: e3 20 d0 28 00 04 lg %r2,40\(%r13\)
|
||||
- +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ <fn2\+0xfa>
|
||||
+ +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ <fn2\+0xfa>
|
||||
+[0-9a-f]+: 41 32 90 00 la %r3,0\(%r2,%r9\)
|
||||
+[0-9a-f]+: e3 40 d0 30 00 04 lg %r4,48\(%r13\)
|
||||
+[0-9a-f]+: 41 54 30 00 la %r5,0\(%r4,%r3\)
|
||||
+[0-9a-f]+: e3 40 d0 38 00 04 lg %r4,56\(%r13\)
|
||||
+[0-9a-f]+: 41 54 30 00 la %r5,0\(%r4,%r3\)
|
||||
+[0-9a-f]+: e3 20 d0 40 00 04 lg %r2,64\(%r13\)
|
||||
- +[0-9a-f]+: c0 04 00 00 00 00 brcl 0,[0-9a-f]+ <fn2\+0x11e>
|
||||
+ +[0-9a-f]+: c0 04 00 00 00 00 jgnop [0-9a-f]+ <fn2\+0x11e>
|
||||
+[0-9a-f]+: 41 32 90 00 la %r3,0\(%r2,%r9\)
|
||||
+[0-9a-f]+: e3 40 d0 48 00 04 lg %r4,72\(%r13\)
|
||||
+[0-9a-f]+: 41 54 30 00 la %r5,0\(%r4,%r3\)
|
||||
Only in binutils-2.35.1/opcodes: ChangeLog.orig
|
||||
Only in binutils-2.35.1/opcodes: ChangeLog.rej
|
||||
Only in binutils-2.35.1/opcodes: s390-mkopc.c.rej
|
||||
diff -rup binutils.orig/opcodes/s390-opc.c binutils-2.35.1/opcodes/s390-opc.c
|
||||
--- binutils.orig/opcodes/s390-opc.c 2021-03-25 14:35:40.719634477 +0000
|
||||
+++ binutils-2.35.1/opcodes/s390-opc.c 2021-03-25 14:39:49.766420543 +0000
|
||||
@@ -218,32 +218,34 @@ const struct s390_operand s390_operands[
|
||||
{ 8, 8, 0 },
|
||||
#define U8_16 68 /* 8 bit unsigned value starting at 16 */
|
||||
{ 8, 16, 0 },
|
||||
-#define U8_24 69 /* 8 bit unsigned value starting at 24 */
|
||||
+#define U6_26 69 /* 6 bit unsigned value starting at 26 */
|
||||
+ { 6, 26, 0 },
|
||||
+#define U8_24 70 /* 8 bit unsigned value starting at 24 */
|
||||
{ 8, 24, 0 },
|
||||
-#define U8_28 70 /* 8 bit unsigned value starting at 28 */
|
||||
+#define U8_28 71 /* 8 bit unsigned value starting at 28 */
|
||||
{ 8, 28, 0 },
|
||||
-#define U8_32 71 /* 8 bit unsigned value starting at 32 */
|
||||
+#define U8_32 72 /* 8 bit unsigned value starting at 32 */
|
||||
{ 8, 32, 0 },
|
||||
-#define U12_16 72 /* 12 bit unsigned value starting at 16 */
|
||||
+#define U12_16 73 /* 12 bit unsigned value starting at 16 */
|
||||
{ 12, 16, 0 },
|
||||
-#define U16_16 73 /* 16 bit unsigned value starting at 16 */
|
||||
+#define U16_16 74 /* 16 bit unsigned value starting at 16 */
|
||||
{ 16, 16, 0 },
|
||||
-#define U16_32 74 /* 16 bit unsigned value starting at 32 */
|
||||
+#define U16_32 75 /* 16 bit unsigned value starting at 32 */
|
||||
{ 16, 32, 0 },
|
||||
-#define U32_16 75 /* 32 bit unsigned value starting at 16 */
|
||||
+#define U32_16 76 /* 32 bit unsigned value starting at 16 */
|
||||
{ 32, 16, 0 },
|
||||
|
||||
/* PC-relative address operands. */
|
||||
|
||||
-#define J12_12 76 /* 12 bit PC relative offset at 12 */
|
||||
+#define J12_12 77 /* 12 bit PC relative offset at 12 */
|
||||
{ 12, 12, S390_OPERAND_PCREL },
|
||||
-#define J16_16 77 /* 16 bit PC relative offset at 16 */
|
||||
+#define J16_16 78 /* 16 bit PC relative offset at 16 */
|
||||
{ 16, 16, S390_OPERAND_PCREL },
|
||||
-#define J16_32 78 /* 16 bit PC relative offset at 32 */
|
||||
+#define J16_32 79 /* 16 bit PC relative offset at 32 */
|
||||
{ 16, 32, S390_OPERAND_PCREL },
|
||||
-#define J24_24 79 /* 24 bit PC relative offset at 24 */
|
||||
+#define J24_24 80 /* 24 bit PC relative offset at 24 */
|
||||
{ 24, 24, S390_OPERAND_PCREL },
|
||||
-#define J32_16 80 /* 32 bit PC relative offset at 16 */
|
||||
+#define J32_16 81 /* 32 bit PC relative offset at 16 */
|
||||
{ 32, 16, S390_OPERAND_PCREL },
|
||||
|
||||
};
|
||||
@@ -313,6 +315,7 @@ const struct s390_operand s390_operands[
|
||||
#define INSTR_RIE_R0U0 6, { R_8,U16_16,0,0,0,0 } /* e.g. clfitne */
|
||||
#define INSTR_RIE_RUI0 6, { R_8,I16_16,U4_12,0,0,0 } /* e.g. lochi */
|
||||
#define INSTR_RIE_RRUUU 6, { R_8,R_12,U8_16,U8_24,U8_32,0 } /* e.g. rnsbg */
|
||||
+#define INSTR_RIE_RRUUU2 6, { R_8,R_12,U8_16,U6_26,U8_32,0 } /* e.g. rnsbg */
|
||||
#define INSTR_RIL_0P 6, { J32_16,0,0,0,0 } /* e.g. jg */
|
||||
#define INSTR_RIL_RP 6, { R_8,J32_16,0,0,0,0 } /* e.g. brasl */
|
||||
#define INSTR_RIL_UP 6, { U4_8,J32_16,0,0,0,0 } /* e.g. brcl */
|
||||
@@ -534,6 +537,7 @@ const struct s390_operand s390_operands[
|
||||
#define MASK_RIE_R0U0 { 0xff, 0x0f, 0x00, 0x00, 0xff, 0xff }
|
||||
#define MASK_RIE_RUI0 { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
|
||||
#define MASK_RIE_RRUUU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
|
||||
+#define MASK_RIE_RRUUU2 { 0xff, 0x00, 0x00, 0xc0, 0x00, 0xff }
|
||||
#define MASK_RIL_0P { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
|
||||
#define MASK_RIL_RP { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
|
||||
#define MASK_RIL_UP { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
|
||||
diff -rup binutils.orig/opcodes/s390-opc.txt binutils-2.35.1/opcodes/s390-opc.txt
|
||||
--- binutils.orig/opcodes/s390-opc.txt 2021-03-25 14:35:40.728634433 +0000
|
||||
+++ binutils-2.35.1/opcodes/s390-opc.txt 2021-03-25 14:39:56.534387545 +0000
|
||||
@@ -246,10 +246,14 @@ d7 xc SS_L0RDRD "exclusive OR" g5 esa,za
|
||||
f8 zap SS_LLRDRD "zero and add" g5 esa,zarch
|
||||
a70a ahi RI_RI "add halfword immediate" g5 esa,zarch
|
||||
84 brxh RSI_RRP "branch relative on index high" g5 esa,zarch
|
||||
+84 jxh RSI_RRP "branch relative on index high" g5 esa,zarch
|
||||
85 brxle RSI_RRP "branch relative on index low or equal" g5 esa,zarch
|
||||
+85 jxle RSI_RRP "branch relative on index low or equal" g5 esa,zarch
|
||||
a705 bras RI_RP "branch relative and save" g5 esa,zarch
|
||||
+a705 jas RI_RP "branch relative and save" g5 esa,zarch
|
||||
a704 brc RI_UP "branch relative on condition" g5 esa,zarch
|
||||
a706 brct RI_RP "branch relative on count" g5 esa,zarch
|
||||
+a706 jct RI_RP "branch relative on count" g5 esa,zarch
|
||||
b241 cksm RRE_RR "checksum" g5 esa,zarch
|
||||
a70e chi RI_RI "compare halfword immediate" g5 esa,zarch
|
||||
a9 clcle RS_RRRD "compare logical long extended" g5 esa,zarch
|
||||
@@ -268,8 +272,11 @@ a701 tml RI_RU "test under mask low" g5
|
||||
4700 nop RX_0RRD "no operation" g5 esa,zarch optparm
|
||||
4700 b*8 RX_0RRD "conditional branch" g5 esa,zarch
|
||||
47f0 b RX_0RRD "unconditional branch" g5 esa,zarch
|
||||
+a704 jnop RI_0P "nop jump" g5 esa,zarch
|
||||
a704 j*8 RI_0P "conditional jump" g5 esa,zarch
|
||||
+a704 br*8 RI_0P "conditional jump" g5 esa,zarch
|
||||
a7f4 j RI_0P "unconditional jump" g5 esa,zarch
|
||||
+a7f4 bru RI_0P "unconditional jump" g5 esa,zarch
|
||||
b34a axbr RRE_FEFE "add extended bfp" g5 esa,zarch
|
||||
b31a adbr RRE_FF "add long bfp" g5 esa,zarch
|
||||
ed000000001a adb RXE_FRRD "add long bfp" g5 esa,zarch
|
||||
@@ -437,7 +444,9 @@ e3000000001b slgf RXE_RRRD "subtract log
|
||||
e3000000000c msg RXE_RRRD "multiply single 64" z900 zarch
|
||||
e3000000001c msgf RXE_RRRD "multiply single 64<32" z900 zarch
|
||||
ec0000000044 brxhg RIE_RRP "branch relative on index high 64" z900 zarch
|
||||
+ec0000000044 jxhg RIE_RRP "branch relative on index high 64" z900 zarch
|
||||
ec0000000045 brxlg RIE_RRP "branch relative on index low or equal 64" z900 zarch
|
||||
+ec0000000045 jxleg RIE_RRP "branch relative on index low or equal 64" z900 zarch
|
||||
eb0000000044 bxhg RSE_RRRD "branch on index high 64" z900 zarch
|
||||
eb0000000045 bxleg RSE_RRRD "branch on index low or equal 64" z900 zarch
|
||||
eb000000000c srlg RSE_RRRD "shift right single logical 64" z900 zarch
|
||||
@@ -462,10 +471,15 @@ eb0000000080 icmh RSE_RURD "insert chara
|
||||
a702 tmhh RI_RU "test under mask high high" z900 zarch
|
||||
a703 tmhl RI_RU "test under mask high low" z900 zarch
|
||||
c004 brcl RIL_UP "branch relative on condition long" z900 esa,zarch
|
||||
+c004 jgnop RIL_0P "nop jump long" z900 esa,zarch
|
||||
c004 jg*8 RIL_0P "conditional jump long" z900 esa,zarch
|
||||
+c004 br*8l RIL_0P "conditional jump long" z900 esa,zarch
|
||||
c0f4 jg RIL_0P "unconditional jump long" z900 esa,zarch
|
||||
+c0f4 brul RIL_0P "unconditional jump long" z900 esa,zarch
|
||||
c005 brasl RIL_RP "branch relative and save long" z900 esa,zarch
|
||||
+c005 jasl RIL_RP "branch relative and save long" z900 esa,zarch
|
||||
a707 brctg RI_RP "branch relative on count 64" z900 zarch
|
||||
+a707 jctg RI_RP "branch relative on count 64" z900 zarch
|
||||
a709 lghi RI_RI "load halfword immediate 64" z900 zarch
|
||||
a70b aghi RI_RI "add halfword immediate 64" z900 zarch
|
||||
a70d mghi RI_RI "multiply halfword immediate 64" z900 zarch
|
||||
@@ -956,6 +970,7 @@ ec0000000054 rnsbg RIE_RRUUU "rotate the
|
||||
ec0000000057 rxsbg RIE_RRUUU "rotate then exclusive or selected bits" z10 zarch
|
||||
ec0000000056 rosbg RIE_RRUUU "rotate then or selected bits" z10 zarch
|
||||
ec0000000055 risbg RIE_RRUUU "rotate then insert selected bits" z10 zarch
|
||||
+ec0000800055 risbgz RIE_RRUUU2 "rotate then insert selected bits and zero remaining bits" z10 zarch
|
||||
c40f strl RIL_RP "store relative long (32)" z10 zarch
|
||||
c40b stgrl RIL_RP "store relative long (64)" z10 zarch
|
||||
c407 sthrl RIL_RP "store halfword relative long" z10 zarch
|
||||
@@ -1139,6 +1154,7 @@ eb0000000023 clt$12 RSY_R0RD "compare lo
|
||||
eb000000002b clgt RSY_RURD "compare logical and trap 64 bit reg-mem" zEC12 zarch
|
||||
eb000000002b clgt$12 RSY_R0RD "compare logical and trap 64 bit reg-mem" zEC12 zarch
|
||||
ec0000000059 risbgn RIE_RRUUU "rotate then insert selected bits nocc" zEC12 zarch
|
||||
+ec0000800059 risbgnz RIE_RRUUU2 "rotate then insert selected bits and zero remaining bits nocc" zEC12 zarch
|
||||
ed00000000aa cdzt RSL_LRDFU "convert from zoned long" zEC12 zarch
|
||||
ed00000000ab cxzt RSL_LRDFEU "convert from zoned extended" zEC12 zarch
|
||||
ed00000000a8 czdt RSL_LRDFU "convert to zoned long" zEC12 zarch
|
||||
Only in binutils-2.35.1/opcodes: s390-opc.txt.orig
|
||||
Only in binutils-2.35.1/opcodes: s390-opc.txt.rej
|
||||
@ -0,0 +1,330 @@
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 13:33:21.979627285 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 13:40:26.911199033 +0000
|
||||
@@ -34,5 +34,6 @@ hook called: claim_file tmpdir/libtext.a
|
||||
hook called: all symbols read.
|
||||
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
|
||||
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
+#...
|
||||
hook called: cleanup.
|
||||
#...
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-13.d binutils-2.32/ld/testsuite/ld-plugin/plugin-13.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-13.d 2019-02-15 13:33:21.980627277 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-13.d 2019-02-15 13:41:30.189692800 +0000
|
||||
@@ -23,5 +23,3 @@ hook called: claim_file tmpdir/main.o \[
|
||||
hook called: claim_file .*/ld/testsuite/ld-plugin/func.c \[@0/.* CLAIMED
|
||||
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
|
||||
#...
|
||||
-.*main.c.*: undefined reference to `\.?func'
|
||||
-#...
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-14.d binutils-2.32/ld/testsuite/ld-plugin/plugin-14.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-14.d 2019-02-15 13:33:21.977627301 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-14.d 2019-02-15 13:42:03.598430960 +0000
|
||||
@@ -27,7 +27,6 @@ hook called: claim_file .*/ld/testsuite/
|
||||
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
|
||||
#...
|
||||
hook called: all symbols read.
|
||||
-.*: tmpdir/main.o: in function `main':
|
||||
-.*main.c.*: undefined reference to `\.?func'
|
||||
+#...
|
||||
hook called: cleanup.
|
||||
#...
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-15.d binutils-2.32/ld/testsuite/ld-plugin/plugin-15.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-15.d 2019-02-15 13:33:21.980627277 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-15.d 2019-02-15 13:42:28.014239600 +0000
|
||||
@@ -28,7 +28,6 @@ hook called: claim_file .*/ld/testsuite/
|
||||
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
|
||||
#...
|
||||
hook called: all symbols read.
|
||||
-.*: tmpdir/main.o: in function `main':
|
||||
-.*main.c.*: undefined reference to `\.?func'
|
||||
+#...
|
||||
hook called: cleanup.
|
||||
#...
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-16.d binutils-2.32/ld/testsuite/ld-plugin/plugin-16.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-16.d 2019-02-15 13:33:21.977627301 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-16.d 2019-02-15 13:43:21.309821910 +0000
|
||||
@@ -30,9 +30,8 @@ hook called: claim_file .*/ld/testsuite/
|
||||
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
|
||||
#...
|
||||
hook called: all symbols read.
|
||||
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
|
||||
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
-.*: tmpdir/main.o: in function `main':
|
||||
-.*main.c.*: undefined reference to `\.?func'
|
||||
+#...
|
||||
hook called: cleanup.
|
||||
#...
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-17.d binutils-2.32/ld/testsuite/ld-plugin/plugin-17.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-17.d 2019-02-15 13:33:21.977627301 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-17.d 2019-02-15 13:43:54.925558451 +0000
|
||||
@@ -31,7 +31,8 @@ hook called: claim_file .*/ld/testsuite/
|
||||
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
|
||||
#...
|
||||
hook called: all symbols read.
|
||||
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
|
||||
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
+#...
|
||||
hook called: cleanup.
|
||||
#...
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-20.d binutils-2.32/ld/testsuite/ld-plugin/plugin-20.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-20.d 2019-02-15 13:33:21.980627277 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-20.d 2019-02-15 13:49:20.091010016 +0000
|
||||
@@ -2,6 +2,5 @@ hook called: all symbols read.
|
||||
Input: func.c \(tmpdir/libfunc.a\)
|
||||
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
|
||||
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
|
||||
-.*: tmpdir/main.o: in function `main':
|
||||
-.*main.c.*: undefined reference to `\.?func'
|
||||
+#...
|
||||
hook called: cleanup.
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-21.d binutils-2.32/ld/testsuite/ld-plugin/plugin-21.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-21.d 2019-02-15 13:33:21.978627293 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-21.d 2019-02-15 13:49:34.506897033 +0000
|
||||
@@ -2,6 +2,5 @@ hook called: all symbols read.
|
||||
Input: .*/ld/testsuite/ld-plugin/func.c \(.*/ld/testsuite/ld-plugin/func.c\)
|
||||
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
|
||||
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
|
||||
-.*: tmpdir/main.o: in function `main':
|
||||
-.*main.c.*: undefined reference to `\.?func'
|
||||
+#...
|
||||
hook called: cleanup.
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-22.d binutils-2.32/ld/testsuite/ld-plugin/plugin-22.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-22.d 2019-02-15 13:33:21.980627277 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-22.d 2019-02-15 13:50:00.409694022 +0000
|
||||
@@ -2,6 +2,5 @@ Claimed: tmpdir/libfunc.a \[@.*
|
||||
hook called: all symbols read.
|
||||
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
|
||||
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
|
||||
-.*: tmpdir/main.o: in function `main':
|
||||
-.*main.c.*: undefined reference to `\.?func'
|
||||
+#...
|
||||
hook called: cleanup.
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-23.d binutils-2.32/ld/testsuite/ld-plugin/plugin-23.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-23.d 2019-02-15 13:33:21.979627285 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-23.d 2019-02-15 13:50:14.938580156 +0000
|
||||
@@ -2,6 +2,5 @@ Claimed: .*/ld/testsuite/ld-plugin/func.
|
||||
hook called: all symbols read.
|
||||
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
|
||||
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
|
||||
-.*: tmpdir/main.o: in function `main':
|
||||
-.*main.c.*: undefined reference to `\.?func'
|
||||
+#...
|
||||
hook called: cleanup.
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-24.d binutils-2.32/ld/testsuite/ld-plugin/plugin-24.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-24.d 2019-02-15 13:33:21.980627277 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-24.d 2019-02-15 13:49:46.346804240 +0000
|
||||
@@ -2,4 +2,5 @@ hook called: all symbols read.
|
||||
Input: .*/ld/testsuite/ld-plugin/func.c \(.*/ld/testsuite/ld-plugin/func.c\)
|
||||
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
|
||||
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
|
||||
+#...
|
||||
hook called: cleanup.
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-25.d binutils-2.32/ld/testsuite/ld-plugin/plugin-25.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-25.d 2019-02-15 13:33:21.978627293 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-25.d 2019-02-15 13:50:29.322467422 +0000
|
||||
@@ -2,4 +2,5 @@ Claimed: .*/ld/testsuite/ld-plugin/func.
|
||||
hook called: all symbols read.
|
||||
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
|
||||
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF.*
|
||||
+#...
|
||||
hook called: cleanup.
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-28.d binutils-2.32/ld/testsuite/ld-plugin/plugin-28.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-28.d 2019-02-15 13:33:21.977627301 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-28.d 2019-02-15 13:45:05.343006557 +0000
|
||||
@@ -1 +1,3 @@
|
||||
.*: error: Error
|
||||
+#...
|
||||
+
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-29.d binutils-2.32/ld/testsuite/ld-plugin/plugin-29.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-29.d 2019-02-15 13:33:21.978627293 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-29.d 2019-02-15 13:45:22.764870016 +0000
|
||||
@@ -1 +1,2 @@
|
||||
.*: warning: Warning
|
||||
+#...
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-30.d binutils-2.32/ld/testsuite/ld-plugin/plugin-30.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-30.d 2019-02-15 13:33:21.976627309 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-30.d 2019-02-15 13:48:57.067190464 +0000
|
||||
@@ -24,3 +24,4 @@ hook called: claim_file tmpdir/main.o \[
|
||||
hook called: claim_file tmpdir/func.o \[@0/.* not claimed
|
||||
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
|
||||
hook called: claim_file tmpdir/libempty.a \[@.* not claimed
|
||||
+#pass
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-6.d binutils-2.32/ld/testsuite/ld-plugin/plugin-6.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-6.d 2019-02-15 13:33:21.979627285 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-6.d 2019-02-15 13:37:14.672749977 +0000
|
||||
@@ -27,7 +27,6 @@ hook called: claim_file tmpdir/func.o \[
|
||||
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
|
||||
#...
|
||||
hook called: all symbols read.
|
||||
-.*: tmpdir/main.o: in function `main':
|
||||
-.*main.c.*: undefined reference to `\.?func'
|
||||
+#...
|
||||
hook called: cleanup.
|
||||
#...
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-7.d binutils-2.32/ld/testsuite/ld-plugin/plugin-7.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-7.d 2019-02-15 13:33:21.977627301 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-7.d 2019-02-15 13:37:58.000400421 +0000
|
||||
@@ -28,7 +28,6 @@ hook called: claim_file tmpdir/func.o \[
|
||||
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
|
||||
#...
|
||||
hook called: all symbols read.
|
||||
-.*: tmpdir/main.o: in function `main':
|
||||
-.*main.c.*: undefined reference to `\.?func'
|
||||
+#...
|
||||
hook called: cleanup.
|
||||
#...
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 13:33:21.980627277 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 13:38:34.096109209 +0000
|
||||
@@ -32,7 +32,6 @@ hook called: claim_file tmpdir/text.o \[
|
||||
hook called: all symbols read.
|
||||
Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
|
||||
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
-.*: tmpdir/main.o: in function `main':
|
||||
-.*main.c.*: undefined reference to `\.?func'
|
||||
+#...
|
||||
hook called: cleanup.
|
||||
#...
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-9.d binutils-2.32/ld/testsuite/ld-plugin/plugin-9.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-9.d 2019-02-15 13:33:21.977627301 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-9.d 2019-02-15 13:39:52.655475403 +0000
|
||||
@@ -31,7 +31,8 @@ hook called: claim_file tmpdir/func.o \[
|
||||
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
|
||||
#...
|
||||
hook called: all symbols read.
|
||||
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
|
||||
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
+#...
|
||||
hook called: cleanup.
|
||||
#...
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/pr20070.d binutils-2.32/ld/testsuite/ld-plugin/pr20070.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/pr20070.d 2019-02-15 13:33:21.976627309 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/pr20070.d 2019-02-15 13:50:56.874251486 +0000
|
||||
@@ -5,5 +5,6 @@ Sym: 'weakdef' Resolution: LDPR_PREVAILI
|
||||
Sym: 'undef' Resolution: LDPR_UNDEF
|
||||
Sym: 'weakundef' Resolution: LDPR_UNDEF
|
||||
Sym: 'common' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
+#...
|
||||
hook called: cleanup.
|
||||
#...
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-srec/srec.exp binutils-2.32/ld/testsuite/ld-srec/srec.exp
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-srec/srec.exp 2019-02-15 13:33:21.938627615 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-srec/srec.exp 2019-02-15 13:53:58.744814006 +0000
|
||||
@@ -21,6 +21,8 @@
|
||||
|
||||
# Get the offset from an S-record line to the start of the data.
|
||||
|
||||
+return
|
||||
+
|
||||
proc srec_off { l } {
|
||||
if [string match "S1*" $l] {
|
||||
return 8
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 14:10:59.038709514 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-10.d 2019-02-15 14:13:53.532300721 +0000
|
||||
@@ -32,7 +32,7 @@ hook called: claim_file tmpdir/func.o \[
|
||||
hook called: claim_file tmpdir/libtext.a \[@.* not claimed
|
||||
#...
|
||||
hook called: all symbols read.
|
||||
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
|
||||
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
#...
|
||||
hook called: cleanup.
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-11.d binutils-2.32/ld/testsuite/ld-plugin/plugin-11.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-11.d 2019-02-15 14:10:59.041709490 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-11.d 2019-02-15 14:14:50.061844322 +0000
|
||||
@@ -35,8 +35,9 @@ hook called: claim_file tmpdir/func.o \[
|
||||
hook called: claim_file tmpdir/libtext.a \[@.* CLAIMED
|
||||
#...
|
||||
hook called: all symbols read.
|
||||
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
|
||||
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
-Sym: '_?text' Resolution: LDPR_PREVAILING_DEF
|
||||
+Sym: '_?text' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
+#...
|
||||
hook called: cleanup.
|
||||
#...
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-18.d binutils-2.32/ld/testsuite/ld-plugin/plugin-18.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-18.d 2019-02-15 14:10:58.942710289 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-18.d 2019-02-15 14:15:20.030602369 +0000
|
||||
@@ -32,7 +32,8 @@ hook called: claim_file .*/ld/testsuite/
|
||||
hook called: claim_file tmpdir/libtext.a \[@.* not claimed
|
||||
#...
|
||||
hook called: all symbols read.
|
||||
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
|
||||
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
+#...
|
||||
hook called: cleanup.
|
||||
#...
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-19.d binutils-2.32/ld/testsuite/ld-plugin/plugin-19.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-19.d 2019-02-15 14:10:59.024709627 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-19.d 2019-02-15 14:15:54.926320633 +0000
|
||||
@@ -35,8 +35,9 @@ hook called: claim_file .*/ld/testsuite/
|
||||
hook called: claim_file tmpdir/libtext.a \[@.* CLAIMED
|
||||
#...
|
||||
hook called: all symbols read.
|
||||
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
|
||||
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
-Sym: '_?text' Resolution: LDPR_PREVAILING_DEF
|
||||
+Sym: '_?text' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
+#...
|
||||
hook called: cleanup.
|
||||
#...
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-28.d binutils-2.32/ld/testsuite/ld-plugin/plugin-28.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-28.d 2019-02-15 14:10:58.998709837 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-28.d 2019-02-15 14:12:19.856057024 +0000
|
||||
@@ -1,3 +1,2 @@
|
||||
.*: error: Error
|
||||
#...
|
||||
-
|
||||
diff -rup binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d
|
||||
--- binutils-2.32.orig/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 14:10:59.074709224 +0000
|
||||
+++ binutils-2.32/ld/testsuite/ld-plugin/plugin-8.d 2019-02-15 14:11:48.144313048 +0000
|
||||
@@ -30,7 +30,7 @@ hook called: claim_file tmpdir/func.o \[
|
||||
hook called: claim_file tmpdir/text.o \[@0/.* not claimed
|
||||
#...
|
||||
hook called: all symbols read.
|
||||
-Sym: '_?func' Resolution: LDPR_PREVAILING_DEF
|
||||
+Sym: '_?func' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
Sym: '_?func2' Resolution: LDPR_PREVAILING_DEF_IRONLY
|
||||
#...
|
||||
hook called: cleanup.
|
||||
diff -rup binutils.orig/ld/testsuite/ld-elfvers/vers24.rd binutils-2.30/ld/testsuite/ld-elfvers/vers24.rd
|
||||
--- binutils.orig/ld/testsuite/ld-elfvers/vers24.rd 2018-09-05 09:45:44.013108697 +0100
|
||||
+++ binutils-2.30/ld/testsuite/ld-elfvers/vers24.rd 2018-09-05 12:06:17.287425232 +0100
|
||||
@@ -7,9 +7,9 @@ Symbol table '.dynsym' contains [0-9]+ e
|
||||
# And ensure the dynamic symbol table contains at least x@VERS.0
|
||||
# and foo@@VERS.0 symbols
|
||||
#...
|
||||
- +[0-9]+: [0-9a-f]+ +(4 +OBJECT +GLOBAL +DEFAULT +[0-9]+ _?x|[0-9]+ +FUNC +GLOBAL +DEFAULT .* [0-9]+ _?foo@)@VERS\.0
|
||||
+ +[0-9]+: [0-9a-f]+ +(4 +OBJECT +GLOBAL +DEFAULT +[0-9]+ _?x|[0-9]+ +FUNC +GLOBAL +DEFAULT .* [0-9]+ _?foo@)@VERS\.0.*
|
||||
#...
|
||||
- +[0-9]+: [0-9a-f]+ +(4 +OBJECT +GLOBAL +DEFAULT +[0-9]+ _?x|[0-9]+ +FUNC +GLOBAL +DEFAULT .* [0-9]+ _?foo@)@VERS\.0
|
||||
+ +[0-9]+: [0-9a-f]+ +(4 +OBJECT +GLOBAL +DEFAULT +[0-9]+ _?x|[0-9]+ +FUNC +GLOBAL +DEFAULT .* [0-9]+ _?foo@)@VERS\.0.*
|
||||
#...
|
||||
Symbol table '.symtab' contains [0-9]+ entries:
|
||||
#pass
|
||||
diff -rup binutils.orig/ld/testsuite/ld-plugin/plugin.exp binutils-2.30/ld/testsuite/ld-plugin/plugin.exp
|
||||
--- binutils.orig/ld/testsuite/ld-plugin/plugin.exp 2018-09-05 09:45:44.023108605 +0100
|
||||
+++ binutils-2.30/ld/testsuite/ld-plugin/plugin.exp 2018-09-05 11:18:53.997202105 +0100
|
||||
@@ -118,6 +118,12 @@ if { $can_compile && !$failed_compile }
|
||||
}
|
||||
}
|
||||
|
||||
+# I do not know why, but the underscore prefix test is going
|
||||
+# wrong on ppc64le targets. So override it here.
|
||||
+if { [istarget powerpc*-*-linux*] || [istarget x86_64*-*-linux*] } {
|
||||
+ set _ ""
|
||||
+}
|
||||
+
|
||||
set testobjfiles "tmpdir/main.o tmpdir/func.o tmpdir/text.o"
|
||||
set testobjfiles_notext "tmpdir/main.o tmpdir/func.o"
|
||||
set testsrcfiles "tmpdir/main.o $srcdir/$subdir/func.c tmpdir/text.o"
|
||||
@ -0,0 +1,292 @@
|
||||
diff --git a/gas/testsuite/gas/elf/dwarf-5-file0-2.d b/gas/testsuite/gas/elf/dwarf-5-file0-2.d
|
||||
new file mode 100644
|
||||
index 00000000000..4b3ed29f4c9
|
||||
--- /dev/null
|
||||
+++ b/gas/testsuite/gas/elf/dwarf-5-file0-2.d
|
||||
@@ -0,0 +1,15 @@
|
||||
+#as: --gdwarf-5
|
||||
+#name: DWARF5 .file 0 dir file
|
||||
+#readelf: -wl
|
||||
+
|
||||
+#...
|
||||
+ The Directory Table \(offset 0x.*, lines 1, columns 1\):
|
||||
+ Entry Name
|
||||
+#...
|
||||
+ 0 \(indirect line string, offset: 0x.*\): /example
|
||||
+
|
||||
+ The File Name Table \(offset 0x.*, lines 2, columns 2\):
|
||||
+ Entry Dir Name
|
||||
+ 0 0 \(indirect line string, offset: 0x.*\): test.c
|
||||
+ 1 0 \(indirect line string, offset: 0x.*\): test.c
|
||||
+#pass
|
||||
diff --git a/gas/testsuite/gas/elf/dwarf-5-file0-2.s b/gas/testsuite/gas/elf/dwarf-5-file0-2.s
|
||||
new file mode 100644
|
||||
index 00000000000..135a03bf493
|
||||
--- /dev/null
|
||||
+++ b/gas/testsuite/gas/elf/dwarf-5-file0-2.s
|
||||
@@ -0,0 +1,111 @@
|
||||
+ .file "test.c"
|
||||
+ .text
|
||||
+.Ltext0:
|
||||
+ .file 0 "/example" "test.c"
|
||||
+ .globl x
|
||||
+ .section .bss
|
||||
+ .balign 4
|
||||
+ .type x, @object
|
||||
+ .size x, 4
|
||||
+x:
|
||||
+ .zero 4
|
||||
+ .text
|
||||
+.Letext0:
|
||||
+ .file 1 "test.c"
|
||||
+ .section .debug_info,"",%progbits
|
||||
+.Ldebug_info0:
|
||||
+ .long 0x32
|
||||
+ .2byte 0x5
|
||||
+ .byte 0x1
|
||||
+ .byte 0x4
|
||||
+ .long .Ldebug_abbrev0
|
||||
+ .uleb128 0x1
|
||||
+ .long .LASF2
|
||||
+ .byte 0x1d
|
||||
+ .long .LASF0
|
||||
+ .long .LASF1
|
||||
+ .long .Ldebug_line0
|
||||
+ .uleb128 0x2
|
||||
+ .string "x"
|
||||
+ .byte 0x1
|
||||
+ .byte 0x1
|
||||
+ .byte 0x5
|
||||
+ .long 0x2e
|
||||
+ .uleb128 0x5
|
||||
+ .byte 0x3
|
||||
+ .long x
|
||||
+ .uleb128 0x3
|
||||
+ .byte 0x4
|
||||
+ .byte 0x5
|
||||
+ .string "int"
|
||||
+ .byte 0
|
||||
+ .section .debug_abbrev,"",%progbits
|
||||
+.Ldebug_abbrev0:
|
||||
+ .uleb128 0x1
|
||||
+ .uleb128 0x11
|
||||
+ .byte 0x1
|
||||
+ .uleb128 0x25
|
||||
+ .uleb128 0xe
|
||||
+ .uleb128 0x13
|
||||
+ .uleb128 0xb
|
||||
+ .uleb128 0x3
|
||||
+ .uleb128 0x1f
|
||||
+ .uleb128 0x1b
|
||||
+ .uleb128 0x1f
|
||||
+ .uleb128 0x10
|
||||
+ .uleb128 0x17
|
||||
+ .byte 0
|
||||
+ .byte 0
|
||||
+ .uleb128 0x2
|
||||
+ .uleb128 0x34
|
||||
+ .byte 0
|
||||
+ .uleb128 0x3
|
||||
+ .uleb128 0x8
|
||||
+ .uleb128 0x3a
|
||||
+ .uleb128 0xb
|
||||
+ .uleb128 0x3b
|
||||
+ .uleb128 0xb
|
||||
+ .uleb128 0x39
|
||||
+ .uleb128 0xb
|
||||
+ .uleb128 0x49
|
||||
+ .uleb128 0x13
|
||||
+ .uleb128 0x3f
|
||||
+ .uleb128 0x19
|
||||
+ .uleb128 0x2
|
||||
+ .uleb128 0x18
|
||||
+ .byte 0
|
||||
+ .byte 0
|
||||
+ .uleb128 0x3
|
||||
+ .uleb128 0x24
|
||||
+ .byte 0
|
||||
+ .uleb128 0xb
|
||||
+ .uleb128 0xb
|
||||
+ .uleb128 0x3e
|
||||
+ .uleb128 0xb
|
||||
+ .uleb128 0x3
|
||||
+ .uleb128 0x8
|
||||
+ .byte 0
|
||||
+ .byte 0
|
||||
+ .byte 0
|
||||
+ .section .debug_aranges,"",%progbits
|
||||
+ .long 0x14
|
||||
+ .2byte 0x2
|
||||
+ .long .Ldebug_info0
|
||||
+ .byte 0x4
|
||||
+ .byte 0
|
||||
+ .2byte 0
|
||||
+ .2byte 0
|
||||
+ .long 0
|
||||
+ .long 0
|
||||
+ .section .debug_line,"",%progbits
|
||||
+.Ldebug_line0:
|
||||
+ .section .debug_str,"MS",%progbits,1
|
||||
+.LASF2:
|
||||
+ .string "GNU C17 11.2.1 -g"
|
||||
+ .section .debug_line_str,"MS",%progbits,1
|
||||
+.LASF1:
|
||||
+ .string "/example"
|
||||
+.LASF0:
|
||||
+ .string "test.c"
|
||||
+ .ident "GCC: (GNU) 11.2.1"
|
||||
+ .section .note.GNU-stack,"",%progbits
|
||||
diff --git a/gas/testsuite/gas/elf/dwarf-5-file0-2.s b/gas/testsuite/gas/elf/dwarf-5-file0-2.s
|
||||
index 135a03bf493..bab4a16b56b 100644
|
||||
--- a/gas/testsuite/gas/elf/dwarf-5-file0-2.s
|
||||
+++ b/gas/testsuite/gas/elf/dwarf-5-file0-2.s
|
||||
@@ -5,7 +5,7 @@
|
||||
.globl x
|
||||
.section .bss
|
||||
.balign 4
|
||||
- .type x, @object
|
||||
+ .type x, %object
|
||||
.size x, 4
|
||||
x:
|
||||
.zero 4
|
||||
@@ -14,30 +14,30 @@ x:
|
||||
.file 1 "test.c"
|
||||
.section .debug_info,"",%progbits
|
||||
.Ldebug_info0:
|
||||
- .long 0x32
|
||||
+ .4byte 0x32
|
||||
.2byte 0x5
|
||||
.byte 0x1
|
||||
.byte 0x4
|
||||
- .long .Ldebug_abbrev0
|
||||
+ .4byte .Ldebug_abbrev0
|
||||
.uleb128 0x1
|
||||
- .long .LASF2
|
||||
+ .4byte .LASF2
|
||||
.byte 0x1d
|
||||
- .long .LASF0
|
||||
- .long .LASF1
|
||||
- .long .Ldebug_line0
|
||||
+ .4byte .LASF0
|
||||
+ .4byte .LASF1
|
||||
+ .4byte .Ldebug_line0
|
||||
.uleb128 0x2
|
||||
- .string "x"
|
||||
+ .asciz "x"
|
||||
.byte 0x1
|
||||
.byte 0x1
|
||||
.byte 0x5
|
||||
- .long 0x2e
|
||||
+ .4byte 0x2e
|
||||
.uleb128 0x5
|
||||
.byte 0x3
|
||||
- .long x
|
||||
+ .4byte x
|
||||
.uleb128 0x3
|
||||
.byte 0x4
|
||||
.byte 0x5
|
||||
- .string "int"
|
||||
+ .asciz "int"
|
||||
.byte 0
|
||||
.section .debug_abbrev,"",%progbits
|
||||
.Ldebug_abbrev0:
|
||||
@@ -88,24 +88,24 @@ x:
|
||||
.byte 0
|
||||
.byte 0
|
||||
.section .debug_aranges,"",%progbits
|
||||
- .long 0x14
|
||||
+ .4byte 0x14
|
||||
.2byte 0x2
|
||||
- .long .Ldebug_info0
|
||||
+ .4byte .Ldebug_info0
|
||||
.byte 0x4
|
||||
.byte 0
|
||||
.2byte 0
|
||||
.2byte 0
|
||||
- .long 0
|
||||
- .long 0
|
||||
+ .4byte 0
|
||||
+ .4byte 0
|
||||
.section .debug_line,"",%progbits
|
||||
.Ldebug_line0:
|
||||
.section .debug_str,"MS",%progbits,1
|
||||
.LASF2:
|
||||
- .string "GNU C17 11.2.1 -g"
|
||||
+ .asciz "GNU C17 11.2.1 -g"
|
||||
.section .debug_line_str,"MS",%progbits,1
|
||||
.LASF1:
|
||||
- .string "/example"
|
||||
+ .asciz "/example"
|
||||
.LASF0:
|
||||
- .string "test.c"
|
||||
+ .asciz "test.c"
|
||||
.ident "GCC: (GNU) 11.2.1"
|
||||
.section .note.GNU-stack,"",%progbits
|
||||
diff -rup binutils.orig/gas/dwarf2dbg.c binutils-2.35.2/gas/dwarf2dbg.c
|
||||
--- binutils.orig/gas/dwarf2dbg.c 2021-11-08 14:59:19.759524743 +0000
|
||||
+++ binutils-2.35.2/gas/dwarf2dbg.c 2021-11-08 15:00:55.179909708 +0000
|
||||
@@ -588,6 +588,7 @@ get_basename (const char * pathname)
|
||||
|
||||
static unsigned int
|
||||
get_directory_table_entry (const char * dirname,
|
||||
+ const char * file0_dirname,
|
||||
size_t dirlen,
|
||||
bfd_boolean can_use_zero)
|
||||
{
|
||||
@@ -617,7 +618,7 @@ get_directory_table_entry (const char *
|
||||
{
|
||||
if (dirs == NULL || dirs[0] == NULL)
|
||||
{
|
||||
- const char * pwd = getpwd ();
|
||||
+ const char * pwd = file0_dirname ? file0_dirname : getpwd ();
|
||||
|
||||
if (dwarf_level >= 5 && strcmp (dirname, pwd) != 0)
|
||||
{
|
||||
@@ -626,7 +627,7 @@ get_directory_table_entry (const char *
|
||||
directory). Since we are about to create a directory entry that
|
||||
is not the same, allocate the current directory first.
|
||||
FIXME: Alternatively we could generate an error message here. */
|
||||
- (void) get_directory_table_entry (pwd, strlen (pwd), TRUE);
|
||||
+ (void) get_directory_table_entry (pwd, NULL, strlen (pwd), TRUE);
|
||||
d = 1;
|
||||
}
|
||||
else
|
||||
@@ -722,7 +723,7 @@ allocate_filenum (const char * pathname)
|
||||
file = get_basename (pathname);
|
||||
dir_len = file - pathname;
|
||||
|
||||
- dir = get_directory_table_entry (pathname, dir_len, FALSE);
|
||||
+ dir = get_directory_table_entry (pathname, NULL, dir_len, FALSE);
|
||||
|
||||
/* Do not use slot-0. That is specifically reserved for use by
|
||||
the '.file 0 "name"' directive. */
|
||||
@@ -762,6 +763,7 @@ allocate_filename_to_slot (const char *
|
||||
const char *file;
|
||||
size_t dirlen;
|
||||
unsigned int i, d;
|
||||
+ const char *file0_dirname = dirname;
|
||||
|
||||
/* Short circuit the common case of adding the same pathname
|
||||
as last time. */
|
||||
@@ -836,7 +838,8 @@ allocate_filename_to_slot (const char *
|
||||
file = filename;
|
||||
}
|
||||
|
||||
- d = get_directory_table_entry (dirname, dirlen, num == 0);
|
||||
+ d = get_directory_table_entry (dirname, file0_dirname, dirlen,
|
||||
+ num == 0);
|
||||
i = num;
|
||||
|
||||
if (! assign_file_to_slot (i, file, d))
|
||||
diff -rup binutils.orig/gas/testsuite/gas/elf/elf.exp binutils-2.35.2/gas/testsuite/gas/elf/elf.exp
|
||||
--- binutils.orig/gas/testsuite/gas/elf/elf.exp 2021-11-08 14:59:19.856524118 +0000
|
||||
+++ binutils-2.35.2/gas/testsuite/gas/elf/elf.exp 2021-11-08 14:59:36.225418609 +0000
|
||||
@@ -274,6 +274,7 @@ if { [is_elf_format] } then {
|
||||
run_dump_test "dwarf2-18" $dump_opts
|
||||
run_dump_test "dwarf2-19" $dump_opts
|
||||
run_dump_test "dwarf-5-file0" $dump_opts
|
||||
+ run_dump_test "dwarf-5-file0-2" $dump_opts
|
||||
run_dump_test "dwarf-5-dir0" $dump_opts
|
||||
run_dump_test "dwarf-4-cu" $dump_opts
|
||||
run_dump_test "dwarf-5-cu" $dump_opts
|
||||
|
||||
@ -0,0 +1,180 @@
|
||||
diff -rup binutils.orig/gold/gdb-index.cc binutils-2.34.0/gold/gdb-index.cc
|
||||
--- binutils.orig/gold/gdb-index.cc 2020-07-24 09:12:29.241306445 +0100
|
||||
+++ binutils-2.34.0/gold/gdb-index.cc 2020-07-24 09:15:48.332095898 +0100
|
||||
@@ -817,7 +817,7 @@ Gdb_index_info_reader::get_qualified_nam
|
||||
void
|
||||
Gdb_index_info_reader::record_cu_ranges(Dwarf_die* die)
|
||||
{
|
||||
- unsigned int shndx;
|
||||
+ unsigned int shndx = 0;
|
||||
unsigned int shndx2;
|
||||
|
||||
off_t ranges_offset = die->ref_attribute(elfcpp::DW_AT_ranges, &shndx);
|
||||
diff -rup binutils.orig/gold/layout.cc binutils-2.34.0/gold/layout.cc
|
||||
--- binutils.orig/gold/layout.cc 2020-07-24 09:12:29.243306433 +0100
|
||||
+++ binutils-2.34.0/gold/layout.cc 2020-07-24 09:15:11.464320064 +0100
|
||||
@@ -1986,7 +1986,7 @@ Layout::attach_allocated_section_to_segm
|
||||
seg_flags |= os->extra_segment_flags();
|
||||
|
||||
// Check for --section-start.
|
||||
- uint64_t addr;
|
||||
+ uint64_t addr = 0;
|
||||
bool is_address_set = parameters->options().section_start(os->name(), &addr);
|
||||
|
||||
// In general the only thing we really care about for PT_LOAD
|
||||
diff -rup binutils.orig/binutils/dlltool.c binutils-2.34.0/binutils/dlltool.c
|
||||
--- binutils.orig/binutils/dlltool.c 2020-07-24 09:12:28.974308069 +0100
|
||||
+++ binutils-2.34.0/binutils/dlltool.c 2020-07-24 12:09:37.527121295 +0100
|
||||
@@ -1305,7 +1305,7 @@ run (const char *what, char *args)
|
||||
int pid, wait_status;
|
||||
int i;
|
||||
const char **argv;
|
||||
- char *errmsg_fmt, *errmsg_arg;
|
||||
+ char *errmsg_fmt = "", *errmsg_arg = "";
|
||||
char *temp_base = choose_temp_base ();
|
||||
|
||||
inform (_("run: %s %s"), what, args);
|
||||
diff -rup binutils.orig/gas/config/tc-arm.c binutils-2.34.0/gas/config/tc-arm.c
|
||||
--- binutils.orig/gas/config/tc-arm.c 2020-07-24 09:12:32.368287432 +0100
|
||||
+++ binutils-2.34.0/gas/config/tc-arm.c 2020-07-24 12:14:19.842360634 +0100
|
||||
@@ -28416,9 +28416,12 @@ md_apply_fix (fixS * fixP,
|
||||
perform relaxation. */
|
||||
if (value == -2)
|
||||
{
|
||||
- newval = md_chars_to_number (buf, THUMB_SIZE);
|
||||
- newval = 0xbf00; /* NOP encoding T1 */
|
||||
- md_number_to_chars (buf, newval, THUMB_SIZE);
|
||||
+ if (fixP->fx_done || !seg->use_rela_p)
|
||||
+ {
|
||||
+ newval = md_chars_to_number (buf, THUMB_SIZE);
|
||||
+ newval = 0xbf00; /* NOP encoding T1 */
|
||||
+ md_number_to_chars (buf, newval, THUMB_SIZE);
|
||||
+ }
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -28631,17 +28634,14 @@ md_apply_fix (fixS * fixP,
|
||||
case BFD_RELOC_ARM_GOTFUNCDESC:
|
||||
case BFD_RELOC_ARM_GOTOFFFUNCDESC:
|
||||
case BFD_RELOC_ARM_FUNCDESC:
|
||||
- if (arm_fdpic)
|
||||
- {
|
||||
- if (fixP->fx_done || !seg->use_rela_p)
|
||||
- md_number_to_chars (buf, 0, 4);
|
||||
- }
|
||||
- else
|
||||
+ if (!arm_fdpic)
|
||||
{
|
||||
as_bad_where (fixP->fx_file, fixP->fx_line,
|
||||
_("Relocation supported only in FDPIC mode"));
|
||||
- }
|
||||
- break;
|
||||
+ break;
|
||||
+ }
|
||||
+ value = 0;
|
||||
+ /* Fall through. */
|
||||
#endif
|
||||
|
||||
case BFD_RELOC_RVA:
|
||||
diff -rup binutils.orig/gas/config/tc-arm.c binutils-2.34.0/gas/config/tc-arm.c
|
||||
--- binutils.orig/gas/config/tc-arm.c 2020-07-24 12:16:02.099719884 +0100
|
||||
+++ binutils-2.34.0/gas/config/tc-arm.c 2020-07-24 12:34:17.690858328 +0100
|
||||
@@ -28641,7 +28641,7 @@ md_apply_fix (fixS * fixP,
|
||||
break;
|
||||
}
|
||||
value = 0;
|
||||
- /* Fall through. */
|
||||
+ goto fred;
|
||||
#endif
|
||||
|
||||
case BFD_RELOC_RVA:
|
||||
@@ -28653,6 +28653,7 @@ md_apply_fix (fixS * fixP,
|
||||
#ifdef TE_PE
|
||||
case BFD_RELOC_32_SECREL:
|
||||
#endif
|
||||
+ fred:
|
||||
if (fixP->fx_done || !seg->use_rela_p)
|
||||
#ifdef TE_WINCE
|
||||
/* For WinCE we only do this for pcrel fixups. */
|
||||
diff -rup binutils.orig/gas/config/tc-arm.c binutils-2.34.0/gas/config/tc-arm.c
|
||||
--- binutils.orig/gas/config/tc-arm.c 2020-07-24 13:28:26.926553452 +0100
|
||||
+++ binutils-2.34.0/gas/config/tc-arm.c 2020-07-24 13:31:57.835215763 +0100
|
||||
@@ -28416,12 +28416,8 @@ md_apply_fix (fixS * fixP,
|
||||
perform relaxation. */
|
||||
if (value == -2)
|
||||
{
|
||||
- if (fixP->fx_done || !seg->use_rela_p)
|
||||
- {
|
||||
- newval = md_chars_to_number (buf, THUMB_SIZE);
|
||||
- newval = 0xbf00; /* NOP encoding T1 */
|
||||
- md_number_to_chars (buf, newval, THUMB_SIZE);
|
||||
- }
|
||||
+ newval = 0xbf00; /* NOP encoding T1 */
|
||||
+ goto jim;
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -28432,6 +28428,7 @@ md_apply_fix (fixS * fixP,
|
||||
{
|
||||
newval = md_chars_to_number (buf, THUMB_SIZE);
|
||||
newval |= ((value & 0x3e) << 2) | ((value & 0x40) << 3);
|
||||
+ jim:
|
||||
md_number_to_chars (buf, newval, THUMB_SIZE);
|
||||
}
|
||||
}
|
||||
diff -rup binutils.orig/binutils/mclex.c binutils-2.34.0/binutils/mclex.c
|
||||
--- binutils.orig/binutils/mclex.c 2020-07-24 13:28:26.297557441 +0100
|
||||
+++ binutils-2.34.0/binutils/mclex.c 2020-07-24 14:46:53.587940149 +0100
|
||||
@@ -207,7 +207,7 @@ enum_severity (int e)
|
||||
static void
|
||||
mc_add_keyword_ascii (const char *sz, int rid, const char *grp, rc_uint_type nv, const char *sv)
|
||||
{
|
||||
- unichar *usz, *usv = NULL;
|
||||
+ unichar *usz = NULL, *usv = NULL;
|
||||
rc_uint_type usz_len;
|
||||
|
||||
unicode_from_codepage (&usz_len, &usz, sz, CP_ACP);
|
||||
diff -rup binutils.orig/binutils/windmc.c binutils-2.34.0/binutils/windmc.c
|
||||
--- binutils.orig/binutils/windmc.c 2020-07-24 13:28:26.279557556 +0100
|
||||
+++ binutils-2.34.0/binutils/windmc.c 2020-07-24 14:48:05.460477478 +0100
|
||||
@@ -338,7 +338,7 @@ mc_add_node_lang (mc_node *root, const m
|
||||
static char *
|
||||
convert_unicode_to_ACP (const unichar *usz)
|
||||
{
|
||||
- char *s;
|
||||
+ char *s = NULL;
|
||||
rc_uint_type l;
|
||||
|
||||
if (! usz)
|
||||
@@ -607,10 +607,10 @@ mc_generate_bin_item (mc_node_lang *n, r
|
||||
else
|
||||
{
|
||||
rc_uint_type txt_len, l;
|
||||
- char *cvt_txt;
|
||||
+ char *cvt_txt = NULL;
|
||||
|
||||
codepage_from_unicode( &l, n->message, &cvt_txt, n->lang->lang_info.wincp);
|
||||
- if (! cvt_txt)
|
||||
+ if (cvt_txt == NULL)
|
||||
fatal ("Failed to convert message to language codepage.\n");
|
||||
txt_len = strlen (cvt_txt);
|
||||
if (mcset_automatic_null_termination && txt_len > 0)
|
||||
@@ -1107,7 +1107,7 @@ main (int argc, char **argv)
|
||||
|
||||
/* Load the input file and do code page transformations to UTF16. */
|
||||
{
|
||||
- unichar *u;
|
||||
+ unichar *u = NULL;
|
||||
rc_uint_type ul;
|
||||
char *buff;
|
||||
bfd_size_type flen;
|
||||
--- binutils.orig/binutils/srconv.c 2020-07-24 15:37:25.847459208 +0100
|
||||
+++ binutils-2.34.0/binutils/srconv.c 2020-07-24 15:39:12.853773423 +0100
|
||||
@@ -316,6 +316,7 @@ wr_hd (struct coff_ofile *p)
|
||||
struct IT_hd hd;
|
||||
|
||||
hd.spare1 = 0;
|
||||
+ hd.spare2 = 0;
|
||||
if (bfd_get_file_flags (abfd) & EXEC_P)
|
||||
hd.mt = MTYPE_ABS_LM;
|
||||
else
|
||||
@ -0,0 +1,75 @@
|
||||
diff -rup binutils.orig/bfd/elf.c binutils-2.35.2/bfd/elf.c
|
||||
--- binutils.orig/bfd/elf.c 2024-06-20 16:18:11.685058701 +0100
|
||||
+++ binutils-2.35.2/bfd/elf.c 2024-06-20 16:19:59.040433524 +0100
|
||||
@@ -1090,6 +1090,7 @@ _bfd_elf_make_section_from_shdr (bfd *ab
|
||||
if (name [0] == '.')
|
||||
{
|
||||
if (strncmp (name, ".debug", 6) == 0
|
||||
+ || strncmp (name, ".gnu.debuglto_.debug_", 21) == 0
|
||||
|| strncmp (name, ".gnu.linkonce.wi.", 17) == 0
|
||||
|| strncmp (name, ".zdebug", 7) == 0)
|
||||
flags |= SEC_DEBUGGING | SEC_ELF_OCTETS;
|
||||
diff -rup binutils.orig/ld/ldlang.c binutils-2.35.2/ld/ldlang.c
|
||||
--- binutils.orig/ld/ldlang.c 2024-06-20 16:18:11.518058118 +0100
|
||||
+++ binutils-2.35.2/ld/ldlang.c 2024-06-20 16:21:50.407756115 +0100
|
||||
@@ -7471,7 +7471,7 @@ lang_gc_sections (void)
|
||||
lang_gc_sections_1 (statement_list.head);
|
||||
|
||||
/* SEC_EXCLUDE is ignored when doing a relocatable link, except in
|
||||
- the special case of debug info. (See bfd/stabs.c)
|
||||
+ the special case of .stabstr debug info. (See bfd/stabs.c)
|
||||
Twiddle the flag here, to simplify later linker code. */
|
||||
if (bfd_link_relocatable (&link_info))
|
||||
{
|
||||
@@ -7483,7 +7483,8 @@ lang_gc_sections (void)
|
||||
continue;
|
||||
#endif
|
||||
for (sec = f->the_bfd->sections; sec != NULL; sec = sec->next)
|
||||
- if ((sec->flags & SEC_DEBUGGING) == 0)
|
||||
+ if ((sec->flags & SEC_DEBUGGING) == 0
|
||||
+ || strcmp (sec->name, ".stabstr") != 0)
|
||||
sec->flags &= ~SEC_EXCLUDE;
|
||||
}
|
||||
}
|
||||
diff -rupN binutils.orig/ld/testsuite/ld-elf/pr27590.s binutils-2.35.2/ld/testsuite/ld-elf/pr27590.s
|
||||
--- binutils.orig/ld/testsuite/ld-elf/pr27590.s 1970-01-01 01:00:00.000000000 +0100
|
||||
+++ binutils-2.35.2/ld/testsuite/ld-elf/pr27590.s 2024-06-20 16:51:39.108295959 +0100
|
||||
@@ -0,0 +1,6 @@
|
||||
+ .section .gnu.debuglto_.debug_macro,"",%progbits
|
||||
+.Ldebug_macro0:
|
||||
+ .dc.a .Ldebug_macro2
|
||||
+ .section .gnu.debuglto_.debug_macro,"G",%progbits,wm4,comdat
|
||||
+.Ldebug_macro2:
|
||||
+ .long 0x4
|
||||
diff -rupN binutils.orig/ld/testsuite/ld-elf/pr27590a.d binutils-2.35.2/ld/testsuite/ld-elf/pr27590a.d
|
||||
--- binutils.orig/ld/testsuite/ld-elf/pr27590a.d 1970-01-01 01:00:00.000000000 +0100
|
||||
+++ binutils-2.35.2/ld/testsuite/ld-elf/pr27590a.d 2024-06-20 16:51:39.111295967 +0100
|
||||
@@ -0,0 +1,12 @@
|
||||
+#source: pr27590.s
|
||||
+#ld: -r tmpdir/pr27590.o
|
||||
+#readelf: -rW
|
||||
+#xfail: [is_generic]
|
||||
+
|
||||
+Relocation section '\.rel.*\.gnu\.debuglto_\.debug_macro' at offset 0x[0-9a-z]+ contains 2 entries:
|
||||
+[ \t]+Offset[ \t]+Info[ \t]+Type[ \t]+Sym.*
|
||||
+[0-9a-f]+[ \t]+[0-9a-f]+[ \t]+R_.*[ \t]+[0]+[ \t]+(\.gnu\.debuglto_\.debug_macro|\.Ldebug_macro2).*
|
||||
+#?.*R_MIPS_NONE.*
|
||||
+#?.*R_MIPS_NONE.*
|
||||
+[0-9a-f]+[ \t]+[0-9a-f]+[ \t]+R_.*[ \t]+[0]+[ \t]+(\.gnu\.debuglto_\.debug_macro|\.Ldebug_macro2).*
|
||||
+#pass
|
||||
diff -rupN binutils.orig/ld/testsuite/ld-elf/pr27590b.d binutils-2.35.2/ld/testsuite/ld-elf/pr27590b.d
|
||||
--- binutils.orig/ld/testsuite/ld-elf/pr27590b.d 1970-01-01 01:00:00.000000000 +0100
|
||||
+++ binutils-2.35.2/ld/testsuite/ld-elf/pr27590b.d 2024-06-20 16:51:39.111295967 +0100
|
||||
@@ -0,0 +1,12 @@
|
||||
+#source: pr27590.s
|
||||
+#ld: -r tmpdir/pr27590.o --reduce-memory-overheads
|
||||
+#readelf: -rW
|
||||
+#xfail: [is_generic]
|
||||
+
|
||||
+Relocation section '\.rel.*\.gnu\.debuglto_\.debug_macro' at offset 0x[0-9a-z]+ contains 2 entries:
|
||||
+[ \t]+Offset[ \t]+Info[ \t]+Type[ \t]+Sym.*
|
||||
+[0-9a-f]+[ \t]+[0-9a-f]+[ \t]+R_.*[ \t]+[0]+[ \t]+(\.gnu\.debuglto_\.debug_macro|\.Ldebug_macro2).*
|
||||
+#?.*R_MIPS_NONE.*
|
||||
+#?.*R_MIPS_NONE.*
|
||||
+[0-9a-f]+[ \t]+[0-9a-f]+[ \t]+R_.*[ \t]+[0]+[ \t]+(\.gnu\.debuglto_\.debug_macro|\.Ldebug_macro2).*
|
||||
+#pass
|
||||
@ -1,11 +0,0 @@
|
||||
--- binutils.orig/gold/dwp.cc 2023-05-02 13:26:44.075148082 +0100
|
||||
+++ binutils-2.40/gold/dwp.cc 2023-05-02 13:27:16.189130127 +0100
|
||||
@@ -2418,6 +2418,8 @@ main(int argc, char** argv)
|
||||
{
|
||||
Dwo_file exe_file(exe_filename);
|
||||
exe_file.read_executable(&files);
|
||||
+ if (files.empty())
|
||||
+ gold_fatal(_("Could not find any dwo links in specified EXE"));
|
||||
}
|
||||
|
||||
// Add any additional files listed on command line.
|
||||
@ -0,0 +1,181 @@
|
||||
diff -rup binutils.orig/gold/testsuite/gnu_property_a.S binutils-2.35/gold/testsuite/gnu_property_a.S
|
||||
--- binutils.orig/gold/testsuite/gnu_property_a.S 2021-01-18 14:01:41.228809868 +0000
|
||||
+++ binutils-2.35/gold/testsuite/gnu_property_a.S 2021-01-18 14:01:52.542736705 +0000
|
||||
@@ -1,8 +1,8 @@
|
||||
#define NT_GNU_PROPERTY_TYPE_0 5
|
||||
|
||||
#define GNU_PROPERTY_STACK_SIZE 1
|
||||
-#define GNU_PROPERTY_X86_ISA_1_USED 0xc0000000
|
||||
-#define GNU_PROPERTY_X86_ISA_1_NEEDED 0xc0000001
|
||||
+#define GNU_PROPERTY_X86_ISA_1_USED 0xc0010002
|
||||
+#define GNU_PROPERTY_X86_ISA_1_NEEDED 0xc0008002
|
||||
#define GNU_PROPERTY_X86_FEATURE_1_AND 0xc0000002
|
||||
|
||||
#if __SIZEOF_PTRDIFF_T__ == 8
|
||||
diff -rup binutils.orig/gold/testsuite/gnu_property_b.S binutils-2.35/gold/testsuite/gnu_property_b.S
|
||||
--- binutils.orig/gold/testsuite/gnu_property_b.S 2021-01-18 14:01:41.233809836 +0000
|
||||
+++ binutils-2.35/gold/testsuite/gnu_property_b.S 2021-01-18 14:01:52.542736705 +0000
|
||||
@@ -2,8 +2,8 @@
|
||||
|
||||
#define GNU_PROPERTY_STACK_SIZE 1
|
||||
#define GNU_PROPERTY_NO_COPY_ON_PROTECTED 2
|
||||
-#define GNU_PROPERTY_X86_ISA_1_USED 0xc0000000
|
||||
-#define GNU_PROPERTY_X86_ISA_1_NEEDED 0xc0000001
|
||||
+#define GNU_PROPERTY_X86_ISA_1_USED 0xc0010002
|
||||
+#define GNU_PROPERTY_X86_ISA_1_NEEDED 0xc0008002
|
||||
#define GNU_PROPERTY_X86_FEATURE_1_AND 0xc0000002
|
||||
|
||||
#if __SIZEOF_PTRDIFF_T__ == 8
|
||||
diff -rup binutils.orig/gold/testsuite/gnu_property_c.S binutils-2.35/gold/testsuite/gnu_property_c.S
|
||||
--- binutils.orig/gold/testsuite/gnu_property_c.S 2021-01-18 14:01:41.232809843 +0000
|
||||
+++ binutils-2.35/gold/testsuite/gnu_property_c.S 2021-01-18 14:01:52.542736705 +0000
|
||||
@@ -2,8 +2,8 @@
|
||||
|
||||
#define GNU_PROPERTY_STACK_SIZE 1
|
||||
#define GNU_PROPERTY_NO_COPY_ON_PROTECTED 2
|
||||
-#define GNU_PROPERTY_X86_ISA_1_USED 0xc0000000
|
||||
-#define GNU_PROPERTY_X86_ISA_1_NEEDED 0xc0000001
|
||||
+#define GNU_PROPERTY_X86_ISA_1_USED 0xc0010002
|
||||
+#define GNU_PROPERTY_X86_ISA_1_NEEDED 0xc0008002
|
||||
#define GNU_PROPERTY_X86_FEATURE_1_AND 0xc0000002
|
||||
|
||||
#if __SIZEOF_PTRDIFF_T__ == 8
|
||||
diff -rup binutils.orig/gold/testsuite/gnu_property_test.sh binutils-2.35/gold/testsuite/gnu_property_test.sh
|
||||
--- binutils.orig/gold/testsuite/gnu_property_test.sh 2021-01-18 14:01:41.236809817 +0000
|
||||
+++ binutils-2.35/gold/testsuite/gnu_property_test.sh 2021-01-18 14:01:52.543736699 +0000
|
||||
@@ -57,8 +57,8 @@ check_count gnu_property_test.stdout "GN
|
||||
|
||||
check gnu_property_test.stdout "stack size: 0x111100"
|
||||
check gnu_property_test.stdout "no copy on protected"
|
||||
-check gnu_property_test.stdout "x86 ISA used: i486, SSE2, SSE4_2, AVX512CD"
|
||||
-check gnu_property_test.stdout "x86 ISA needed: i486, SSE2, SSE4_2, AVX512CD"
|
||||
+check gnu_property_test.stdout "x86 ISA used: x86-64-v2, <unknown: 10>, <unknown: 100>, <unknown: 1000>"
|
||||
+check gnu_property_test.stdout "x86 ISA needed: x86-64-v2, <unknown: 10>, <unknown: 100>, <unknown: 1000>"
|
||||
check gnu_property_test.stdout "x86 feature: IBT"
|
||||
|
||||
exit 0
|
||||
diff -rup binutils.orig/gold/x86_64.cc binutils-2.35/gold/x86_64.cc
|
||||
--- binutils.orig/gold/x86_64.cc 2021-01-18 14:01:41.225809888 +0000
|
||||
+++ binutils-2.35/gold/x86_64.cc 2021-01-18 14:01:52.543736699 +0000
|
||||
@@ -706,8 +706,9 @@ class Target_x86_64 : public Sized_targe
|
||||
rela_irelative_(NULL), copy_relocs_(elfcpp::R_X86_64_COPY),
|
||||
got_mod_index_offset_(-1U), tlsdesc_reloc_info_(),
|
||||
tls_base_symbol_defined_(false), isa_1_used_(0), isa_1_needed_(0),
|
||||
- feature_1_(0), object_isa_1_used_(0), object_feature_1_(0),
|
||||
- seen_first_object_(false)
|
||||
+ feature_1_(0), feature_2_used_(0), feature_2_needed_(0),
|
||||
+ object_isa_1_used_(0), object_feature_1_(0),
|
||||
+ object_feature_2_used_(0), seen_first_object_(false)
|
||||
{ }
|
||||
|
||||
// Hook for a new output section.
|
||||
@@ -1382,6 +1383,8 @@ class Target_x86_64 : public Sized_targe
|
||||
uint32_t isa_1_used_;
|
||||
uint32_t isa_1_needed_;
|
||||
uint32_t feature_1_;
|
||||
+ uint32_t feature_2_used_;
|
||||
+ uint32_t feature_2_needed_;
|
||||
// Target-specific properties from the current object.
|
||||
// These bits get ORed into ISA_1_USED_ after all properties for the object
|
||||
// have been processed. But if either is all zeroes (as when the property
|
||||
@@ -1391,6 +1394,7 @@ class Target_x86_64 : public Sized_targe
|
||||
// These bits get ANDed into FEATURE_1_ after all properties for the object
|
||||
// have been processed.
|
||||
uint32_t object_feature_1_;
|
||||
+ uint32_t object_feature_2_used_;
|
||||
// Whether we have seen our first object, for use in initializing FEATURE_1_.
|
||||
bool seen_first_object_;
|
||||
};
|
||||
@@ -1594,9 +1598,15 @@ Target_x86_64<size>::record_gnu_property
|
||||
|
||||
switch (pr_type)
|
||||
{
|
||||
+ case elfcpp::GNU_PROPERTY_X86_COMPAT_ISA_1_USED:
|
||||
+ case elfcpp::GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED:
|
||||
+ case elfcpp::GNU_PROPERTY_X86_COMPAT_2_ISA_1_USED:
|
||||
+ case elfcpp::GNU_PROPERTY_X86_COMPAT_2_ISA_1_NEEDED:
|
||||
case elfcpp::GNU_PROPERTY_X86_ISA_1_USED:
|
||||
case elfcpp::GNU_PROPERTY_X86_ISA_1_NEEDED:
|
||||
case elfcpp::GNU_PROPERTY_X86_FEATURE_1_AND:
|
||||
+ case elfcpp::GNU_PROPERTY_X86_FEATURE_2_USED:
|
||||
+ case elfcpp::GNU_PROPERTY_X86_FEATURE_2_NEEDED:
|
||||
if (pr_datasz != 4)
|
||||
{
|
||||
gold_warning(_("%s: corrupt .note.gnu.property section "
|
||||
@@ -1625,6 +1635,12 @@ Target_x86_64<size>::record_gnu_property
|
||||
// If we see multiple feature props in one object, OR them together.
|
||||
this->object_feature_1_ |= val;
|
||||
break;
|
||||
+ case elfcpp::GNU_PROPERTY_X86_FEATURE_2_USED:
|
||||
+ this->object_feature_2_used_ |= val;
|
||||
+ break;
|
||||
+ case elfcpp::GNU_PROPERTY_X86_FEATURE_2_NEEDED:
|
||||
+ this->feature_2_needed_ |= val;
|
||||
+ break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1642,15 +1658,23 @@ Target_x86_64<size>::merge_gnu_propertie
|
||||
else if (this->isa_1_used_ != 0)
|
||||
this->isa_1_used_ |= this->object_isa_1_used_;
|
||||
this->feature_1_ &= this->object_feature_1_;
|
||||
+ // If any object is missing the FEATURE_2_USED property, we must
|
||||
+ // omit it from the output file.
|
||||
+ if (this->object_feature_2_used_ == 0)
|
||||
+ this->feature_2_used_ = 0;
|
||||
+ else if (this->feature_2_used_ != 0)
|
||||
+ this->feature_2_used_ |= this->object_feature_2_used_;
|
||||
}
|
||||
else
|
||||
{
|
||||
this->isa_1_used_ = this->object_isa_1_used_;
|
||||
this->feature_1_ = this->object_feature_1_;
|
||||
+ this->feature_2_used_ = this->object_feature_2_used_;
|
||||
this->seen_first_object_ = true;
|
||||
}
|
||||
this->object_isa_1_used_ = 0;
|
||||
this->object_feature_1_ = 0;
|
||||
+ this->object_feature_2_used_ = 0;
|
||||
}
|
||||
|
||||
static inline void
|
||||
@@ -1676,6 +1700,12 @@ Target_x86_64<size>::do_finalize_gnu_pro
|
||||
if (this->feature_1_ != 0)
|
||||
add_property(layout, elfcpp::GNU_PROPERTY_X86_FEATURE_1_AND,
|
||||
this->feature_1_);
|
||||
+ if (this->feature_2_used_ != 0)
|
||||
+ add_property(layout, elfcpp::GNU_PROPERTY_X86_FEATURE_2_USED,
|
||||
+ this->feature_2_used_);
|
||||
+ if (this->feature_2_needed_ != 0)
|
||||
+ add_property(layout, elfcpp::GNU_PROPERTY_X86_FEATURE_2_NEEDED,
|
||||
+ this->feature_2_needed_);
|
||||
}
|
||||
|
||||
// Write the first three reserved words of the .got.plt section.
|
||||
--- binutils.orig/elfcpp/elfcpp.h 2021-01-18 14:01:40.778812778 +0000
|
||||
+++ binutils-2.35/elfcpp/elfcpp.h 2021-01-18 14:50:05.144035077 +0000
|
||||
@@ -1009,9 +1009,21 @@ enum
|
||||
GNU_PROPERTY_STACK_SIZE = 1,
|
||||
GNU_PROPERTY_NO_COPY_ON_PROTECTED = 2,
|
||||
GNU_PROPERTY_LOPROC = 0xc0000000,
|
||||
- GNU_PROPERTY_X86_ISA_1_USED = 0xc0000000,
|
||||
- GNU_PROPERTY_X86_ISA_1_NEEDED = 0xc0000001,
|
||||
- GNU_PROPERTY_X86_FEATURE_1_AND = 0xc0000002,
|
||||
+ GNU_PROPERTY_X86_COMPAT_ISA_1_USED = 0xc0000000,
|
||||
+ GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED = 0xc0000001,
|
||||
+ GNU_PROPERTY_X86_UINT32_AND_LO = 0xc0000002,
|
||||
+ GNU_PROPERTY_X86_UINT32_AND_HI = 0xc0007fff,
|
||||
+ GNU_PROPERTY_X86_UINT32_OR_LO = 0xc0008000,
|
||||
+ GNU_PROPERTY_X86_UINT32_OR_HI = 0xc000ffff,
|
||||
+ GNU_PROPERTY_X86_UINT32_OR_AND_LO = 0xc0010000,
|
||||
+ GNU_PROPERTY_X86_UINT32_OR_AND_HI = 0xc0017fff,
|
||||
+ GNU_PROPERTY_X86_COMPAT_2_ISA_1_NEEDED = GNU_PROPERTY_X86_UINT32_OR_LO + 0,
|
||||
+ GNU_PROPERTY_X86_COMPAT_2_ISA_1_USED = GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0,
|
||||
+ GNU_PROPERTY_X86_FEATURE_1_AND = GNU_PROPERTY_X86_UINT32_AND_LO + 0,
|
||||
+ GNU_PROPERTY_X86_ISA_1_NEEDED = GNU_PROPERTY_X86_UINT32_OR_LO + 2,
|
||||
+ GNU_PROPERTY_X86_FEATURE_2_NEEDED = GNU_PROPERTY_X86_UINT32_OR_LO + 1,
|
||||
+ GNU_PROPERTY_X86_ISA_1_USED = GNU_PROPERTY_X86_UINT32_OR_AND_LO + 2,
|
||||
+ GNU_PROPERTY_X86_FEATURE_2_USED = GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1,
|
||||
GNU_PROPERTY_HIPROC = 0xdfffffff,
|
||||
GNU_PROPERTY_LOUSER = 0xe0000000,
|
||||
GNU_PROPERTY_HIUSER = 0xffffffff
|
||||
@ -1,16 +0,0 @@
|
||||
diff -rup binutils.orig/gold/options.h binutils-2.41/gold/options.h
|
||||
--- binutils.orig/gold/options.h 2024-01-04 09:52:09.282002253 +0000
|
||||
+++ binutils-2.41/gold/options.h 2024-01-04 09:52:51.890972630 +0000
|
||||
@@ -855,6 +855,12 @@ class General_options
|
||||
N_("(ARM only) Do not warn about objects with incompatible "
|
||||
"enum sizes"));
|
||||
|
||||
+ DEFINE_bool_ignore(error_execstack, options::TWO_DASHES, '\0',
|
||||
+ N_("Ignored"), N_("Ignored"));
|
||||
+
|
||||
+ DEFINE_bool_ignore(error_rwx_segments, options::TWO_DASHES, '\0',
|
||||
+ N_("Ignored"), N_("Ignored"));
|
||||
+
|
||||
DEFINE_special(exclude_libs, options::TWO_DASHES, '\0',
|
||||
N_("Exclude libraries from automatic export"),
|
||||
N_(("lib,lib ...")));
|
||||
@ -1,27 +0,0 @@
|
||||
diff --git a/gold/options.cc b/gold/options.cc
|
||||
index c9834b66159..91d7802fffe 100644
|
||||
--- a/gold/options.cc
|
||||
+++ b/gold/options.cc
|
||||
@@ -989,7 +989,7 @@ parse_short_option(int argc, const char** argv, int pos_in_argv_i,
|
||||
}
|
||||
|
||||
// If we're a -z option, we need to parse our argument as a
|
||||
- // long-option, e.g. "-z stacksize=8192".
|
||||
+ // long-option, e.g. "-z stack-size=8192".
|
||||
if (retval == &dash_z)
|
||||
{
|
||||
int dummy_i = 0;
|
||||
diff --git a/gold/options.h b/gold/options.h
|
||||
index 46f658f23ea..d16e38066da 100644
|
||||
--- a/gold/options.h
|
||||
+++ b/gold/options.h
|
||||
@@ -1110,6 +1110,9 @@ class General_options
|
||||
N_("Generate package metadata note"),
|
||||
N_("[=JSON]"));
|
||||
|
||||
+ DEFINE_bool_ignore(pack_relative_relocs, options::DASH_Z, '\0',
|
||||
+ N_("Ignored"), N_("Ignored"));
|
||||
+
|
||||
DEFINE_bool(pie, options::ONE_DASH, '\0', false,
|
||||
N_("Create a position independent executable"),
|
||||
N_("Do not create a position independent executable"));
|
||||
@ -1,71 +0,0 @@
|
||||
diff -rup binutils.orig/gold/powerpc.cc binutils-2.41/gold/powerpc.cc
|
||||
--- binutils.orig/gold/powerpc.cc 2023-08-25 11:21:08.882071604 +0100
|
||||
+++ binutils-2.41/gold/powerpc.cc 2023-08-25 11:21:26.050081034 +0100
|
||||
@@ -3714,12 +3714,7 @@ Target_powerpc<size, big_endian>::do_rel
|
||||
unsigned int prev_brlt_size = 0;
|
||||
if (pass == 1)
|
||||
{
|
||||
- bool thread_safe
|
||||
- = this->abiversion() < 2 && parameters->options().plt_thread_safe();
|
||||
- if (size == 64
|
||||
- && this->abiversion() < 2
|
||||
- && !thread_safe
|
||||
- && !parameters->options().user_set_plt_thread_safe())
|
||||
+ if (size == 64 && this->abiversion() < 2)
|
||||
{
|
||||
static const char* const thread_starter[] =
|
||||
{
|
||||
@@ -3747,29 +3742,37 @@ Target_powerpc<size, big_endian>::do_rel
|
||||
/* libgo */
|
||||
"__go_go",
|
||||
};
|
||||
+ bool thread_safe = parameters->options().plt_thread_safe();
|
||||
|
||||
- if (parameters->options().shared())
|
||||
- thread_safe = true;
|
||||
- else
|
||||
+ if (!thread_safe
|
||||
+ && !parameters->options().user_set_plt_thread_safe())
|
||||
{
|
||||
- for (unsigned int i = 0;
|
||||
- i < sizeof(thread_starter) / sizeof(thread_starter[0]);
|
||||
- i++)
|
||||
+ if (parameters->options().shared())
|
||||
+ thread_safe = true;
|
||||
+ else
|
||||
{
|
||||
- Symbol* sym = symtab->lookup(thread_starter[i], NULL);
|
||||
- thread_safe = (sym != NULL
|
||||
- && sym->in_reg()
|
||||
- && sym->in_real_elf());
|
||||
- if (thread_safe)
|
||||
- break;
|
||||
+ for (unsigned int i = 0;
|
||||
+ i < sizeof(thread_starter) / sizeof(thread_starter[0]);
|
||||
+ i++)
|
||||
+ {
|
||||
+ Symbol* sym = symtab->lookup(thread_starter[i], NULL);
|
||||
+ thread_safe = (sym != NULL
|
||||
+ && sym->in_reg()
|
||||
+ && sym->in_real_elf());
|
||||
+ if (thread_safe)
|
||||
+ break;
|
||||
+ }
|
||||
}
|
||||
}
|
||||
+ this->plt_thread_safe_ = thread_safe;
|
||||
}
|
||||
- this->plt_thread_safe_ = thread_safe;
|
||||
|
||||
- if (parameters->options().output_is_position_independent())
|
||||
- this->rela_dyn_size_
|
||||
- = this->rela_dyn_section(layout)->current_data_size();
|
||||
+ if (size == 64
|
||||
+ && parameters->options().output_is_position_independent())
|
||||
+ {
|
||||
+ gold_assert (this->rela_dyn_);
|
||||
+ this->rela_dyn_size_ = this->rela_dyn_->current_data_size();
|
||||
+ }
|
||||
|
||||
this->stub_group_size_ = parameters->options().stub_group_size();
|
||||
bool no_size_errors = true;
|
||||
@ -1,29 +0,0 @@
|
||||
--- binutils.orig/bfd/elf.c 2023-10-13 11:38:25.159530287 +0100
|
||||
+++ binutils-2.41/bfd/elf.c 2023-10-13 11:41:23.290898228 +0100
|
||||
@@ -9479,6 +9479,8 @@ _bfd_elf_slurp_version_tables (bfd *abfd
|
||||
if (elf_use_dt_symtab_p (abfd))
|
||||
iverneed->vn_filename
|
||||
= elf_tdata (abfd)->dt_strtab + iverneed->vn_file;
|
||||
+ else if (hdr == NULL)
|
||||
+ goto error_return_bad_verref;
|
||||
else
|
||||
iverneed->vn_filename
|
||||
= bfd_elf_string_from_elf_section (abfd, hdr->sh_link,
|
||||
@@ -9516,6 +9518,8 @@ _bfd_elf_slurp_version_tables (bfd *abfd
|
||||
if (elf_use_dt_symtab_p (abfd))
|
||||
ivernaux->vna_nodename
|
||||
= elf_tdata (abfd)->dt_strtab + ivernaux->vna_name;
|
||||
+ else if (hdr == NULL)
|
||||
+ goto error_return_bad_verref;
|
||||
else
|
||||
ivernaux->vna_nodename
|
||||
= bfd_elf_string_from_elf_section (abfd, hdr->sh_link,
|
||||
@@ -9546,7 +9550,7 @@ _bfd_elf_slurp_version_tables (bfd *abfd
|
||||
iverneed->vn_nextref = NULL;
|
||||
if (iverneed->vn_next == 0)
|
||||
break;
|
||||
- if (i + 1 < hdr->sh_info)
|
||||
+ if (hdr != NULL && (i + 1 < hdr->sh_info))
|
||||
iverneed->vn_nextref = iverneed + 1;
|
||||
|
||||
if (iverneed->vn_next
|
||||
@ -0,0 +1,17 @@
|
||||
|
||||
diff --git a/ld/testsuite/ld-plugin/lto.exp b/ld/testsuite/ld-plugin/lto.exp
|
||||
index 3c129760498..dbda6c4465d 100644
|
||||
--- a/ld/testsuite/ld-plugin/lto.exp
|
||||
+++ b/ld/testsuite/ld-plugin/lto.exp
|
||||
@@ -721,7 +721,7 @@ if { [at_least_gcc_version 4 7] } {
|
||||
] \
|
||||
]
|
||||
set exec_output [run_host_cmd "sh" \
|
||||
- "-c \"ulimit -n 16; \
|
||||
+ "-c \" \
|
||||
$ar -rc $plug_opt \
|
||||
tmpdir/libpr23460.a \
|
||||
tmpdir/pr23460a.o \
|
||||
--
|
||||
2.38.1
|
||||
|
||||
@ -0,0 +1,60 @@
|
||||
--- binutils.orig/ld/scripttempl/DWARF.sc 2021-02-01 10:29:33.596729908 +0000
|
||||
+++ binutils-2.35.1/ld/scripttempl/DWARF.sc 2021-02-01 10:30:00.454552083 +0000
|
||||
@@ -1,4 +1,4 @@
|
||||
-# Copyright (C) 2014-2020 Free Software Foundation, Inc.
|
||||
+# Copyright (C) 2014-2021 Free Software Foundation, Inc.
|
||||
#
|
||||
# Copying and distribution of this file, with or without modification,
|
||||
# are permitted in any medium without royalty provided the copyright
|
||||
@@ -9,19 +9,19 @@ cat <<EOF
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
|
||||
- /* DWARF 1 */
|
||||
+ /* DWARF 1. */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
|
||||
- /* GNU DWARF 1 extensions */
|
||||
+ /* GNU DWARF 1 extensions. */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
|
||||
- /* DWARF 1.1 and DWARF 2 */
|
||||
+ /* DWARF 1.1 and DWARF 2. */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
|
||||
- /* DWARF 2 */
|
||||
+ /* DWARF 2. */
|
||||
.debug_info 0 : { *(.debug_info${RELOCATING+ .gnu.linkonce.wi.*}) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line${RELOCATING+ .debug_line.* .debug_line_end}) }
|
||||
@@ -30,17 +30,23 @@ cat <<EOF
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
|
||||
- /* SGI/MIPS DWARF 2 extensions */
|
||||
+ /* SGI/MIPS DWARF 2 extensions. */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
|
||||
- /* DWARF 3 */
|
||||
+ /* DWARF 3. */
|
||||
.debug_pubtypes 0 : { *(.debug_pubtypes) }
|
||||
.debug_ranges 0 : { *(.debug_ranges) }
|
||||
|
||||
- /* DWARF Extension. */
|
||||
- .debug_macro 0 : { *(.debug_macro) }
|
||||
+ /* DWARF 5. */
|
||||
.debug_addr 0 : { *(.debug_addr) }
|
||||
+ .debug_line_str 0 : { *(.debug_line_str) }
|
||||
+ .debug_loclists 0 : { *(.debug_loclists) }
|
||||
+ .debug_macro 0 : { *(.debug_macro) }
|
||||
+ .debug_names 0 : { *(.debug_names) }
|
||||
+ .debug_rnglists 0 : { *(.debug_rnglists) }
|
||||
+ .debug_str_offsets 0 : { *(.debug_str_offsets) }
|
||||
+ .debug_sup 0 : { *(.debug_sup) }
|
||||
EOF
|
||||
@ -0,0 +1,59 @@
|
||||
diff -rup binutils.orig/bfd/elflink.c binutils-2.35.2/bfd/elflink.c
|
||||
--- binutils.orig/bfd/elflink.c 2022-11-28 16:10:23.919422266 +0000
|
||||
+++ binutils-2.35.2/bfd/elflink.c 2022-11-28 16:14:24.308499080 +0000
|
||||
@@ -1260,14 +1260,25 @@ _bfd_elf_merge_symbol (bfd *abfd,
|
||||
olddyn = (oldsec->symbol->flags & BSF_DYNAMIC) != 0;
|
||||
}
|
||||
|
||||
- /* Handle a case where plugin_notice won't be called and thus won't
|
||||
- set the non_ir_ref flags on the first pass over symbols. */
|
||||
if (oldbfd != NULL
|
||||
- && (oldbfd->flags & BFD_PLUGIN) != (abfd->flags & BFD_PLUGIN)
|
||||
- && newdyn != olddyn)
|
||||
+ && (oldbfd->flags & BFD_PLUGIN) != (abfd->flags & BFD_PLUGIN))
|
||||
{
|
||||
- h->root.non_ir_ref_dynamic = TRUE;
|
||||
- hi->root.non_ir_ref_dynamic = TRUE;
|
||||
+ if (newdyn != olddyn)
|
||||
+ {
|
||||
+ /* Handle a case where plugin_notice won't be called and thus
|
||||
+ won't set the non_ir_ref flags on the first pass over
|
||||
+ symbols. */
|
||||
+ h->root.non_ir_ref_dynamic = TRUE;
|
||||
+ hi->root.non_ir_ref_dynamic = TRUE;
|
||||
+ }
|
||||
+
|
||||
+ if ((oldbfd->flags & BFD_PLUGIN) != 0
|
||||
+ && hi->root.type == bfd_link_hash_indirect)
|
||||
+ {
|
||||
+ /* Change indirect symbol from IR to undefined. */
|
||||
+ hi->root.type = bfd_link_hash_undefined;
|
||||
+ hi->root.u.undef.abfd = oldbfd;
|
||||
+ }
|
||||
}
|
||||
|
||||
/* NEWDEF and OLDDEF indicate whether the new or old symbol,
|
||||
diff -rup binutils.orig/bfd/linker.c binutils-2.35.2/bfd/linker.c
|
||||
--- binutils.orig/bfd/linker.c 2022-11-28 16:10:23.822422639 +0000
|
||||
+++ binutils-2.35.2/bfd/linker.c 2022-11-28 16:13:28.709712603 +0000
|
||||
@@ -1672,7 +1672,7 @@ _bfd_generic_link_add_one_symbol (struct
|
||||
case MIND:
|
||||
/* Multiple indirect symbols. This is OK if they both point
|
||||
to the same symbol. */
|
||||
- if (strcmp (h->u.i.link->root.string, string) == 0)
|
||||
+ if (string != NULL && strcmp (h->u.i.link->root.string, string) == 0)
|
||||
break;
|
||||
/* Fall through. */
|
||||
case MDEF:
|
||||
--- binutils.orig/bfd/elflink.c 2023-01-10 15:47:50.062668055 +0000
|
||||
+++ binutils-2.35.2/bfd/elflink.c 2023-01-10 15:47:59.554659559 +0000
|
||||
@@ -1271,8 +1271,7 @@ _bfd_elf_merge_symbol (bfd *abfd,
|
||||
h->root.non_ir_ref_dynamic = TRUE;
|
||||
hi->root.non_ir_ref_dynamic = TRUE;
|
||||
}
|
||||
-
|
||||
- if ((oldbfd->flags & BFD_PLUGIN) != 0
|
||||
+ else if ((oldbfd->flags & BFD_PLUGIN) != 0
|
||||
&& hi->root.type == bfd_link_hash_indirect)
|
||||
{
|
||||
/* Change indirect symbol from IR to undefined. */
|
||||
@ -0,0 +1,11 @@
|
||||
--- binutils.orig/libiberty/sha1.c 2021-05-07 10:47:11.572773217 +0100
|
||||
+++ binutils-2.35.2/libiberty/sha1.c 2021-05-07 10:47:16.014741009 +0100
|
||||
@@ -258,7 +258,7 @@ sha1_process_bytes (const void *buffer,
|
||||
{
|
||||
sha1_process_block (ctx->buffer, 64, ctx);
|
||||
left_over -= 64;
|
||||
- memcpy (ctx->buffer, &ctx->buffer[16], left_over);
|
||||
+ memmove (ctx->buffer, &ctx->buffer[16], left_over);
|
||||
}
|
||||
ctx->buflen = left_over;
|
||||
}
|
||||
@ -0,0 +1,11 @@
|
||||
--- binutils.orig/ld/pe-dll.c 2021-05-07 10:47:12.145769068 +0100
|
||||
+++ binutils-2.35.2/ld/pe-dll.c 2021-05-07 11:01:43.000450119 +0100
|
||||
@@ -3032,7 +3032,7 @@ pe_find_cdecl_alias_match (struct bfd_li
|
||||
if (pe_details->underscored)
|
||||
lname[0] = '_';
|
||||
else
|
||||
- strcpy (lname, lname + 1);
|
||||
+ memmove (lname, lname + 1, strlen (lname));
|
||||
key.key = lname;
|
||||
kv = bsearch (&key, udef_table, undef_count,
|
||||
sizeof (struct key_value), undef_sort_cmp);
|
||||
@ -0,0 +1,17 @@
|
||||
diff --git a/bfd/elf.c b/bfd/elf.c
|
||||
index fe00e0f9189..7cd7febcf95 100644
|
||||
--- a/bfd/elf.c
|
||||
+++ b/bfd/elf.c
|
||||
@@ -8918,7 +8918,9 @@ _bfd_elf_slurp_version_tables (bfd *abfd, bool default_imported_symver)
|
||||
bfd_set_error (bfd_error_file_too_big);
|
||||
goto error_return_verref;
|
||||
}
|
||||
- elf_tdata (abfd)->verref = (Elf_Internal_Verneed *) bfd_alloc (abfd, amt);
|
||||
+ if (amt == 0)
|
||||
+ goto error_return_verref;
|
||||
+ elf_tdata (abfd)->verref = (Elf_Internal_Verneed *) bfd_zalloc (abfd, amt);
|
||||
if (elf_tdata (abfd)->verref == NULL)
|
||||
goto error_return_verref;
|
||||
|
||||
--
|
||||
2.31.1
|
||||
@ -1,49 +0,0 @@
|
||||
diff -rupN binutils.orig/multilib.am binutils-2.41/multilib.am
|
||||
--- binutils.orig/multilib.am 1970-01-01 01:00:00.000000000 +0100
|
||||
+++ binutils-2.41/multilib.am 2024-02-12 16:41:56.899838085 +0000
|
||||
@@ -0,0 +1,45 @@
|
||||
+## automake - create Makefile.in from Makefile.am
|
||||
+
|
||||
+## Copyright (C) 1994-2017 Free Software Foundation, Inc.
|
||||
+## This Makefile.in is free software; the Free Software Foundation
|
||||
+## gives unlimited permission to copy and/or distribute it,
|
||||
+## with or without modifications, as long as this notice is preserved.
|
||||
+
|
||||
+## This program is distributed in the hope that it will be useful,
|
||||
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+## GNU General Public License for more details.
|
||||
+
|
||||
+MULTISRCTOP =
|
||||
+MULTIBUILDTOP =
|
||||
+MULTIDIRS =
|
||||
+MULTISUBDIR =
|
||||
+MULTIDO = true
|
||||
+MULTICLEAN = true
|
||||
+
|
||||
+# GNU Make needs to see an explicit $(MAKE) variable in the command it
|
||||
+# runs to enable its job server during parallel builds. Hence the
|
||||
+# comments below.
|
||||
+all-multi:
|
||||
+ $(MULTIDO) $(AM_MAKEFLAGS) DO=all multi-do # $(MAKE)
|
||||
+install-multi:
|
||||
+ $(MULTIDO) $(AM_MAKEFLAGS) DO=install multi-do # $(MAKE)
|
||||
+mostlyclean-multi:
|
||||
+ $(MULTICLEAN) $(AM_MAKEFLAGS) DO=mostlyclean multi-clean # $(MAKE)
|
||||
+clean-multi:
|
||||
+ $(MULTICLEAN) $(AM_MAKEFLAGS) DO=clean multi-clean # $(MAKE)
|
||||
+distclean-multi:
|
||||
+ $(MULTICLEAN) $(AM_MAKEFLAGS) DO=distclean multi-clean # $(MAKE)
|
||||
+maintainer-clean-multi:
|
||||
+ $(MULTICLEAN) $(AM_MAKEFLAGS) DO=maintainer-clean multi-clean # $(MAKE)
|
||||
+
|
||||
+.MAKE .PHONY: all-multi clean-multi distclean-multi install-am \
|
||||
+ install-multi maintainer-clean-multi mostlyclean-multi
|
||||
+
|
||||
+install-exec-local: install-multi
|
||||
+
|
||||
+all-local: all-multi
|
||||
+mostlyclean-local: mostlyclean-multi
|
||||
+clean-local: clean-multi
|
||||
+distclean-local: distclean-multi
|
||||
+maintainer-clean-local: maintainer-clean-multi
|
||||
@ -0,0 +1,30 @@
|
||||
diff -rup binutils.orig/bfd/configure binutils-2.35.2/bfd/configure
|
||||
--- binutils.orig/bfd/configure 2023-01-19 12:17:21.293513059 +0000
|
||||
+++ binutils-2.35.2/bfd/configure 2023-01-19 12:27:25.783974084 +0000
|
||||
@@ -18921,11 +18921,6 @@ _LT_EOF
|
||||
esac
|
||||
done ;;
|
||||
"bfd_stdint.h":C)
|
||||
-if test "$GCC" = yes; then
|
||||
- echo "/* generated for " `$CC --version | sed 1q` "*/" > tmp-stdint.h
|
||||
-else
|
||||
- echo "/* generated for $CC */" > tmp-stdint.h
|
||||
-fi
|
||||
|
||||
sed 's/^ *//' >> tmp-stdint.h <<EOF
|
||||
|
||||
diff -rup binutils.orig/config/stdint.m4 binutils-2.35.2/config/stdint.m4
|
||||
--- binutils.orig/config/stdint.m4 2023-01-19 12:17:20.169515897 +0000
|
||||
+++ binutils-2.35.2/config/stdint.m4 2023-01-19 12:27:02.920032688 +0000
|
||||
@@ -192,11 +192,6 @@ fi
|
||||
|
||||
# ----------------- done all checks, emit header -------------
|
||||
AC_CONFIG_COMMANDS(_GCC_STDINT_H, [
|
||||
-if test "$GCC" = yes; then
|
||||
- echo "/* generated for " `$CC --version | sed 1q` "*/" > tmp-stdint.h
|
||||
-else
|
||||
- echo "/* generated for $CC */" > tmp-stdint.h
|
||||
-fi
|
||||
|
||||
sed 's/^ *//' >> tmp-stdint.h <<EOF
|
||||
|
||||
@ -0,0 +1,365 @@
|
||||
diff -rup binutils.orig/binutils/doc/binutils.texi binutils-2.35.2/binutils/doc/binutils.texi
|
||||
--- binutils.orig/binutils/doc/binutils.texi 2024-04-03 11:32:37.507595411 +0100
|
||||
+++ binutils-2.35.2/binutils/doc/binutils.texi 2024-04-03 11:32:53.188615675 +0100
|
||||
@@ -1643,6 +1643,10 @@ above. If @var{sectionpattern} does not
|
||||
input file, a warning will be issued, unless
|
||||
@option{--no-change-warnings} is used.
|
||||
|
||||
+Note - changing the VMA of sections in a fully linked binary can be
|
||||
+dangerous since there may be code that expects the sections to be
|
||||
+located at their old address.
|
||||
+
|
||||
@item --change-warnings
|
||||
@itemx --adjust-warnings
|
||||
If @option{--change-section-address} or @option{--change-section-lma} or
|
||||
@@ -1671,7 +1675,14 @@ ELF format files.
|
||||
@item --set-section-alignment @var{sectionpattern}=@var{align}
|
||||
Set the alignment for any sections matching @var{sectionpattern}.
|
||||
@var{align} specifies the alignment in bytes and must be a power of
|
||||
-two, i.e. 1, 2, 4, 8@dots{}.
|
||||
+two, i.e. 1, 2, 4, 8@dots{}.
|
||||
+
|
||||
+Note - setting a section's alignment will not automatically align its
|
||||
+LMA or VMA addresses. If those need to be changed as well then the
|
||||
+@option{--change-section-lma} and/or @option{--change-section-vma}
|
||||
+options should be used. Also note that changing VMAs can cause
|
||||
+problems in fully linked binaries where there may be code that expects
|
||||
+the contents of the sections to be located at their old address.
|
||||
|
||||
@item --add-section @var{sectionname}=@var{filename}
|
||||
Add a new section named @var{sectionname} while copying the file. The
|
||||
@@ -2029,11 +2040,21 @@ for dlls.
|
||||
[This option is specific to PE targets.]
|
||||
|
||||
@item --section-alignment @var{num}
|
||||
-Sets the section alignment field in the PE header. Sections in memory
|
||||
-will always begin at addresses which are a multiple of this number.
|
||||
-Defaults to 0x1000.
|
||||
[This option is specific to PE targets.]
|
||||
|
||||
+Sets the section alignment field in the PE header - if one is present
|
||||
+in the binary. Sections in memory will always begin at addresses
|
||||
+which are a multiple of this number. Defaults to 0x1000.
|
||||
+
|
||||
+Note - this option will also set the alignment field in each section's
|
||||
+flags.
|
||||
+
|
||||
+Note - if a section's LMA or VMA addresses are no longer aligned, and
|
||||
+those addresses have not been set via the @option{--set-section-lma} or
|
||||
+@option{--set-section-vma} options, and the file has been fully
|
||||
+relocated then a warning message will be issued. It will then be up
|
||||
+to the user to decide if the LMA and VMA need updating.
|
||||
+
|
||||
@item --stack @var{reserve}
|
||||
@itemx --stack @var{reserve},@var{commit}
|
||||
Specify the number of bytes of memory to reserve (and optionally commit)
|
||||
diff -rup binutils.orig/binutils/objcopy.c binutils-2.35.2/binutils/objcopy.c
|
||||
--- binutils.orig/binutils/objcopy.c 2024-04-03 11:32:37.862595870 +0100
|
||||
+++ binutils-2.35.2/binutils/objcopy.c 2024-04-03 11:32:53.189615676 +0100
|
||||
@@ -3954,6 +3954,50 @@ setup_bfd_headers (bfd *ibfd, bfd *obfd)
|
||||
return;
|
||||
}
|
||||
|
||||
+static inline signed int
|
||||
+power_of_two (bfd_vma val)
|
||||
+{
|
||||
+ signed int result = 0;
|
||||
+
|
||||
+ if (val == 0)
|
||||
+ return 0;
|
||||
+
|
||||
+ while ((val & 1) == 0)
|
||||
+ {
|
||||
+ val >>= 1;
|
||||
+ ++result;
|
||||
+ }
|
||||
+
|
||||
+ if (val != 1)
|
||||
+ /* Number has more than one 1, i.e. wasn't a power of 2. */
|
||||
+ return -1;
|
||||
+
|
||||
+ return result;
|
||||
+}
|
||||
+
|
||||
+static unsigned int
|
||||
+image_scn_align (unsigned int alignment)
|
||||
+{
|
||||
+ switch (alignment)
|
||||
+ {
|
||||
+ case 8192: return IMAGE_SCN_ALIGN_8192BYTES;
|
||||
+ case 4096: return IMAGE_SCN_ALIGN_4096BYTES;
|
||||
+ case 2048: return IMAGE_SCN_ALIGN_2048BYTES;
|
||||
+ case 1024: return IMAGE_SCN_ALIGN_1024BYTES;
|
||||
+ case 512: return IMAGE_SCN_ALIGN_512BYTES;
|
||||
+ case 256: return IMAGE_SCN_ALIGN_256BYTES;
|
||||
+ case 128: return IMAGE_SCN_ALIGN_128BYTES;
|
||||
+ case 64: return IMAGE_SCN_ALIGN_64BYTES;
|
||||
+ case 32: return IMAGE_SCN_ALIGN_32BYTES;
|
||||
+ case 16: return IMAGE_SCN_ALIGN_16BYTES;
|
||||
+ case 8: return IMAGE_SCN_ALIGN_8BYTES;
|
||||
+ case 4: return IMAGE_SCN_ALIGN_4BYTES;
|
||||
+ case 2: return IMAGE_SCN_ALIGN_2BYTES;
|
||||
+ case 1: return IMAGE_SCN_ALIGN_1BYTES;
|
||||
+ default: return 0;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
/* Create a section in OBFD with the same
|
||||
name and attributes as ISECTION in IBFD. */
|
||||
|
||||
@@ -4058,6 +4102,8 @@ setup_section (bfd *ibfd, sec_ptr isecti
|
||||
goto loser;
|
||||
}
|
||||
|
||||
+ bfd_boolean vma_set_by_user = FALSE;
|
||||
+
|
||||
vma = bfd_section_vma (isection);
|
||||
p = find_section_list (bfd_section_name (isection), FALSE,
|
||||
SECTION_CONTEXT_ALTER_VMA | SECTION_CONTEXT_SET_VMA);
|
||||
@@ -4067,6 +4113,7 @@ setup_section (bfd *ibfd, sec_ptr isecti
|
||||
vma = p->vma_val;
|
||||
else
|
||||
vma += p->vma_val;
|
||||
+ vma_set_by_user = TRUE;
|
||||
}
|
||||
else
|
||||
vma += change_section_address;
|
||||
@@ -4077,6 +4124,8 @@ setup_section (bfd *ibfd, sec_ptr isecti
|
||||
goto loser;
|
||||
}
|
||||
|
||||
+ bfd_boolean lma_set_by_user = FALSE;
|
||||
+
|
||||
lma = isection->lma;
|
||||
p = find_section_list (bfd_section_name (isection), FALSE,
|
||||
SECTION_CONTEXT_ALTER_LMA | SECTION_CONTEXT_SET_LMA);
|
||||
@@ -4086,6 +4135,7 @@ setup_section (bfd *ibfd, sec_ptr isecti
|
||||
lma += p->lma_val;
|
||||
else
|
||||
lma = p->lma_val;
|
||||
+ lma_set_by_user = TRUE;
|
||||
}
|
||||
else
|
||||
lma += change_section_address;
|
||||
@@ -4096,6 +4146,24 @@ setup_section (bfd *ibfd, sec_ptr isecti
|
||||
SECTION_CONTEXT_SET_ALIGNMENT);
|
||||
if (p != NULL)
|
||||
alignment = p->alignment;
|
||||
+ else if (pe_section_alignment != (bfd_vma) -1
|
||||
+ && bfd_get_flavour (obfd) == bfd_target_coff_flavour)
|
||||
+ {
|
||||
+ alignment = power_of_two (pe_section_alignment);
|
||||
+
|
||||
+ if (coff_section_data (ibfd, isection))
|
||||
+ {
|
||||
+ struct pei_section_tdata * pei_data = pei_section_data (ibfd, isection);
|
||||
+
|
||||
+ if (pei_data != NULL)
|
||||
+ {
|
||||
+ /* Set the alignment flag of the input section, which will
|
||||
+ be copied to the output section later on. */
|
||||
+ pei_data->pe_flags &= ~IMAGE_SCN_ALIGN_POWER_BIT_MASK;
|
||||
+ pei_data->pe_flags |= image_scn_align (pe_section_alignment);
|
||||
+ }
|
||||
+ }
|
||||
+ }
|
||||
else
|
||||
alignment = bfd_section_alignment (isection);
|
||||
|
||||
@@ -4107,6 +4175,32 @@ setup_section (bfd *ibfd, sec_ptr isecti
|
||||
goto loser;
|
||||
}
|
||||
|
||||
+ /* If the output section's VMA is not aligned
|
||||
+ and the alignment has changed
|
||||
+ and the VMA was not set by the user
|
||||
+ and the section does not have relocations associated with it
|
||||
+ then warn the user. */
|
||||
+ if (osection->vma & ((1 << alignment) - 1)
|
||||
+ && alignment != bfd_section_alignment (isection)
|
||||
+ && change_section_address == 0
|
||||
+ && ! vma_set_by_user
|
||||
+ && bfd_get_reloc_upper_bound (ibfd, isection) < 1)
|
||||
+ {
|
||||
+ non_fatal (_("output section %s's alignment does not match its VMA"), name);
|
||||
+ }
|
||||
+
|
||||
+ /* Similar check for a non-aligned LMA.
|
||||
+ FIXME: Since this is only an LMA, maybe it does not matter if
|
||||
+ it is not aligned ? */
|
||||
+ if (osection->lma & ((1 << alignment) - 1)
|
||||
+ && alignment != bfd_section_alignment (isection)
|
||||
+ && change_section_address == 0
|
||||
+ && ! lma_set_by_user
|
||||
+ && bfd_get_reloc_upper_bound (ibfd, isection) < 1)
|
||||
+ {
|
||||
+ non_fatal (_("output section %s's alignment does not match its LMA"), name);
|
||||
+ }
|
||||
+
|
||||
/* Copy merge entity size. */
|
||||
osection->entsize = isection->entsize;
|
||||
|
||||
@@ -5530,15 +5624,8 @@ copy_main (int argc, char *argv[])
|
||||
fatal (_("bad format for --set-section-alignment: numeric argument needed"));
|
||||
|
||||
/* Convert integer alignment into a power-of-two alignment. */
|
||||
- palign = 0;
|
||||
- while ((align & 1) == 0)
|
||||
- {
|
||||
- align >>= 1;
|
||||
- ++palign;
|
||||
- }
|
||||
-
|
||||
- if (align != 1)
|
||||
- /* Number has more than on 1, i.e. wasn't a power of 2. */
|
||||
+ palign = power_of_two (align);
|
||||
+ if (palign == -1)
|
||||
fatal (_("bad format for --set-section-alignment: alignment is not a power of two"));
|
||||
|
||||
/* Add the alignment setting to the section list. */
|
||||
@@ -5751,6 +5838,11 @@ copy_main (int argc, char *argv[])
|
||||
case OPTION_PE_SECTION_ALIGNMENT:
|
||||
pe_section_alignment = parse_vma (optarg,
|
||||
"--section-alignment");
|
||||
+ if (power_of_two (pe_section_alignment) == -1)
|
||||
+ {
|
||||
+ non_fatal (_("--section-alignment argument is not a power of two: %s - ignoring"), optarg);
|
||||
+ pe_section_alignment = (bfd_vma) -1;
|
||||
+ }
|
||||
break;
|
||||
|
||||
case OPTION_SUBSYSTEM:
|
||||
diff -rup binutils.orig/binutils/testsuite/binutils-all/objcopy.exp binutils-2.35.2/binutils/testsuite/binutils-all/objcopy.exp
|
||||
--- binutils.orig/binutils/testsuite/binutils-all/objcopy.exp 2024-04-03 11:32:37.781595765 +0100
|
||||
+++ binutils-2.35.2/binutils/testsuite/binutils-all/objcopy.exp 2024-04-03 11:33:00.878625614 +0100
|
||||
@@ -1342,6 +1342,7 @@ objcopy_remove_relocations_from_executab
|
||||
run_dump_test "pr23633"
|
||||
|
||||
run_dump_test "set-section-alignment"
|
||||
+run_dump_test "section-alignment"
|
||||
|
||||
setup_xfail "hppa*-*-*"
|
||||
setup_xfail "sh-*-coff*"
|
||||
--- /dev/null 2024-06-27 08:39:51.717818400 +0100
|
||||
+++ binutils-2.35.2/binutils/testsuite/binutils-all/section-alignment.d 2024-06-27 15:43:00.626529058 +0100
|
||||
@@ -0,0 +1,9 @@
|
||||
+#source: pr23633.s
|
||||
+#PROG: objcopy
|
||||
+#objcopy: --section-alignment=512
|
||||
+#objdump: -P sections
|
||||
+#target: [is_pecoff_format]
|
||||
+
|
||||
+#...
|
||||
+.* Align: 512.*
|
||||
+#pass
|
||||
--- binutils.orig/binutils/objcopy.c 2024-07-25 15:30:49.380323472 +0100
|
||||
+++ binutils-2.35.2/binutils/objcopy.c 2024-07-25 15:33:35.779466989 +0100
|
||||
@@ -4147,6 +4147,7 @@ setup_section (bfd *ibfd, sec_ptr isecti
|
||||
if (p != NULL)
|
||||
alignment = p->alignment;
|
||||
else if (pe_section_alignment != (bfd_vma) -1
|
||||
+ && bfd_get_flavour (ibfd) == bfd_target_coff_flavour
|
||||
&& bfd_get_flavour (obfd) == bfd_target_coff_flavour)
|
||||
{
|
||||
alignment = power_of_two (pe_section_alignment);
|
||||
--- binutils.orig/bfd/coffcode.h 2024-08-12 09:44:06.041128327 +0100
|
||||
+++ binutils-2.35.2/bfd/coffcode.h 2024-08-12 11:13:58.209619284 +0100
|
||||
@@ -2942,7 +2942,7 @@ coff_compute_section_file_positions (bfd
|
||||
#endif
|
||||
|
||||
#ifdef COFF_IMAGE_WITH_PE
|
||||
- int page_size;
|
||||
+ unsigned int page_size;
|
||||
|
||||
if (coff_data (abfd)->link_info
|
||||
|| (pe_data (abfd) && pe_data (abfd)->pe_opthdr.FileAlignment))
|
||||
@@ -2953,22 +2953,12 @@ coff_compute_section_file_positions (bfd
|
||||
This repairs 'ld -r' for arm-wince-pe target. */
|
||||
if (page_size == 0)
|
||||
page_size = 1;
|
||||
-
|
||||
- /* PR 17512: file: 0ac816d3. */
|
||||
- if (page_size < 0)
|
||||
- {
|
||||
- bfd_set_error (bfd_error_file_too_big);
|
||||
- _bfd_error_handler
|
||||
- /* xgettext:c-format */
|
||||
- (_("%pB: page size is too large (0x%x)"), abfd, page_size);
|
||||
- return FALSE;
|
||||
- }
|
||||
}
|
||||
else
|
||||
page_size = PE_DEF_FILE_ALIGNMENT;
|
||||
#else
|
||||
#ifdef COFF_PAGE_SIZE
|
||||
- int page_size = COFF_PAGE_SIZE;
|
||||
+ unsigned int page_size = COFF_PAGE_SIZE;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
@@ -3050,10 +3040,11 @@ coff_compute_section_file_positions (bfd
|
||||
bfd_size_type amt;
|
||||
|
||||
#ifdef COFF_PAGE_SIZE
|
||||
- /* Clear D_PAGED if section alignment is smaller than
|
||||
- COFF_PAGE_SIZE. */
|
||||
- if (pe_data (abfd)->pe_opthdr.SectionAlignment < COFF_PAGE_SIZE)
|
||||
- abfd->flags &= ~D_PAGED;
|
||||
+ /* Clear D_PAGED if section / file alignment aren't suitable for
|
||||
+ paging at COFF_PAGE_SIZE granularity. */
|
||||
+ if (pe_data (abfd)->pe_opthdr.SectionAlignment < COFF_PAGE_SIZE
|
||||
+ || page_size < COFF_PAGE_SIZE)
|
||||
+ abfd->flags &= ~D_PAGED;
|
||||
#endif
|
||||
|
||||
count = 0;
|
||||
@@ -3173,7 +3164,11 @@ coff_compute_section_file_positions (bfd
|
||||
padding the previous section up if necessary. */
|
||||
old_sofar = sofar;
|
||||
|
||||
+#ifdef COFF_IMAGE_WITH_PE
|
||||
+ sofar = BFD_ALIGN (sofar, page_size);
|
||||
+#else
|
||||
sofar = BFD_ALIGN (sofar, 1 << current->alignment_power);
|
||||
+#endif
|
||||
|
||||
#ifdef RS6000COFF_C
|
||||
/* Make sure the file offset and the vma of .text/.data are at the
|
||||
@@ -3210,7 +3205,6 @@ coff_compute_section_file_positions (bfd
|
||||
if (previous != NULL)
|
||||
previous->size += sofar - old_sofar;
|
||||
}
|
||||
-
|
||||
#endif
|
||||
|
||||
/* In demand paged files the low order bits of the file offset
|
||||
@@ -3221,7 +3215,7 @@ coff_compute_section_file_positions (bfd
|
||||
sofar += (current->vma - (bfd_vma) sofar) % page_size;
|
||||
#endif
|
||||
current->filepos = sofar;
|
||||
-
|
||||
+
|
||||
#ifdef COFF_IMAGE_WITH_PE
|
||||
/* Set the padded size. */
|
||||
current->size = (current->size + page_size - 1) & -page_size;
|
||||
@@ -3244,7 +3238,11 @@ coff_compute_section_file_positions (bfd
|
||||
else
|
||||
{
|
||||
old_sofar = sofar;
|
||||
+#ifdef COFF_IMAGE_WITH_PE
|
||||
+ sofar = BFD_ALIGN (sofar, page_size);
|
||||
+#else
|
||||
sofar = BFD_ALIGN (sofar, 1 << current->alignment_power);
|
||||
+#endif
|
||||
align_adjust = sofar != old_sofar;
|
||||
current->size += sofar - old_sofar;
|
||||
}
|
||||
--- binutils.orig/binutils/testsuite/binutils-all/aarch64/pei-aarch64-little.d 2024-08-14 13:10:49.565104090 +0100
|
||||
+++ binutils-2.35.2/binutils/testsuite/binutils-all/aarch64/pei-aarch64-little.d 2024-08-14 13:15:44.378037490 +0100
|
||||
@@ -12,5 +12,5 @@ start address 0x0000000000000000
|
||||
|
||||
Sections:
|
||||
Idx Name Size VMA LMA File off Algn
|
||||
- 0 \.text 00000030 0[^ ]+ 0[^ ]+ 0[^ ]+ 2\*\*12
|
||||
+ 0 \.text 00000030 0[^ ]+ 0[^ ]+ 0[^ ]+ 2\*\*2
|
||||
CONTENTS, ALLOC, LOAD, READONLY, CODE
|
||||
@ -0,0 +1,182 @@
|
||||
--- binutils.orig/bfd/elflink.c 2020-11-03 11:59:59.966565009 +0000
|
||||
+++ binutils-2.35.1/bfd/elflink.c 2020-11-03 12:07:34.691991602 +0000
|
||||
@@ -4477,7 +4477,12 @@ elf_link_add_object_symbols (bfd *abfd,
|
||||
h = (struct elf_link_hash_entry *) p;
|
||||
entsize += htab->root.table.entsize;
|
||||
if (h->root.type == bfd_link_hash_warning)
|
||||
- entsize += htab->root.table.entsize;
|
||||
+ {
|
||||
+ entsize += htab->root.table.entsize;
|
||||
+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
|
||||
+ }
|
||||
+ if (h->root.type == bfd_link_hash_common)
|
||||
+ entsize += sizeof (*h->root.u.c.p);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -4521,14 +4526,20 @@ elf_link_add_object_symbols (bfd *abfd,
|
||||
|
||||
for (p = htab->root.table.table[i]; p != NULL; p = p->next)
|
||||
{
|
||||
- memcpy (old_ent, p, htab->root.table.entsize);
|
||||
- old_ent = (char *) old_ent + htab->root.table.entsize;
|
||||
h = (struct elf_link_hash_entry *) p;
|
||||
+ memcpy (old_ent, h, htab->root.table.entsize);
|
||||
+ old_ent = (char *) old_ent + htab->root.table.entsize;
|
||||
if (h->root.type == bfd_link_hash_warning)
|
||||
{
|
||||
- memcpy (old_ent, h->root.u.i.link, htab->root.table.entsize);
|
||||
+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
|
||||
+ memcpy (old_ent, h, htab->root.table.entsize);
|
||||
old_ent = (char *) old_ent + htab->root.table.entsize;
|
||||
}
|
||||
+ if (h->root.type == bfd_link_hash_common)
|
||||
+ {
|
||||
+ memcpy (old_ent, h->root.u.c.p, sizeof (*h->root.u.c.p));
|
||||
+ old_ent = (char *) old_ent + sizeof (*h->root.u.c.p);
|
||||
+ }
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -4899,7 +4910,8 @@ elf_link_add_object_symbols (bfd *abfd,
|
||||
}
|
||||
|
||||
if (! (_bfd_generic_link_add_one_symbol
|
||||
- (info, abfd, name, flags, sec, value, NULL, FALSE, bed->collect,
|
||||
+ (info, abfd, name, flags, sec, value,
|
||||
+ NULL, FALSE, bed->collect,
|
||||
(struct bfd_link_hash_entry **) sym_hash)))
|
||||
goto error_free_vers;
|
||||
|
||||
@@ -4970,11 +4982,10 @@ elf_link_add_object_symbols (bfd *abfd,
|
||||
object and a shared object. */
|
||||
bfd_boolean dynsym = FALSE;
|
||||
|
||||
- /* Plugin symbols aren't normal. Don't set def_regular or
|
||||
- ref_regular for them, or make them dynamic. */
|
||||
+ /* Plugin symbols aren't normal. Don't set def/ref flags. */
|
||||
if ((abfd->flags & BFD_PLUGIN) != 0)
|
||||
;
|
||||
- else if (! dynamic)
|
||||
+ else if (!dynamic)
|
||||
{
|
||||
if (! definition)
|
||||
{
|
||||
@@ -4991,14 +5002,6 @@ elf_link_add_object_symbols (bfd *abfd,
|
||||
h->ref_dynamic = 1;
|
||||
}
|
||||
}
|
||||
-
|
||||
- /* If the indirect symbol has been forced local, don't
|
||||
- make the real symbol dynamic. */
|
||||
- if ((h == hi || !hi->forced_local)
|
||||
- && (bfd_link_dll (info)
|
||||
- || h->def_dynamic
|
||||
- || h->ref_dynamic))
|
||||
- dynsym = TRUE;
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -5012,14 +5015,25 @@ elf_link_add_object_symbols (bfd *abfd,
|
||||
h->def_dynamic = 1;
|
||||
hi->def_dynamic = 1;
|
||||
}
|
||||
+ }
|
||||
|
||||
- /* If the indirect symbol has been forced local, don't
|
||||
- make the real symbol dynamic. */
|
||||
- if ((h == hi || !hi->forced_local)
|
||||
- && (h->def_regular
|
||||
- || h->ref_regular
|
||||
- || (h->is_weakalias
|
||||
- && weakdef (h)->dynindx != -1)))
|
||||
+ /* If an indirect symbol has been forced local, don't
|
||||
+ make the real symbol dynamic. */
|
||||
+ if (h != hi && hi->forced_local)
|
||||
+ ;
|
||||
+ else if (!dynamic)
|
||||
+ {
|
||||
+ if (bfd_link_dll (info)
|
||||
+ || h->def_dynamic
|
||||
+ || h->ref_dynamic)
|
||||
+ dynsym = TRUE;
|
||||
+ }
|
||||
+ else
|
||||
+ {
|
||||
+ if (h->def_regular
|
||||
+ || h->ref_regular
|
||||
+ || (h->is_weakalias
|
||||
+ && weakdef (h)->dynindx != -1))
|
||||
dynsym = TRUE;
|
||||
}
|
||||
|
||||
@@ -5214,6 +5228,9 @@ elf_link_add_object_symbols (bfd *abfd,
|
||||
&& definition
|
||||
&& ((dynsym
|
||||
&& h->ref_regular_nonweak)
|
||||
+ || (old_bfd != NULL
|
||||
+ && (old_bfd->flags & BFD_PLUGIN) != 0
|
||||
+ && bind != STB_WEAK)
|
||||
|| (h->ref_dynamic_nonweak
|
||||
&& (elf_dyn_lib_class (abfd) & DYN_AS_NEEDED) != 0
|
||||
&& !on_needed_list (elf_dt_name (abfd),
|
||||
@@ -5338,49 +5355,31 @@ elf_link_add_object_symbols (bfd *abfd,
|
||||
{
|
||||
struct bfd_hash_entry *p;
|
||||
struct elf_link_hash_entry *h;
|
||||
- bfd_size_type size;
|
||||
- unsigned int alignment_power;
|
||||
unsigned int non_ir_ref_dynamic;
|
||||
|
||||
for (p = htab->root.table.table[i]; p != NULL; p = p->next)
|
||||
{
|
||||
- h = (struct elf_link_hash_entry *) p;
|
||||
- if (h->root.type == bfd_link_hash_warning)
|
||||
- h = (struct elf_link_hash_entry *) h->root.u.i.link;
|
||||
-
|
||||
- /* Preserve the maximum alignment and size for common
|
||||
- symbols even if this dynamic lib isn't on DT_NEEDED
|
||||
- since it can still be loaded at run time by another
|
||||
- dynamic lib. */
|
||||
- if (h->root.type == bfd_link_hash_common)
|
||||
- {
|
||||
- size = h->root.u.c.size;
|
||||
- alignment_power = h->root.u.c.p->alignment_power;
|
||||
- }
|
||||
- else
|
||||
- {
|
||||
- size = 0;
|
||||
- alignment_power = 0;
|
||||
- }
|
||||
/* Preserve non_ir_ref_dynamic so that this symbol
|
||||
will be exported when the dynamic lib becomes needed
|
||||
in the second pass. */
|
||||
+ h = (struct elf_link_hash_entry *) p;
|
||||
+ if (h->root.type == bfd_link_hash_warning)
|
||||
+ h = (struct elf_link_hash_entry *) h->root.u.i.link;
|
||||
non_ir_ref_dynamic = h->root.non_ir_ref_dynamic;
|
||||
- memcpy (p, old_ent, htab->root.table.entsize);
|
||||
- old_ent = (char *) old_ent + htab->root.table.entsize;
|
||||
+
|
||||
h = (struct elf_link_hash_entry *) p;
|
||||
+ memcpy (h, old_ent, htab->root.table.entsize);
|
||||
+ old_ent = (char *) old_ent + htab->root.table.entsize;
|
||||
if (h->root.type == bfd_link_hash_warning)
|
||||
{
|
||||
- memcpy (h->root.u.i.link, old_ent, htab->root.table.entsize);
|
||||
- old_ent = (char *) old_ent + htab->root.table.entsize;
|
||||
h = (struct elf_link_hash_entry *) h->root.u.i.link;
|
||||
+ memcpy (h, old_ent, htab->root.table.entsize);
|
||||
+ old_ent = (char *) old_ent + htab->root.table.entsize;
|
||||
}
|
||||
if (h->root.type == bfd_link_hash_common)
|
||||
{
|
||||
- if (size > h->root.u.c.size)
|
||||
- h->root.u.c.size = size;
|
||||
- if (alignment_power > h->root.u.c.p->alignment_power)
|
||||
- h->root.u.c.p->alignment_power = alignment_power;
|
||||
+ memcpy (h->root.u.c.p, old_ent, sizeof (*h->root.u.c.p));
|
||||
+ old_ent = (char *) old_ent + sizeof (*h->root.u.c.p);
|
||||
}
|
||||
h->root.non_ir_ref_dynamic = non_ir_ref_dynamic;
|
||||
}
|
||||
@ -1,83 +0,0 @@
|
||||
diff -rup binutils,orig/binutils/doc/binutils.texi binutils-2.41/binutils/doc/binutils.texi
|
||||
--- binutils,orig/binutils/doc/binutils.texi 2024-02-12 10:03:46.609677213 +0000
|
||||
+++ binutils-2.41/binutils/doc/binutils.texi 2024-02-12 10:03:55.976681219 +0000
|
||||
@@ -2651,11 +2651,12 @@ rather than @code{li}. All of the @opti
|
||||
@option{e300}, @option{e500}, @option{e500mc}, @option{e500mc64},
|
||||
@option{e500x2}, @option{e5500}, @option{e6500}, @option{efs},
|
||||
@option{power4}, @option{power5}, @option{power6}, @option{power7},
|
||||
-@option{power8}, @option{power9}, @option{power10}, @option{ppc},
|
||||
-@option{ppc32}, @option{ppc64}, @option{ppc64bridge}, @option{ppcps},
|
||||
-@option{pwr}, @option{pwr2}, @option{pwr4}, @option{pwr5}, @option{pwr5x},
|
||||
-@option{pwr6}, @option{pwr7}, @option{pwr8}, @option{pwr9}, @option{pwr10},
|
||||
-@option{pwrx}, @option{titan}, @option{vle}, and @option{future}.
|
||||
+@option{power8}, @option{power9}, @option{power10}, @option{power11},
|
||||
+@option{ppc}, @option{ppc32}, @option{ppc64}, @option{ppc64bridge},
|
||||
+@option{ppcps}, @option{pwr}, @option{pwr2}, @option{pwr4}, @option{pwr5},
|
||||
+@option{pwr5x}, @option{pwr6}, @option{pwr7}, @option{pwr8}, @option{pwr9},
|
||||
+@option{pwr10}, @option{pwr11}, @option{pwrx}, @option{titan}, @option{vle},
|
||||
+and @option{future}.
|
||||
@option{32} and @option{64} modify the default or a prior CPU
|
||||
selection, disabling and enabling 64-bit insns respectively. In
|
||||
addition, @option{altivec}, @option{any}, @option{lsp}, @option{htm},
|
||||
Only in binutils-2.41/binutils/doc: binutils.texi.orig
|
||||
diff -rup binutils,orig/gas/config/tc-ppc.c binutils-2.41/gas/config/tc-ppc.c
|
||||
--- binutils,orig/gas/config/tc-ppc.c 2024-02-12 10:03:46.742677270 +0000
|
||||
+++ binutils-2.41/gas/config/tc-ppc.c 2024-02-12 10:03:55.977681219 +0000
|
||||
@@ -1392,6 +1392,8 @@ PowerPC options:\n"));
|
||||
fprintf (stream, _("\
|
||||
-mpower10, -mpwr10 generate code for Power10 architecture\n"));
|
||||
fprintf (stream, _("\
|
||||
+-mpower11, -mpwr11 generate code for Power11 architecture\n"));
|
||||
+ fprintf (stream, _("\
|
||||
-mlibresoc generate code for Libre-SOC architecture\n"));
|
||||
fprintf (stream, _("\
|
||||
-mfuture generate code for 'future' architecture\n"));
|
||||
diff -rup binutils,orig/gas/doc/c-ppc.texi binutils-2.41/gas/doc/c-ppc.texi
|
||||
--- binutils,orig/gas/doc/c-ppc.texi 2024-02-12 10:03:46.783677288 +0000
|
||||
+++ binutils-2.41/gas/doc/c-ppc.texi 2024-02-12 10:03:55.977681219 +0000
|
||||
@@ -156,6 +156,9 @@ Generate code for Power9 architecture.
|
||||
@item -mpower10, -mpwr10
|
||||
Generate code for Power10 architecture.
|
||||
|
||||
+@item -mpower11, -mpwr11
|
||||
+Generate code for Power11 architecture.
|
||||
+
|
||||
@item -mfuture
|
||||
Generate code for 'future' architecture.
|
||||
|
||||
diff -rup binutils,orig/opcodes/ppc-dis.c binutils-2.41/opcodes/ppc-dis.c
|
||||
--- binutils,orig/opcodes/ppc-dis.c 2024-02-12 10:03:47.836677739 +0000
|
||||
+++ binutils-2.41/opcodes/ppc-dis.c 2024-02-12 10:03:55.977681219 +0000
|
||||
@@ -208,6 +208,11 @@ struct ppc_mopt ppc_opts[] = {
|
||||
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
|
||||
| PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
|
||||
0 },
|
||||
+ { "power11", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
|
||||
+ | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
|
||||
+ | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
|
||||
+ | PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
|
||||
+ 0 },
|
||||
{ "libresoc",(PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
|
||||
| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
|
||||
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
|
||||
@@ -267,6 +272,11 @@ struct ppc_mopt ppc_opts[] = {
|
||||
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
|
||||
| PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
|
||||
0 },
|
||||
+ { "pwr11", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
|
||||
+ | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
|
||||
+ | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
|
||||
+ | PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
|
||||
+ 0 },
|
||||
{ "pwrx", PPC_OPCODE_POWER | PPC_OPCODE_POWER2,
|
||||
0 },
|
||||
{ "raw", PPC_OPCODE_PPC,
|
||||
@@ -396,7 +406,7 @@ powerpc_init_dialect (struct disassemble
|
||||
break;
|
||||
default:
|
||||
if (info->arch == bfd_arch_powerpc)
|
||||
- dialect = ppc_parse_cpu (dialect, &sticky, "power10") | PPC_OPCODE_ANY;
|
||||
+ dialect = ppc_parse_cpu (dialect, &sticky, "power11") | PPC_OPCODE_ANY;
|
||||
else
|
||||
dialect = ppc_parse_cpu (dialect, &sticky, "pwr");
|
||||
break;
|
||||
@ -0,0 +1,39 @@
|
||||
--- binutils.orig/opcodes/ppc-dis.c 2020-09-11 10:55:56.243724026 +0100
|
||||
+++ binutils-2.35/opcodes/ppc-dis.c 2020-09-11 10:57:51.363934217 +0100
|
||||
@@ -399,12 +399,36 @@ static unsigned short vle_opcd_indices[V
|
||||
#define SPE2_OPCD_SEGS (1 + SPE2_XOP_TO_SEG (SPE2_XOP (-1)))
|
||||
static unsigned short spe2_opcd_indices[SPE2_OPCD_SEGS + 1];
|
||||
|
||||
+static bfd_boolean
|
||||
+ppc_symbol_is_valid (asymbol *sym,
|
||||
+ struct disassemble_info *info ATTRIBUTE_UNUSED)
|
||||
+{
|
||||
+ elf_symbol_type * est;
|
||||
+
|
||||
+ if (sym == NULL)
|
||||
+ return FALSE;
|
||||
+
|
||||
+ est = elf_symbol_from (NULL, sym);
|
||||
+
|
||||
+ /* Ignore ELF hidden, local, no-type symbols.
|
||||
+ These are generated by annobin. */
|
||||
+ if (est != NULL
|
||||
+ && ELF_ST_VISIBILITY (est->internal_elf_sym.st_other) == STV_HIDDEN
|
||||
+ && ELF_ST_BIND (est->internal_elf_sym.st_info) == STB_LOCAL
|
||||
+ && ELF_ST_TYPE (est->internal_elf_sym.st_info) == STT_NOTYPE)
|
||||
+ return FALSE;
|
||||
+
|
||||
+ return TRUE;
|
||||
+}
|
||||
+
|
||||
/* Calculate opcode table indices to speed up disassembly,
|
||||
and init dialect. */
|
||||
|
||||
void
|
||||
disassemble_init_powerpc (struct disassemble_info *info)
|
||||
{
|
||||
+ info->symbol_is_valid = ppc_symbol_is_valid;
|
||||
+
|
||||
if (powerpc_opcd_indices[PPC_OPCD_SEGS] == 0)
|
||||
{
|
||||
unsigned seg, idx, op;
|
||||
@ -1,114 +0,0 @@
|
||||
--- binutils.orig/bfd/elf64-ppc.c 2024-01-16 10:39:26.903071936 +0000
|
||||
+++ binutils-2.41/bfd/elf64-ppc.c 2024-01-16 10:39:38.650127903 +0000
|
||||
@@ -4749,6 +4749,21 @@ is_8byte_reloc (enum elf_ppc64_reloc_typ
|
||||
|| r_type == R_PPC64_PLTCALL);
|
||||
}
|
||||
|
||||
+/* The RELR encoding doesn't allow odd addresses, so RELR_ALIGN must
|
||||
+ be at least 1. R_PPC64_RELATIVE relocs require alignment of 2**3.
|
||||
+ We use 3 here to avoid complexity in relocate_section. PR30824. */
|
||||
+#define RELR_ALIGN 3
|
||||
+
|
||||
+static bool
|
||||
+maybe_relr (enum elf_ppc64_reloc_type r_type,
|
||||
+ const Elf_Internal_Rela *rel,
|
||||
+ const asection *sec)
|
||||
+{
|
||||
+ return ((r_type == R_PPC64_ADDR64 || r_type == R_PPC64_TOC)
|
||||
+ && (rel->r_offset & ((1 << RELR_ALIGN) - 1)) == 0
|
||||
+ && sec->alignment_power >= RELR_ALIGN);
|
||||
+}
|
||||
+
|
||||
/* Like bfd_reloc_offset_in_range but without a howto. Return true
|
||||
iff a field of SIZE bytes at OFFSET is within SEC limits. */
|
||||
|
||||
@@ -5401,9 +5416,7 @@ ppc64_elf_check_relocs (bfd *abfd, struc
|
||||
p->count += 1;
|
||||
if (!must_be_dyn_reloc (info, r_type))
|
||||
p->pc_count += 1;
|
||||
- if ((r_type == R_PPC64_ADDR64 || r_type == R_PPC64_TOC)
|
||||
- && rel->r_offset % 2 == 0
|
||||
- && sec->alignment_power != 0)
|
||||
+ if (maybe_relr (r_type, rel, sec))
|
||||
p->rel_count += 1;
|
||||
}
|
||||
else
|
||||
@@ -5438,9 +5451,7 @@ ppc64_elf_check_relocs (bfd *abfd, struc
|
||||
p->ifunc = is_ifunc;
|
||||
}
|
||||
p->count += 1;
|
||||
- if ((r_type == R_PPC64_ADDR64 || r_type == R_PPC64_TOC)
|
||||
- && rel->r_offset % 2 == 0
|
||||
- && sec->alignment_power != 0)
|
||||
+ if (maybe_relr (r_type, rel, sec))
|
||||
p->rel_count += 1;
|
||||
}
|
||||
}
|
||||
@@ -7291,9 +7302,7 @@ dec_dynrel_count (const Elf_Internal_Rel
|
||||
{
|
||||
if (!must_be_dyn_reloc (info, r_type))
|
||||
p->pc_count -= 1;
|
||||
- if ((r_type == R_PPC64_ADDR64 || r_type == R_PPC64_TOC)
|
||||
- && rel->r_offset % 2 == 0
|
||||
- && sec->alignment_power != 0)
|
||||
+ if (maybe_relr (r_type, rel, sec))
|
||||
p->rel_count -= 1;
|
||||
p->count -= 1;
|
||||
if (p->count == 0)
|
||||
@@ -7326,9 +7335,7 @@ dec_dynrel_count (const Elf_Internal_Rel
|
||||
{
|
||||
if (p->sec == sec && p->ifunc == is_ifunc)
|
||||
{
|
||||
- if ((r_type == R_PPC64_ADDR64 || r_type == R_PPC64_TOC)
|
||||
- && rel->r_offset % 2 == 0
|
||||
- && sec->alignment_power != 0)
|
||||
+ if (maybe_relr (r_type, rel, sec))
|
||||
p->rel_count -= 1;
|
||||
p->count -= 1;
|
||||
if (p->count == 0)
|
||||
@@ -13869,6 +13876,9 @@ ppc64_elf_size_stubs (struct bfd_link_in
|
||||
switch (r_type)
|
||||
{
|
||||
default:
|
||||
+ if (info->enable_dt_relr
|
||||
+ && maybe_relr (r_type, irela, section))
|
||||
+ break;
|
||||
continue;
|
||||
|
||||
case R_PPC64_REL24:
|
||||
@@ -13880,14 +13890,6 @@ ppc64_elf_size_stubs (struct bfd_link_in
|
||||
if ((section->flags & SEC_CODE) != 0)
|
||||
break;
|
||||
continue;
|
||||
-
|
||||
- case R_PPC64_ADDR64:
|
||||
- case R_PPC64_TOC:
|
||||
- if (info->enable_dt_relr
|
||||
- && irela->r_offset % 2 == 0
|
||||
- && section->alignment_power != 0)
|
||||
- break;
|
||||
- continue;
|
||||
}
|
||||
|
||||
/* Now determine the call target, its name, value,
|
||||
@@ -15272,7 +15274,7 @@ ppc64_elf_build_stubs (struct bfd_link_i
|
||||
while (i < htab->relr_count)
|
||||
{
|
||||
bfd_vma base = relr_addr[i];
|
||||
- BFD_ASSERT (base % 2 == 0);
|
||||
+ BFD_ASSERT ((base & ((1 << RELR_ALIGN) - 1)) == 0);
|
||||
bfd_put_64 (htab->elf.dynobj, base, loc);
|
||||
loc += 8;
|
||||
i++;
|
||||
@@ -17510,9 +17512,8 @@ ppc64_elf_relocate_section (bfd *output_
|
||||
|
||||
if (!(info->enable_dt_relr
|
||||
&& ELF64_R_TYPE (outrel.r_info) == R_PPC64_RELATIVE
|
||||
- && rel->r_offset % 2 == 0
|
||||
- && input_section->alignment_power != 0
|
||||
- && ELF64_R_TYPE (orig_rel.r_info) != R_PPC64_UADDR64))
|
||||
+ && maybe_relr (ELF64_R_TYPE (orig_rel.r_info),
|
||||
+ rel, input_section)))
|
||||
{
|
||||
sreloc = elf_section_data (input_section)->sreloc;
|
||||
if (h != NULL
|
||||
@ -0,0 +1,36 @@
|
||||
Only in binutils-2.36.1/bfd: ChangeLog.orig
|
||||
Only in binutils-2.36.1/bfd: ChangeLog.rej
|
||||
diff -rup binutils.orig/bfd/elf32-ppc.c binutils-2.36.1/bfd/elf32-ppc.c
|
||||
--- binutils.orig/bfd/elf32-ppc.c 2021-05-18 11:38:27.644364623 +0100
|
||||
+++ binutils-2.36.1/bfd/elf32-ppc.c 2021-05-18 11:44:19.809184838 +0100
|
||||
@@ -5289,7 +5289,12 @@ allocate_dynrelocs (struct elf_link_hash
|
||||
for (ent = h->plt.plist; ent != NULL; ent = ent->next)
|
||||
if (ent->plt.refcount > 0)
|
||||
{
|
||||
- asection *s = htab->elf.splt;
|
||||
+ asection *s;
|
||||
+
|
||||
+ if (!ensure_undef_dynamic (info, h))
|
||||
+ return FALSE;
|
||||
+
|
||||
+ s = htab->elf.splt;
|
||||
|
||||
if (!dyn)
|
||||
{
|
||||
Only in binutils-2.36.1/bfd: elf32-ppc.c.orig
|
||||
Only in binutils-2.36.1/bfd: elf32-ppc.c.rej
|
||||
diff -rup binutils.orig/bfd/elf64-ppc.c binutils-2.36.1/bfd/elf64-ppc.c
|
||||
--- binutils.orig/bfd/elf64-ppc.c 2021-05-18 11:38:27.646364616 +0100
|
||||
+++ binutils-2.36.1/bfd/elf64-ppc.c 2021-05-18 11:41:01.635847814 +0100
|
||||
@@ -9819,6 +9819,9 @@ allocate_dynrelocs (struct elf_link_hash
|
||||
for (pent = h->plt.plist; pent != NULL; pent = pent->next)
|
||||
if (pent->plt.refcount > 0)
|
||||
{
|
||||
+ if (!ensure_undef_dynamic (info, h))
|
||||
+ return FALSE;
|
||||
+
|
||||
if (!htab->elf.dynamic_sections_created
|
||||
|| h->dynindx == -1)
|
||||
{
|
||||
Only in binutils-2.36.1/bfd: elf64-ppc.c.orig
|
||||
Only in binutils-2.36.1/bfd: elf64-ppc.c.rej
|
||||
@ -0,0 +1,42 @@
|
||||
--- binutils.orig/binutils/objcopy.c 2021-02-18 11:35:48.062479490 +0000
|
||||
+++ binutils-2.30/binutils/objcopy.c 2021-02-18 11:36:52.207071148 +0000
|
||||
@@ -2224,6 +2224,11 @@ merge_gnu_build_notes (bfd * ab
|
||||
goto done;
|
||||
}
|
||||
|
||||
+ if (start > end)
|
||||
+ /* This can happen with PPC64LE binaries where empty notes are
|
||||
+ encoded as start = end + 4. */
|
||||
+ start = end;
|
||||
+
|
||||
if (is_open_note (pnote))
|
||||
{
|
||||
if (start)
|
||||
--- binutils.orig/binutils/objcopy.c 2021-02-22 10:44:20.107263089 +0000
|
||||
+++ binutils-2.35.1/binutils/objcopy.c 2021-02-22 16:07:12.134344229 +0000
|
||||
@@ -2243,23 +2243,8 @@ merge_gnu_build_notes (bfd * ab
|
||||
break;
|
||||
|
||||
case 8:
|
||||
- if (! is_64bit (abfd))
|
||||
- {
|
||||
- start = bfd_get_32 (abfd, pnote->note.descdata);
|
||||
- end = bfd_get_32 (abfd, pnote->note.descdata + 4);
|
||||
- }
|
||||
- else
|
||||
- {
|
||||
- start = bfd_get_64 (abfd, pnote->note.descdata);
|
||||
- /* FIXME: For version 1 and 2 notes we should try to
|
||||
- calculate the end address by finding a symbol whose
|
||||
- value is START, and then adding in its size.
|
||||
-
|
||||
- For now though, since v1 and v2 was not intended to
|
||||
- handle gaps, we chose an artificially large end
|
||||
- address. */
|
||||
- end = (bfd_vma) -1;
|
||||
- }
|
||||
+ start = bfd_get_32 (abfd, pnote->note.descdata);
|
||||
+ end = bfd_get_32 (abfd, pnote->note.descdata + 4);
|
||||
break;
|
||||
|
||||
case 16:
|
||||
@ -0,0 +1,16 @@
|
||||
--- binutils.orig/binutils/testsuite/lib/binutils-common.exp 2024-06-27 12:43:48.892438898 +0100
|
||||
+++ binutils-2.35.2/binutils/testsuite/lib/binutils-common.exp 2024-06-27 12:45:12.134877825 +0100
|
||||
@@ -523,8 +523,13 @@ proc prune_warnings_extra { text } {
|
||||
# The "\\1" is to try to preserve a "\n" but only if necessary.
|
||||
regsub -all "(^|\n)(\[^\n\]*: warning:\[^\n\]*unsupported GNU_PROPERTY_TYPE\[^\n\]*\n?)+" $text "\\1" text
|
||||
}
|
||||
+
|
||||
# PR binutils/23898: It is OK to have gaps in build notes.
|
||||
regsub -all "(^|\n)(\[^\n\]*: Warning: Gap in build notes detected from\[^\n\]*\n?)+" $text "\\1" text
|
||||
+
|
||||
+ # Ignore LTO warnings triggered by configuring with --enable-pgo-build=lto.
|
||||
+ regsub -all "(^|\n)(\[^\n\]*lto-wrapper: warning: using serial compilation of \[0-9\]+ LTRANS jobs\[^\n\]*\n?)+" $text "\\1" text
|
||||
+
|
||||
return $text
|
||||
}
|
||||
|
||||
@ -0,0 +1,19 @@
|
||||
--- binutils.orig/binutils/readelf.c 2021-02-22 10:44:20.142262864 +0000
|
||||
+++ binutils-2.35.1/binutils/readelf.c 2021-02-22 10:45:25.646842120 +0000
|
||||
@@ -19285,6 +19285,7 @@ print_gnu_build_attribute_description (E
|
||||
|
||||
if (is_open_attr)
|
||||
{
|
||||
+#if 0 /* Suppressed because these gaps are no longer significant. */
|
||||
/* FIXME: Need to properly allow for section alignment.
|
||||
16 is just the alignment used on x86_64. */
|
||||
if (global_end > 0
|
||||
@@ -19295,7 +19296,7 @@ print_gnu_build_attribute_description (E
|
||||
&& same_section (filedata, start, global_end))
|
||||
warn (_("Gap in build notes detected from %#lx to %#lx\n"),
|
||||
global_end + 1, start - 1);
|
||||
-
|
||||
+#endif
|
||||
printf (_(" Applies to region from %#lx"), start);
|
||||
global_offset = start;
|
||||
|
||||
@ -0,0 +1,35 @@
|
||||
--- binutils.orig/binutils/readelf.c 2020-07-24 15:08:30.317597020 +0100
|
||||
+++ binutils-2.35/binutils/readelf.c 2020-07-24 15:09:39.029155552 +0100
|
||||
@@ -12069,11 +12069,13 @@ print_dynamic_symbol (Filedata *filedata
|
||||
unsigned int vis = ELF_ST_VISIBILITY (psym->st_other);
|
||||
|
||||
printf (" %-7s", get_symbol_visibility (vis));
|
||||
+#if 0
|
||||
/* Check to see if any other bits in the st_other field are set.
|
||||
Note - displaying this information disrupts the layout of the
|
||||
table being generated, but for the moment this case is very rare. */
|
||||
if (psym->st_other ^ vis)
|
||||
printf (" [%s] ", get_symbol_other (filedata, psym->st_other ^ vis));
|
||||
+#endif
|
||||
}
|
||||
printf (" %4s ", get_symbol_index_type (filedata, psym->st_shndx));
|
||||
|
||||
@@ -12112,7 +12114,17 @@ print_dynamic_symbol (Filedata *filedata
|
||||
version_string);
|
||||
}
|
||||
|
||||
- putchar ('\n');
|
||||
+#if 1
|
||||
+ {
|
||||
+ unsigned int vis = ELF_ST_VISIBILITY (psym->st_other);
|
||||
+
|
||||
+ /* Check to see if any other bits in the st_other field are set. */
|
||||
+ if (psym->st_other ^ vis)
|
||||
+ printf (" \t[%s]", get_symbol_other (filedata, psym->st_other ^ vis));
|
||||
+ }
|
||||
+#endif
|
||||
+
|
||||
+ putchar ('\n');
|
||||
|
||||
if (ELF_ST_BIND (psym->st_info) == STB_LOCAL
|
||||
&& section != NULL
|
||||
@ -0,0 +1,109 @@
|
||||
--- binutils.orig/binutils/dwarf.c 2020-10-15 12:13:21.960799738 +0100
|
||||
+++ binutils-2.35.1/binutils/dwarf.c 2020-10-15 13:02:39.454692627 +0100
|
||||
@@ -10427,7 +10427,7 @@ load_separate_debug_info (const char *
|
||||
{
|
||||
warn (_("Corrupt debuglink section: %s\n"),
|
||||
xlink->name ? xlink->name : xlink->uncompressed_name);
|
||||
- return FALSE;
|
||||
+ return NULL;
|
||||
}
|
||||
|
||||
/* Attempt to locate the separate file.
|
||||
@@ -10587,7 +10587,7 @@ load_separate_debug_info (const char *
|
||||
{
|
||||
warn (_("failed to open separate debug file: %s\n"), debug_filename);
|
||||
free (debug_filename);
|
||||
- return FALSE;
|
||||
+ return NULL;
|
||||
}
|
||||
|
||||
/* FIXME: We do not check to see if there are any other separate debug info
|
||||
@@ -10632,6 +10632,52 @@ load_dwo_file (const char * main_filenam
|
||||
return separate_handle;
|
||||
}
|
||||
|
||||
+/* Load a debuglink section and/or a debugaltlink section, if either are present.
|
||||
+ Recursively check the loaded files for more of these sections.
|
||||
+ FIXME: Should also check for DWO_* entries in the newlu loaded files. */
|
||||
+
|
||||
+static void
|
||||
+check_for_and_load_links (void * file, const char * filename)
|
||||
+{
|
||||
+ void * handle = NULL;
|
||||
+
|
||||
+ if (load_debug_section (gnu_debugaltlink, file))
|
||||
+ {
|
||||
+ Build_id_data build_id_data;
|
||||
+
|
||||
+ handle = load_separate_debug_info (filename,
|
||||
+ & debug_displays[gnu_debugaltlink].section,
|
||||
+ parse_gnu_debugaltlink,
|
||||
+ check_gnu_debugaltlink,
|
||||
+ & build_id_data,
|
||||
+ file);
|
||||
+ if (handle)
|
||||
+ {
|
||||
+ assert (handle == first_separate_info->handle);
|
||||
+ check_for_and_load_links (first_separate_info->handle,
|
||||
+ first_separate_info->filename);
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ if (load_debug_section (gnu_debuglink, file))
|
||||
+ {
|
||||
+ unsigned long crc32;
|
||||
+
|
||||
+ handle = load_separate_debug_info (filename,
|
||||
+ & debug_displays[gnu_debuglink].section,
|
||||
+ parse_gnu_debuglink,
|
||||
+ check_gnu_debuglink,
|
||||
+ & crc32,
|
||||
+ file);
|
||||
+ if (handle)
|
||||
+ {
|
||||
+ assert (handle == first_separate_info->handle);
|
||||
+ check_for_and_load_links (first_separate_info->handle,
|
||||
+ first_separate_info->filename);
|
||||
+ }
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
/* Load the separate debug info file(s) attached to FILE, if any exist.
|
||||
Returns TRUE if any were found, FALSE otherwise.
|
||||
If TRUE is returned then the linked list starting at first_separate_info
|
||||
@@ -10707,34 +10753,10 @@ load_separate_debug_files (void * file,
|
||||
return FALSE;
|
||||
|
||||
/* FIXME: We do not check for the presence of both link sections in the same file. */
|
||||
- /* FIXME: We do not check the separate debug info file to see if it too contains debuglinks. */
|
||||
/* FIXME: We do not check for the presence of multiple, same-name debuglink sections. */
|
||||
/* FIXME: We do not check for the presence of a dwo link as well as a debuglink. */
|
||||
|
||||
- if (load_debug_section (gnu_debugaltlink, file))
|
||||
- {
|
||||
- Build_id_data * build_id_data;
|
||||
-
|
||||
- load_separate_debug_info (filename,
|
||||
- & debug_displays[gnu_debugaltlink].section,
|
||||
- parse_gnu_debugaltlink,
|
||||
- check_gnu_debugaltlink,
|
||||
- & build_id_data,
|
||||
- file);
|
||||
- }
|
||||
-
|
||||
- if (load_debug_section (gnu_debuglink, file))
|
||||
- {
|
||||
- unsigned long crc32;
|
||||
-
|
||||
- load_separate_debug_info (filename,
|
||||
- & debug_displays[gnu_debuglink].section,
|
||||
- parse_gnu_debuglink,
|
||||
- check_gnu_debuglink,
|
||||
- & crc32,
|
||||
- file);
|
||||
- }
|
||||
-
|
||||
+ check_for_and_load_links (file, filename);
|
||||
if (first_separate_info != NULL)
|
||||
return TRUE;
|
||||
|
||||
@ -0,0 +1,15 @@
|
||||
--- binutils.orig/bfd/elf.c 2024-07-25 09:01:36.091804849 +0100
|
||||
+++ binutils-2.35.2/bfd/elf.c 2024-07-25 09:02:22.645006725 +0100
|
||||
@@ -2759,6 +2759,12 @@ static const struct bfd_elf_special_sect
|
||||
{ STRING_COMMA_LEN (".rodata"), -2, SHT_PROGBITS, SHF_ALLOC },
|
||||
{ STRING_COMMA_LEN (".rodata1"), 0, SHT_PROGBITS, SHF_ALLOC },
|
||||
{ STRING_COMMA_LEN (".rela"), -1, SHT_RELA, 0 },
|
||||
+ /* .relro_padding is generated by lld. It should not be confused with a
|
||||
+ reloc containing section, because otherwise elf_fake_sections() will
|
||||
+ set the entsize to 8, which may not be an actual multiple of the
|
||||
+ section's size.
|
||||
+ Note - this entry must appear before the ".rel" entry below. */
|
||||
+ { STRING_COMMA_LEN (".relro_padding"), 0, SHT_NOBITS, SHF_ALLOC | SHF_WRITE },
|
||||
{ STRING_COMMA_LEN (".rel"), -1, SHT_REL, 0 },
|
||||
{ NULL, 0, 0, 0, 0 }
|
||||
};
|
||||
@ -0,0 +1,140 @@
|
||||
diff -rup binutils.orig/ld/ldexp.c binutils-2.35.2/ld/ldexp.c
|
||||
--- binutils.orig/ld/ldexp.c 2024-07-11 14:49:42.844809806 +0100
|
||||
+++ binutils-2.35.2/ld/ldexp.c 2024-07-11 15:36:22.841888968 +0100
|
||||
@@ -468,7 +468,8 @@ fold_segment_align (seg_align_type *seg,
|
||||
}
|
||||
else
|
||||
{
|
||||
- expld.result.value += expld.dot & (maxpage - 1);
|
||||
+ if (!link_info.relro)
|
||||
+ expld.result.value += expld.dot & (maxpage - 1);
|
||||
if (seg->phase == exp_seg_done)
|
||||
{
|
||||
/* OK. */
|
||||
@@ -477,8 +478,9 @@ fold_segment_align (seg_align_type *seg,
|
||||
{
|
||||
seg->phase = exp_seg_align_seen;
|
||||
seg->base = expld.result.value;
|
||||
- seg->pagesize = commonpage;
|
||||
+ seg->commonpagesize = commonpage;
|
||||
seg->maxpagesize = maxpage;
|
||||
+ seg->relropagesize = maxpage;
|
||||
seg->relro_end = 0;
|
||||
}
|
||||
else
|
||||
@@ -507,10 +509,10 @@ fold_segment_relro_end (seg_align_type *
|
||||
seg->relro_end = lhs->value + expld.result.value;
|
||||
|
||||
if (seg->phase == exp_seg_relro_adjust
|
||||
- && (seg->relro_end & (seg->pagesize - 1)))
|
||||
+ && (seg->relro_end & (seg->relropagesize - 1)))
|
||||
{
|
||||
- seg->relro_end += seg->pagesize - 1;
|
||||
- seg->relro_end &= ~(seg->pagesize - 1);
|
||||
+ seg->relro_end += seg->relropagesize - 1;
|
||||
+ seg->relro_end &= ~(seg->relropagesize - 1);
|
||||
expld.result.value = seg->relro_end - expld.result.value;
|
||||
}
|
||||
else
|
||||
Only in binutils-2.35.2/ld: ldexp.c.orig
|
||||
diff -rup binutils.orig/ld/ldexp.h binutils-2.35.2/ld/ldexp.h
|
||||
--- binutils.orig/ld/ldexp.h 2024-07-11 14:49:42.845809808 +0100
|
||||
+++ binutils-2.35.2/ld/ldexp.h 2024-07-11 15:36:22.841888968 +0100
|
||||
@@ -136,7 +136,10 @@ enum relro_enum {
|
||||
typedef struct {
|
||||
enum phase_enum phase;
|
||||
|
||||
- bfd_vma base, relro_offset, relro_end, end, pagesize, maxpagesize;
|
||||
+ bfd_vma base, relro_offset, relro_end, end;
|
||||
+ /* MAXPAGESIZE and COMMMONPAGESIZE as passed to DATA_SEGMENT_ALIGN.
|
||||
+ relropagesize sets the alignment of the end of the relro segment. */
|
||||
+ bfd_vma maxpagesize, commonpagesize, relropagesize;
|
||||
|
||||
enum relro_enum relro;
|
||||
|
||||
diff -rup binutils.orig/ld/ldlang.c binutils-2.35.2/ld/ldlang.c
|
||||
--- binutils.orig/ld/ldlang.c 2024-07-11 14:49:42.968810127 +0100
|
||||
+++ binutils-2.35.2/ld/ldlang.c 2024-07-11 15:36:22.842888972 +0100
|
||||
@@ -6251,12 +6251,12 @@ lang_size_segment (seg_align_type *seg)
|
||||
a page could be saved in the data segment. */
|
||||
bfd_vma first, last;
|
||||
|
||||
- first = -seg->base & (seg->pagesize - 1);
|
||||
- last = seg->end & (seg->pagesize - 1);
|
||||
+ first = -seg->base & (seg->commonpagesize - 1);
|
||||
+ last = seg->end & (seg->commonpagesize - 1);
|
||||
if (first && last
|
||||
- && ((seg->base & ~(seg->pagesize - 1))
|
||||
- != (seg->end & ~(seg->pagesize - 1)))
|
||||
- && first + last <= seg->pagesize)
|
||||
+ && ((seg->base & ~(seg->commonpagesize - 1))
|
||||
+ != (seg->end & ~(seg->commonpagesize - 1)))
|
||||
+ && first + last <= seg->commonpagesize)
|
||||
{
|
||||
seg->phase = exp_seg_adjust;
|
||||
return TRUE;
|
||||
@@ -6273,8 +6273,7 @@ lang_size_relro_segment_1 (seg_align_typ
|
||||
asection *sec;
|
||||
|
||||
/* Compute the expected PT_GNU_RELRO/PT_LOAD segment end. */
|
||||
- relro_end = ((seg->relro_end + seg->pagesize - 1)
|
||||
- & ~(seg->pagesize - 1));
|
||||
+ relro_end = (seg->relro_end + seg->relropagesize - 1) & -seg->relropagesize;
|
||||
|
||||
/* Adjust by the offset arg of XXX_SEGMENT_RELRO_END. */
|
||||
desired_end = relro_end - seg->relro_offset;
|
||||
Only in binutils-2.35.2/ld: ldlang.c.orig
|
||||
diff -rup binutils.orig/ld/emultempl/elf-x86.em binutils-2.35.2/ld/emultempl/elf-x86.em
|
||||
--- binutils.orig/ld/emultempl/elf-x86.em 2024-07-12 10:24:52.597889981 +0100
|
||||
+++ binutils-2.35.2/ld/emultempl/elf-x86.em 2024-07-12 10:25:12.134935407 +0100
|
||||
@@ -33,6 +33,7 @@ static struct elf_linker_x86_params para
|
||||
static void
|
||||
elf_x86_create_output_section_statements (void)
|
||||
{
|
||||
+ config.relro_use_commonpagesize = TRUE;
|
||||
_bfd_elf_linker_x86_set_options (&link_info, ¶ms);
|
||||
}
|
||||
|
||||
diff -rup binutils.orig/ld/ld.h binutils-2.35.2/ld/ld.h
|
||||
--- binutils.orig/ld/ld.h 2024-07-12 10:24:52.620890034 +0100
|
||||
+++ binutils-2.35.2/ld/ld.h 2024-07-12 10:25:12.135935409 +0100
|
||||
@@ -280,6 +280,10 @@ typedef struct
|
||||
/* If set, code and non-code sections should never be in one segment. */
|
||||
bfd_boolean separate_code;
|
||||
|
||||
+ /* TRUE if the end of the relro segment should be aligned to
|
||||
+ COMMONPAGESIZE rather than MAXPAGESIZE. */
|
||||
+ bfd_boolean relro_use_commonpagesize;
|
||||
+
|
||||
/* The rpath separation character. Usually ':'. */
|
||||
char rpath_separator;
|
||||
|
||||
Only in binutils-2.35.2/ld: ld.h.orig
|
||||
diff -rup binutils.orig/ld/ldexp.c binutils-2.35.2/ld/ldexp.c
|
||||
--- binutils.orig/ld/ldexp.c 2024-07-12 10:24:53.077891097 +0100
|
||||
+++ binutils-2.35.2/ld/ldexp.c 2024-07-12 10:25:12.136935412 +0100
|
||||
@@ -480,7 +480,10 @@ fold_segment_align (seg_align_type *seg,
|
||||
seg->base = expld.result.value;
|
||||
seg->commonpagesize = commonpage;
|
||||
seg->maxpagesize = maxpage;
|
||||
- seg->relropagesize = maxpage;
|
||||
+ if (config.relro_use_commonpagesize)
|
||||
+ seg->relropagesize = commonpage;
|
||||
+ else
|
||||
+ seg->relropagesize = maxpage;
|
||||
seg->relro_end = 0;
|
||||
}
|
||||
else
|
||||
Only in binutils-2.35.2/ld: ldexp.c.orig
|
||||
diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr18176.d binutils-2.35.2/ld/testsuite/ld-x86-64/pr18176.d
|
||||
--- binutils.orig/ld/testsuite/ld-x86-64/pr18176.d 2024-07-12 10:24:52.988890890 +0100
|
||||
+++ binutils-2.35.2/ld/testsuite/ld-x86-64/pr18176.d 2024-07-12 10:25:12.136935412 +0100
|
||||
@@ -3,6 +3,7 @@
|
||||
#ld: -melf_x86_64 -shared -z relro -T pr18176.t -z max-page-size=0x200000 -z common-page-size=0x1000
|
||||
#readelf: -l --wide
|
||||
#target: x86_64-*-linux*
|
||||
+#xfail: *-*-*
|
||||
|
||||
#...
|
||||
GNU_RELRO 0x04bd17 0x000000000024bd17 0x000000000024bd17 0x0022e9 0x0022e9 R 0x1
|
||||
Only in binutils-2.35.2/ld/testsuite/ld-x86-64: pr18176.d.orig
|
||||
@ -1,239 +0,0 @@
|
||||
diff -rupN binutils.orig/bfd/elfnn-riscv.c binutils-2.41/bfd/elfnn-riscv.c
|
||||
--- binutils.orig/bfd/elfnn-riscv.c 2024-01-02 17:35:07.412218130 +0000
|
||||
+++ binutils-2.41/bfd/elfnn-riscv.c 2024-01-02 17:36:52.274311071 +0000
|
||||
@@ -1737,7 +1737,10 @@ perform_relocation (const reloc_howto_ty
|
||||
{
|
||||
if (howto->pc_relative)
|
||||
value -= sec_addr (input_section) + rel->r_offset;
|
||||
- value += rel->r_addend;
|
||||
+
|
||||
+ /* PR31179, ignore the non-zero addend of R_RISCV_SUB_ULEB128. */
|
||||
+ if (ELFNN_R_TYPE (rel->r_info) != R_RISCV_SUB_ULEB128)
|
||||
+ value += rel->r_addend;
|
||||
|
||||
switch (ELFNN_R_TYPE (rel->r_info))
|
||||
{
|
||||
@@ -1818,10 +1821,7 @@ perform_relocation (const reloc_howto_ty
|
||||
value = ENCODE_CITYPE_LUI_IMM (RISCV_CONST_HIGH_PART (value));
|
||||
break;
|
||||
|
||||
- /* SUB_ULEB128 must be applied after SET_ULEB128, so we only write the
|
||||
- value back for SUB_ULEB128 should be enough. */
|
||||
- case R_RISCV_SET_ULEB128:
|
||||
- break;
|
||||
+ /* R_RISCV_SET_ULEB128 won't go into here. */
|
||||
case R_RISCV_SUB_ULEB128:
|
||||
{
|
||||
unsigned int len = 0;
|
||||
@@ -2514,7 +2514,7 @@ riscv_elf_relocate_section (bfd *output_
|
||||
else
|
||||
{
|
||||
msg = ("Mismatched R_RISCV_SET_ULEB128, it must be paired with"
|
||||
- "and applied before R_RISCV_SUB_ULEB128");
|
||||
+ " and applied before R_RISCV_SUB_ULEB128");
|
||||
r = bfd_reloc_dangerous;
|
||||
}
|
||||
break;
|
||||
@@ -2523,14 +2523,40 @@ riscv_elf_relocate_section (bfd *output_
|
||||
if (uleb128_set_rel != NULL
|
||||
&& uleb128_set_rel->r_offset == rel->r_offset)
|
||||
{
|
||||
- relocation = uleb128_set_vma - relocation;
|
||||
+ relocation = uleb128_set_vma - relocation
|
||||
+ + uleb128_set_rel->r_addend;
|
||||
uleb128_set_vma = 0;
|
||||
uleb128_set_rel = NULL;
|
||||
+
|
||||
+ /* PR31179, the addend of SUB_ULEB128 should be zero if using
|
||||
+ .uleb128, but we make it non-zero by accident in assembler,
|
||||
+ so just ignore it in perform_relocation, and make assembler
|
||||
+ continue doing the right thing. Don't reset the addend of
|
||||
+ SUB_ULEB128 to zero here since it will break the --emit-reloc,
|
||||
+ even though the non-zero addend is unexpected.
|
||||
+
|
||||
+ We encourage people to rebuild their stuff to get the
|
||||
+ non-zero addend of SUB_ULEB128, but that might need some
|
||||
+ times, so report warnings to inform people need to rebuild
|
||||
+ if --check-uleb128 is enabled. However, since the failed
|
||||
+ .reloc cases for ADD/SET/SUB/ULEB128 are rarely to use, it
|
||||
+ may acceptable that stop supproting them until people rebuld
|
||||
+ their stuff, maybe half-year or one year later. I believe
|
||||
+ this might be the least harmful option that we should go.
|
||||
+
|
||||
+ Or maybe we should teach people that don't write the
|
||||
+ .reloc R_RISCV_SUB* with non-zero constant, and report
|
||||
+ warnings/errors in assembler. */
|
||||
+ if (htab->params->check_uleb128
|
||||
+ && rel->r_addend != 0)
|
||||
+ _bfd_error_handler (_("%pB: warning: R_RISCV_SUB_ULEB128 with"
|
||||
+ " non-zero addend, please rebuild by"
|
||||
+ " Fedora 40 binutils or up"), input_bfd);
|
||||
}
|
||||
else
|
||||
{
|
||||
msg = ("Mismatched R_RISCV_SUB_ULEB128, it must be paired with"
|
||||
- "and applied after R_RISCV_SET_ULEB128");
|
||||
+ " and applied after R_RISCV_SET_ULEB128");
|
||||
r = bfd_reloc_dangerous;
|
||||
}
|
||||
break;
|
||||
@@ -5123,7 +5149,13 @@ _bfd_riscv_relax_section (bfd *abfd, ase
|
||||
if (h != NULL && h->type == STT_GNU_IFUNC)
|
||||
continue;
|
||||
|
||||
+ /* Maybe we should check UNDEFWEAK_NO_DYNAMIC_RELOC here? But that
|
||||
+ will break the undefweak relaxation testcases, so just make sure
|
||||
+ we won't do relaxations for linker_def symbols in short-term. */
|
||||
if (h->root.type == bfd_link_hash_undefweak
|
||||
+ /* The linker_def symbol like __ehdr_start that may be undefweak
|
||||
+ for now, but will be guaranteed to be defined later. */
|
||||
+ && !h->root.linker_def
|
||||
&& (relax_func == _bfd_riscv_relax_lui
|
||||
|| relax_func == _bfd_riscv_relax_pc))
|
||||
{
|
||||
diff -rupN binutils.orig/bfd/elfxx-riscv.h binutils-2.41/bfd/elfxx-riscv.h
|
||||
--- binutils.orig/bfd/elfxx-riscv.h 2024-01-02 17:35:07.412218130 +0000
|
||||
+++ binutils-2.41/bfd/elfxx-riscv.h 2024-01-02 17:35:24.252233056 +0000
|
||||
@@ -31,6 +31,8 @@ struct riscv_elf_params
|
||||
{
|
||||
/* Whether to relax code sequences to GP-relative addressing. */
|
||||
bool relax_gp;
|
||||
+ /* Whether to check if SUB_ULEB128 relocation has non-zero addend. */
|
||||
+ bool check_uleb128;
|
||||
};
|
||||
|
||||
extern void riscv_elf32_set_options (struct bfd_link_info *,
|
||||
diff -rupN binutils.orig/ld/NEWS binutils-2.41/ld/NEWS
|
||||
--- binutils.orig/ld/NEWS 2024-01-02 17:35:08.012218662 +0000
|
||||
+++ binutils-2.41/ld/NEWS 2024-01-02 17:35:56.139261318 +0000
|
||||
@@ -1,5 +1,10 @@
|
||||
-*- text -*-
|
||||
|
||||
+* On RISC-V, add ld target option --[no-]check-uleb128. Should rebuild the
|
||||
+ objects by binutils 2.42 and up if enabling the option and get warnings,
|
||||
+ since the non-zero addend of SUB_ULEB128 shouldn't be generated from .uleb128
|
||||
+ directives.
|
||||
+
|
||||
* Added --warn-execstack-objects to warn about executable stacks only when an
|
||||
input object file requests one. Also added --error-execstack and
|
||||
--error-rxw-segments options to convert warnings about executable stacks and
|
||||
diff -rupN binutils.orig/ld/emultempl/riscvelf.em binutils-2.41/ld/emultempl/riscvelf.em
|
||||
--- binutils.orig/ld/emultempl/riscvelf.em 2024-01-02 17:35:07.699218385 +0000
|
||||
+++ binutils-2.41/ld/emultempl/riscvelf.em 2024-01-02 17:35:24.252233056 +0000
|
||||
@@ -25,7 +25,8 @@ fragment <<EOF
|
||||
#include "elf/riscv.h"
|
||||
#include "elfxx-riscv.h"
|
||||
|
||||
-static struct riscv_elf_params params = { .relax_gp = 1 };
|
||||
+static struct riscv_elf_params params = { .relax_gp = 1,
|
||||
+ .check_uleb128 = 0};
|
||||
EOF
|
||||
|
||||
# Define some shell vars to insert bits of code into the standard elf
|
||||
@@ -35,17 +36,23 @@ enum risccv_opt
|
||||
{
|
||||
OPTION_RELAX_GP = 321,
|
||||
OPTION_NO_RELAX_GP,
|
||||
+ OPTION_CHECK_ULEB128,
|
||||
+ OPTION_NO_CHECK_ULEB128,
|
||||
};
|
||||
'
|
||||
|
||||
PARSE_AND_LIST_LONGOPTS=${PARSE_AND_LIST_LONGOPTS}'
|
||||
{ "relax-gp", no_argument, NULL, OPTION_RELAX_GP },
|
||||
{ "no-relax-gp", no_argument, NULL, OPTION_NO_RELAX_GP },
|
||||
+ { "check-uleb128", no_argument, NULL, OPTION_CHECK_ULEB128 },
|
||||
+ { "no-check-uleb128", no_argument, NULL, OPTION_NO_CHECK_ULEB128 },
|
||||
'
|
||||
|
||||
PARSE_AND_LIST_OPTIONS=${PARSE_AND_LIST_OPTIONS}'
|
||||
fprintf (file, _(" --relax-gp Perform GP relaxation\n"));
|
||||
fprintf (file, _(" --no-relax-gp Don'\''t perform GP relaxation\n"));
|
||||
+ fprintf (file, _(" --check-uleb128 Check if SUB_ULEB128 has non-zero addend\n"));
|
||||
+ fprintf (file, _(" --no-check-uleb128 Don'\''t check if SUB_ULEB128 has non-zero addend\n"));
|
||||
'
|
||||
|
||||
PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LIST_ARGS_CASES}'
|
||||
@@ -56,6 +63,14 @@ PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LI
|
||||
case OPTION_NO_RELAX_GP:
|
||||
params.relax_gp = 0;
|
||||
break;
|
||||
+
|
||||
+ case OPTION_CHECK_ULEB128:
|
||||
+ params.check_uleb128 = 1;
|
||||
+ break;
|
||||
+
|
||||
+ case OPTION_NO_CHECK_ULEB128:
|
||||
+ params.check_uleb128 = 0;
|
||||
+ break;
|
||||
'
|
||||
|
||||
fragment <<EOF
|
||||
diff -rupN binutils.orig/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp binutils-2.41/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
|
||||
--- binutils.orig/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp 2024-01-02 17:35:07.942218600 +0000
|
||||
+++ binutils-2.41/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp 2024-01-02 17:35:24.252233056 +0000
|
||||
@@ -173,6 +173,8 @@ if [istarget "riscv*-*-*"] {
|
||||
run_dump_test "attr-phdr"
|
||||
run_dump_test "relax-max-align-gp"
|
||||
run_dump_test "uleb128"
|
||||
+ run_dump_test "pr31179"
|
||||
+ run_dump_test "pr31179-r"
|
||||
run_ld_link_tests [list \
|
||||
[list "Weak reference 32" "-T weakref.ld -m[riscv_choose_ilp32_emul]" "" \
|
||||
"-march=rv32i -mabi=ilp32" {weakref32.s} \
|
||||
diff -rupN binutils.orig/ld/testsuite/ld-riscv-elf/pr31179-r.d binutils-2.41/ld/testsuite/ld-riscv-elf/pr31179-r.d
|
||||
--- binutils.orig/ld/testsuite/ld-riscv-elf/pr31179-r.d 1970-01-01 01:00:00.000000000 +0100
|
||||
+++ binutils-2.41/ld/testsuite/ld-riscv-elf/pr31179-r.d 2024-01-02 17:35:24.252233056 +0000
|
||||
@@ -0,0 +1,10 @@
|
||||
+#source: pr31179.s
|
||||
+#as:
|
||||
+#readelf: -Wr
|
||||
+
|
||||
+Relocation section '.rela.text' at .*
|
||||
+[ ]+Offset[ ]+Info[ ]+Type[ ]+.*
|
||||
+[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_SET_ULEB128[ ]+[0-9a-f]+[ ]+bar \+ 1
|
||||
+[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_SUB_ULEB128[ ]+[0-9a-f]+[ ]+foo \+ 0
|
||||
+[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_SET_ULEB128[ ]+[0-9a-f]+[ ]+bar \+ 1
|
||||
+[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_SUB_ULEB128[ ]+[0-9a-f]+[ ]+foo \+ 1
|
||||
diff -rupN binutils.orig/ld/testsuite/ld-riscv-elf/pr31179.d binutils-2.41/ld/testsuite/ld-riscv-elf/pr31179.d
|
||||
--- binutils.orig/ld/testsuite/ld-riscv-elf/pr31179.d 1970-01-01 01:00:00.000000000 +0100
|
||||
+++ binutils-2.41/ld/testsuite/ld-riscv-elf/pr31179.d 2024-01-02 17:35:24.252233056 +0000
|
||||
@@ -0,0 +1,11 @@
|
||||
+#source: pr31179.s
|
||||
+#as:
|
||||
+#ld: --check-uleb128
|
||||
+#objdump: -sj .text
|
||||
+#warning: .*R_RISCV_SUB_ULEB128 with non-zero addend, please rebuild by Fedora 40 binutils or up
|
||||
+
|
||||
+.*:[ ]+file format .*
|
||||
+
|
||||
+Contents of section .text:
|
||||
+
|
||||
+[ ]+[0-9a-f]+[ ]+00000303[ ]+.*
|
||||
diff -rupN binutils.orig/ld/testsuite/ld-riscv-elf/pr31179.s binutils-2.41/ld/testsuite/ld-riscv-elf/pr31179.s
|
||||
--- binutils.orig/ld/testsuite/ld-riscv-elf/pr31179.s 1970-01-01 01:00:00.000000000 +0100
|
||||
+++ binutils-2.41/ld/testsuite/ld-riscv-elf/pr31179.s 2024-01-02 17:35:24.252233056 +0000
|
||||
@@ -0,0 +1,13 @@
|
||||
+.globl _start
|
||||
+_start:
|
||||
+
|
||||
+foo:
|
||||
+.2byte 0
|
||||
+bar:
|
||||
+
|
||||
+.uleb128 bar - foo + 1
|
||||
+
|
||||
+reloc:
|
||||
+.reloc reloc, R_RISCV_SET_ULEB128, bar + 1
|
||||
+.reloc reloc, R_RISCV_SUB_ULEB128, foo + 1
|
||||
+.byte 0x0
|
||||
--- binutils.orig/gas/config/tc-riscv.c 2024-01-03 13:08:16.588286420 +0000
|
||||
+++ binutils-2.41/gas/config/tc-riscv.c 2024-01-03 13:08:32.749297812 +0000
|
||||
@@ -4949,6 +4949,7 @@ riscv_insert_uleb128_fixes (bfd *abfd AT
|
||||
fix_new_exp (fragP, fragP->fr_fix, 0,
|
||||
exp_dup, 0, BFD_RELOC_RISCV_SET_ULEB128);
|
||||
exp_dup->X_add_symbol = exp->X_op_symbol;
|
||||
+ exp_dup->X_add_number = 0; /* Set addend of SUB_ULEB128 to zero. */
|
||||
fix_new_exp (fragP, fragP->fr_fix, 0,
|
||||
exp_dup, 0, BFD_RELOC_RISCV_SUB_ULEB128);
|
||||
}
|
||||
@ -1,136 +0,0 @@
|
||||
diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/attr-phdr.d binutils-2.40/ld/testsuite/ld-riscv-elf/attr-phdr.d
|
||||
--- binutils.orig/ld/testsuite/ld-riscv-elf/attr-phdr.d 2023-02-16 10:11:38.656875289 +0000
|
||||
+++ binutils-2.40/ld/testsuite/ld-riscv-elf/attr-phdr.d 2023-02-16 10:49:26.786573665 +0000
|
||||
@@ -12,8 +12,8 @@ Program Headers:
|
||||
Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
|
||||
RISCV_ATTRIBUT .*
|
||||
LOAD .*
|
||||
-
|
||||
+#...
|
||||
Section to Segment mapping:
|
||||
Segment Sections...
|
||||
00 .riscv.attributes
|
||||
- 01 .text
|
||||
+#pass
|
||||
diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d binutils-2.40/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d
|
||||
--- binutils.orig/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d 2023-02-16 10:11:38.659875285 +0000
|
||||
+++ binutils-2.40/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d 2023-02-16 10:42:54.803431287 +0000
|
||||
@@ -8,7 +8,7 @@
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+[0-9a-f]+ <_start>:
|
||||
-.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a0,a0,[0-9]+
|
||||
+.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a0,a0,\-[0-9]+
|
||||
.*:[ ]+[0-9a-f]+[ ]+jal[ ]+ra,[0-9a-f]+ <_start>
|
||||
.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a1,gp,\-[0-9]+ # [0-9a-f]+ <data_g>
|
||||
.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a2,gp,\-[0-9]+ # [0-9a-f]+ <data_g>
|
||||
diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d binutils-2.40/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d
|
||||
--- binutils.orig/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d 2023-02-16 10:11:38.659875285 +0000
|
||||
+++ binutils-2.40/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d 2023-02-16 10:43:49.540306593 +0000
|
||||
@@ -11,5 +11,5 @@ Disassembly of section .text:
|
||||
[0-9a-f]+ <_start>:
|
||||
.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+a1.*
|
||||
.*:[ ]+[0-9a-f]+[ ]+addi?[ ]+a0,gp.*<data_a>
|
||||
-.*:[ ]+[0-9a-f]+[ ]+addi?[ ]+a1,a1.*<data_b>
|
||||
+.*:[ ]+[0-9a-f]+[ ]+mv[ ]+a1,a1
|
||||
#pass
|
||||
diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2a.d binutils-2.40/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2a.d
|
||||
--- binutils.orig/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2a.d 2023-02-16 10:11:38.659875285 +0000
|
||||
+++ binutils-2.40/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2a.d 2023-02-16 10:46:55.570899994 +0000
|
||||
@@ -2,4 +2,5 @@
|
||||
#source: pcrel-lo-addend-2a.s
|
||||
#as: -march=rv32ic
|
||||
#ld: -m[riscv_choose_ilp32_emul] --no-relax
|
||||
+#skip: *-*-*
|
||||
#error: .*dangerous relocation: %pcrel_lo overflow with an addend, the value of %pcrel_hi is 0x1000 without any addend, but may be 0x2000 after adding the %pcrel_lo addend
|
||||
diff -rup binutils.orig/ld/testsuite/ld-elf/dwarf.exp binutils-2.40/ld/testsuite/ld-elf/dwarf.exp
|
||||
--- binutils.orig/ld/testsuite/ld-elf/dwarf.exp 2023-02-16 10:11:38.515875516 +0000
|
||||
+++ binutils-2.40/ld/testsuite/ld-elf/dwarf.exp 2023-02-16 11:08:52.209377332 +0000
|
||||
@@ -29,6 +29,10 @@ if ![is_elf_format] {
|
||||
return
|
||||
}
|
||||
|
||||
+if { [istarget riscv*-*-*] } then {
|
||||
+ return
|
||||
+}
|
||||
+
|
||||
# Skip targets where -shared is not supported
|
||||
|
||||
if ![check_shared_lib_support] {
|
||||
diff -rup binutils.orig/ld/testsuite/ld-elf/tls.exp binutils-2.40/ld/testsuite/ld-elf/tls.exp
|
||||
--- binutils.orig/ld/testsuite/ld-elf/tls.exp 2023-02-16 10:11:38.540875476 +0000
|
||||
+++ binutils-2.40/ld/testsuite/ld-elf/tls.exp 2023-02-16 11:08:56.944369374 +0000
|
||||
@@ -28,6 +28,10 @@ if { !([istarget *-*-linux*]
|
||||
return
|
||||
}
|
||||
|
||||
+if { [istarget riscv*-*-*] } then {
|
||||
+ return
|
||||
+}
|
||||
+
|
||||
# Check to see if the C compiler works.
|
||||
if { ![check_compiler_available] } {
|
||||
return
|
||||
--- binutils.orig/binutils/testsuite/binutils-all/objcopy.exp 2023-08-24 07:48:30.429195480 +0100
|
||||
+++ binutils-2.41/binutils/testsuite/binutils-all/objcopy.exp 2023-08-24 07:57:05.535302711 +0100
|
||||
@@ -1409,6 +1409,8 @@ proc objcopy_test_without_global_symbol
|
||||
# The AArch64 and ARM targets preserve mapping symbols
|
||||
# in object files, so they will fail this test.
|
||||
setup_xfail aarch64*-*-* arm*-*-*
|
||||
+# The RISC-V target compiles with annotation enabled and these symbols remain after stripping.
|
||||
+setup_xfail riscv*-*-*
|
||||
|
||||
objcopy_test_without_global_symbol
|
||||
|
||||
--- binutils.orig/ld/testsuite/ld-plugin/plugin.exp 2023-08-24 07:48:31.808196076 +0100
|
||||
+++ binutils-2.41/ld/testsuite/ld-plugin/plugin.exp 2023-08-24 07:59:30.285716568 +0100
|
||||
@@ -132,6 +132,10 @@ if [is_pecoff_format] {
|
||||
append libs " --image-base=0x10000000"
|
||||
}
|
||||
|
||||
+if { [istarget riscv*-*-*] } then {
|
||||
+ return
|
||||
+}
|
||||
+
|
||||
set plugin_tests [list \
|
||||
[list "load plugin" "-plugin $plugin_path \
|
||||
$testobjfiles $libs" "" "" "" {{ld plugin-1.d}} "main.x" ] \
|
||||
--- binutils.orig/binutils/testsuite/binutils-all/compress.exp 2023-12-11 10:09:16.923374463 +0000
|
||||
+++ binutils-2.41/binutils/testsuite/binutils-all/compress.exp 2023-12-12 09:00:15.150036675 +0000
|
||||
@@ -818,6 +818,10 @@ proc test_gnu_debuglink {} {
|
||||
}
|
||||
}
|
||||
|
||||
+if { [istarget riscv*-*-*] } then {
|
||||
+ return
|
||||
+}
|
||||
+
|
||||
if {[is_elf_format]} then {
|
||||
test_gnu_debuglink
|
||||
}
|
||||
--- binutils-2.41/ld/testsuite/ld-riscv-elf/pcgp-relax-01-norelaxgp.d 2023-07-03 00:00:00.000000000 +0100
|
||||
+++ binutils.new/ld/testsuite/ld-riscv-elf/pcgp-relax-01-norelaxgp.d 2023-12-12 11:52:54.564057931 +0000
|
||||
@@ -8,10 +8,10 @@
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+[0-9a-f]+ <_start>:
|
||||
-.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a0,a0,[0-9]+
|
||||
+.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a0,a0,\-[0-9]+
|
||||
.*:[ ]+[0-9a-f]+[ ]+jal[ ]+ra,[0-9a-f]+ <_start>
|
||||
.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+a1,0x[0-9a-f]+
|
||||
-.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a1,a1,[0-9]+ # [0-9a-f]+ <data_g>
|
||||
+.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a1,a1,\-[0-9]+ # [0-9a-f]+ <data_g>
|
||||
.*:[ ]+[0-9a-f]+[ ]+lui[ ]+a2,0x[0-9a-f]+
|
||||
.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a2,a2,[0-9]+ # [0-9a-f]+ <data_g>
|
||||
.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a3,tp,0 # 0 <data_t>
|
||||
--- binutils.orig/binutils/testsuite/binutils-all/objcopy.exp 2023-12-12 14:21:10.225342926 +0000
|
||||
+++ binutils-2.41/binutils/testsuite/binutils-all/objcopy.exp 2023-12-12 14:22:12.453421499 +0000
|
||||
@@ -1410,7 +1410,7 @@ proc objcopy_test_without_global_symbol
|
||||
# in object files, so they will fail this test.
|
||||
setup_xfail aarch64*-*-* arm*-*-*
|
||||
# The RISC-V target compiles with annotation enabled and these symbols remain after stripping.
|
||||
-setup_xfail riscv*-*-*
|
||||
+# setup_xfail riscv*-*-*
|
||||
|
||||
objcopy_test_without_global_symbol
|
||||
|
||||
@ -0,0 +1,223 @@
|
||||
diff -rup binutils.orig/gas/config/tc-s390.c binutils-2.35.1/gas/config/tc-s390.c
|
||||
--- binutils.orig/gas/config/tc-s390.c 2021-02-19 11:44:24.240877612 +0000
|
||||
+++ binutils-2.35.1/gas/config/tc-s390.c 2021-02-19 11:46:05.222554434 +0000
|
||||
@@ -292,6 +292,8 @@ s390_parse_cpu (const char * arg
|
||||
{ STRING_COMMA_LEN ("z14"), STRING_COMMA_LEN ("arch12"),
|
||||
S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX },
|
||||
{ STRING_COMMA_LEN ("z15"), STRING_COMMA_LEN ("arch13"),
|
||||
+ S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX },
|
||||
+ { STRING_COMMA_LEN (""), STRING_COMMA_LEN ("arch14"),
|
||||
S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX }
|
||||
};
|
||||
static struct
|
||||
diff -rup binutils.orig/gas/doc/c-s390.texi binutils-2.35.1/gas/doc/c-s390.texi
|
||||
--- binutils.orig/gas/doc/c-s390.texi 2021-02-19 11:44:24.236877625 +0000
|
||||
+++ binutils-2.35.1/gas/doc/c-s390.texi 2021-02-19 11:46:05.223554431 +0000
|
||||
@@ -18,7 +18,7 @@ and eleven chip levels. The architecture
|
||||
Architecture (ESA) and the newer z/Architecture mode. The chip levels
|
||||
are g5 (or arch3), g6, z900 (or arch5), z990 (or arch6), z9-109, z9-ec
|
||||
(or arch7), z10 (or arch8), z196 (or arch9), zEC12 (or arch10), z13
|
||||
-(or arch11), z14 (or arch12), and z15 (or arch13).
|
||||
+(or arch11), z14 (or arch12), z15 (or arch13), or arch14.
|
||||
|
||||
@menu
|
||||
* s390 Options:: Command-line Options.
|
||||
@@ -70,8 +70,9 @@ are recognized:
|
||||
@code{z196} (or @code{arch9}),
|
||||
@code{zEC12} (or @code{arch10}),
|
||||
@code{z13} (or @code{arch11}),
|
||||
-@code{z14} (or @code{arch12}), and
|
||||
-@code{z15} (or @code{arch13}).
|
||||
+@code{z14} (or @code{arch12}),
|
||||
+@code{z15} (or @code{arch13}), and
|
||||
+@code{arch14}.
|
||||
|
||||
Assembling an instruction that is not supported on the target
|
||||
processor results in an error message.
|
||||
diff -rup binutils.orig/gas/testsuite/gas/s390/s390.exp binutils-2.35.1/gas/testsuite/gas/s390/s390.exp
|
||||
--- binutils.orig/gas/testsuite/gas/s390/s390.exp 2021-02-19 11:44:24.338877299 +0000
|
||||
+++ binutils-2.35.1/gas/testsuite/gas/s390/s390.exp 2021-02-19 11:46:05.223554431 +0000
|
||||
@@ -31,6 +31,7 @@ if [expr [istarget "s390-*-*"] || [ista
|
||||
run_dump_test "zarch-z13" "{as -m64} {as -march=z13}"
|
||||
run_dump_test "zarch-arch12" "{as -m64} {as -march=arch12}"
|
||||
run_dump_test "zarch-arch13" "{as -m64} {as -march=arch13}"
|
||||
+ run_dump_test "zarch-arch14" "{as -m64} {as -march=arch14}"
|
||||
run_dump_test "zarch-reloc" "{as -m64}"
|
||||
run_dump_test "zarch-operands" "{as -m64} {as -march=z9-109}"
|
||||
run_dump_test "zarch-machine" "{as -m64} {as -march=z900}"
|
||||
diff -rup binutils.orig/include/opcode/s390.h binutils-2.35.1/include/opcode/s390.h
|
||||
--- binutils.orig/include/opcode/s390.h 2021-02-19 11:44:23.926878617 +0000
|
||||
+++ binutils-2.35.1/include/opcode/s390.h 2021-02-19 11:46:05.223554431 +0000
|
||||
@@ -44,6 +44,7 @@ enum s390_opcode_cpu_val
|
||||
S390_OPCODE_Z13,
|
||||
S390_OPCODE_ARCH12,
|
||||
S390_OPCODE_ARCH13,
|
||||
+ S390_OPCODE_ARCH14,
|
||||
S390_OPCODE_MAXCPU
|
||||
};
|
||||
|
||||
diff -rup binutils.orig/opcodes/s390-mkopc.c binutils-2.35.1/opcodes/s390-mkopc.c
|
||||
--- binutils.orig/opcodes/s390-mkopc.c 2021-02-19 11:44:23.947878550 +0000
|
||||
+++ binutils-2.35.1/opcodes/s390-mkopc.c 2021-02-19 11:46:05.223554431 +0000
|
||||
@@ -380,6 +380,8 @@ main (void)
|
||||
else if (strcmp (cpu_string, "z15") == 0
|
||||
|| strcmp (cpu_string, "arch13") == 0)
|
||||
min_cpu = S390_OPCODE_ARCH13;
|
||||
+ else if (strcmp (cpu_string, "arch14") == 0)
|
||||
+ min_cpu = S390_OPCODE_ARCH14;
|
||||
else {
|
||||
fprintf (stderr, "Couldn't parse cpu string %s\n", cpu_string);
|
||||
exit (1);
|
||||
diff -rup binutils.orig/opcodes/s390-opc.txt binutils-2.35.1/opcodes/s390-opc.txt
|
||||
--- binutils.orig/opcodes/s390-opc.txt 2021-02-19 11:44:23.943878563 +0000
|
||||
+++ binutils-2.35.1/opcodes/s390-opc.txt 2021-02-19 11:46:05.224554428 +0000
|
||||
@@ -2000,3 +2000,31 @@ e60000000052 vcvbg VRR_RV0UU "vector con
|
||||
# Message Security Assist Extension 9
|
||||
|
||||
b93a kdsa RRE_RR "compute digital signature authentication" arch13 zarch
|
||||
+
|
||||
+
|
||||
+# arch14 instructions
|
||||
+
|
||||
+e60000000074 vschp VRR_VVV0U0U " " arch14 zarch
|
||||
+e60000002074 vschsp VRR_VVV0U0 " " arch14 zarch
|
||||
+e60000003074 vschdp VRR_VVV0U0 " " arch14 zarch
|
||||
+e60000004074 vschxp VRR_VVV0U0 " " arch14 zarch
|
||||
+e6000000007c vscshp VRR_VVV " " arch14 zarch
|
||||
+e6000000007d vcsph VRR_VVV0U0 " " arch14 zarch
|
||||
+e60000000051 vclzdp VRR_VV0U2 " " arch14 zarch
|
||||
+e60000000070 vpkzr VRI_VVV0UU2 " " arch14 zarch
|
||||
+e60000000072 vsrpr VRI_VVV0UU2 " " arch14 zarch
|
||||
+e60000000054 vupkzh VRR_VV0U2 " " arch14 zarch
|
||||
+e6000000005c vupkzl VRR_VV0U2 " " arch14 zarch
|
||||
+
|
||||
+b93b nnpa RRE_00 " " arch14 zarch
|
||||
+e60000000056 vclfnh VRR_VV0UU2 " " arch14 zarch
|
||||
+e6000000005e vclfnl VRR_VV0UU2 " " arch14 zarch
|
||||
+e60000000075 vcrnf VRR_VVV0UU " " arch14 zarch
|
||||
+e6000000005d vcfn VRR_VV0UU2 " " arch14 zarch
|
||||
+e60000000055 vcnf VRR_VV0UU2 " " arch14 zarch
|
||||
+
|
||||
+b98B rdp RRF_RURR2 " " arch14 zarch optparm
|
||||
+
|
||||
+eb0000000071 lpswey SIY_URD " " arch14 zarch
|
||||
+b200 lbear S_RD " " arch14 zarch
|
||||
+b201 stbear S_RD " " arch14 zarch
|
||||
--- /dev/null 2021-06-16 09:27:04.980898674 +0100
|
||||
+++ binutils-2.35.2/gas/testsuite/gas/s390/zarch-arch14.s 2021-06-16 12:05:43.382025025 +0100
|
||||
@@ -0,0 +1,24 @@
|
||||
+.text
|
||||
+foo:
|
||||
+ vschp %v15,%v17,%v20,13,12
|
||||
+ vschsp %v15,%v17,%v20,13
|
||||
+ vschdp %v15,%v17,%v20,13
|
||||
+ vschxp %v15,%v17,%v20,13
|
||||
+ vscshp %v15,%v17,%v20
|
||||
+ vcsph %v15,%v17,%v20,13
|
||||
+ vclzdp %v15,%v17,13
|
||||
+ vpkzr %v15,%v17,%v20,253,12
|
||||
+ vsrpr %v15,%v17,%v20,253,12
|
||||
+ vupkzh %v15,%v17,13
|
||||
+ vupkzl %v15,%v17,13
|
||||
+ nnpa
|
||||
+ vclfnh %v15,%v17,13,12
|
||||
+ vclfnl %v15,%v17,13,12
|
||||
+ vcrnf %v15,%v17,%v20,13,12
|
||||
+ vcfn %v15,%v17,13,12
|
||||
+ vcnf %v15,%v17,13,12
|
||||
+ rdp %r6,%r9,%r11
|
||||
+ rdp %r6,%r9,%r11,13
|
||||
+ lpswey -10000(%r6),253
|
||||
+ lbear 4000(%r6)
|
||||
+ stbear 4000(%r6)
|
||||
--- /dev/null 2021-06-16 09:27:04.980898674 +0100
|
||||
+++ binutils-2.35.2/gas/testsuite/gas/s390/zarch-arch14.d 2021-06-16 12:05:43.367025112 +0100
|
||||
@@ -0,0 +1,31 @@
|
||||
+#name: s390x opcode
|
||||
+#objdump: -dr
|
||||
+
|
||||
+.*: +file format .*
|
||||
+
|
||||
+Disassembly of section .text:
|
||||
+
|
||||
+.* <foo>:
|
||||
+.*: e6 f1 40 c0 d6 74 [ ]*vschp %v15,%v17,%v20,13,12
|
||||
+.*: e6 f1 40 d0 26 74 [ ]*vschsp %v15,%v17,%v20,13
|
||||
+.*: e6 f1 40 d0 36 74 [ ]*vschdp %v15,%v17,%v20,13
|
||||
+.*: e6 f1 40 d0 46 74 [ ]*vschxp %v15,%v17,%v20,13
|
||||
+.*: e6 f1 40 00 06 7c [ ]*vscshp %v15,%v17,%v20
|
||||
+.*: e6 f1 40 d0 06 7d [ ]*vcsph %v15,%v17,%v20,13
|
||||
+.*: e6 f1 00 d0 04 51 [ ]*vclzdp %v15,%v17,13
|
||||
+.*: e6 f1 40 cf d6 70 [ ]*vpkzr %v15,%v17,%v20,253,12
|
||||
+.*: e6 f1 40 cf d6 72 [ ]*vsrpr %v15,%v17,%v20,253,12
|
||||
+.*: e6 f1 00 d0 04 54 [ ]*vupkzh %v15,%v17,13
|
||||
+.*: e6 f1 00 d0 04 5c [ ]*vupkzl %v15,%v17,13
|
||||
+.*: b9 3b 00 00 [ ]*nnpa
|
||||
+.*: e6 f1 00 0c d4 56 [ ]*vclfnh %v15,%v17,13,12
|
||||
+.*: e6 f1 00 0c d4 5e [ ]*vclfnl %v15,%v17,13,12
|
||||
+.*: e6 f1 40 0c d6 75 [ ]*vcrnf %v15,%v17,%v20,13,12
|
||||
+.*: e6 f1 00 0c d4 5d [ ]*vcfn %v15,%v17,13,12
|
||||
+.*: e6 f1 00 0c d4 55 [ ]*vcnf %v15,%v17,13,12
|
||||
+.*: b9 8b 90 6b [ ]*rdp %r6,%r9,%r11
|
||||
+.*: b9 8b 9d 6b [ ]*rdp %r6,%r9,%r11,13
|
||||
+.*: eb fd 68 f0 fd 71 [ ]*lpswey -10000\(%r6\),253
|
||||
+.*: b2 00 6f a0 [ ]*lbear 4000\(%r6\)
|
||||
+.*: b2 01 6f a0 [ ]*stbear 4000\(%r6\)
|
||||
+.*: 07 07 [ ]*nopr %r7
|
||||
diff -rup binutils.orig/gas/testsuite/gas/s390/zarch-arch14.d binutils-2.35.2/gas/testsuite/gas/s390/zarch-arch14.d
|
||||
--- binutils.orig/gas/testsuite/gas/s390/zarch-arch14.d 2021-08-16 13:07:33.637204772 +0100
|
||||
+++ binutils-2.35.2/gas/testsuite/gas/s390/zarch-arch14.d 2021-08-16 14:26:36.576187751 +0100
|
||||
@@ -25,7 +25,8 @@ Disassembly of section .text:
|
||||
.*: e6 f1 00 0c d4 55 [ ]*vcnf %v15,%v17,13,12
|
||||
.*: b9 8b 90 6b [ ]*rdp %r6,%r9,%r11
|
||||
.*: b9 8b 9d 6b [ ]*rdp %r6,%r9,%r11,13
|
||||
-.*: eb fd 68 f0 fd 71 [ ]*lpswey -10000\(%r6\),253
|
||||
+.*: eb 00 68 f0 fd 71 [ ]*lpswey -10000\(%r6\)
|
||||
.*: b2 00 6f a0 [ ]*lbear 4000\(%r6\)
|
||||
.*: b2 01 6f a0 [ ]*stbear 4000\(%r6\)
|
||||
+.*: b2 8f 5f ff [ ]*qpaci 4095\(%r5\)
|
||||
.*: 07 07 [ ]*nopr %r7
|
||||
diff -rup binutils.orig/gas/testsuite/gas/s390/zarch-arch14.s binutils-2.35.2/gas/testsuite/gas/s390/zarch-arch14.s
|
||||
--- binutils.orig/gas/testsuite/gas/s390/zarch-arch14.s 2021-08-16 13:07:33.636204779 +0100
|
||||
+++ binutils-2.35.2/gas/testsuite/gas/s390/zarch-arch14.s 2021-08-16 14:26:36.576187751 +0100
|
||||
@@ -19,6 +19,7 @@ foo:
|
||||
vcnf %v15,%v17,13,12
|
||||
rdp %r6,%r9,%r11
|
||||
rdp %r6,%r9,%r11,13
|
||||
- lpswey -10000(%r6),253
|
||||
+ lpswey -10000(%r6)
|
||||
lbear 4000(%r6)
|
||||
stbear 4000(%r6)
|
||||
+ qpaci 4095(%r5)
|
||||
diff -rup binutils.orig/opcodes/s390-opc.c binutils-2.35.2/opcodes/s390-opc.c
|
||||
--- binutils.orig/opcodes/s390-opc.c 2021-08-16 13:07:33.358206522 +0100
|
||||
+++ binutils-2.35.2/opcodes/s390-opc.c 2021-08-16 14:26:36.600187594 +0100
|
||||
@@ -442,6 +442,7 @@ const struct s390_operand s390_operands[
|
||||
#define INSTR_RX_URRD 4, { U4_8,D_20,X_12,B_16,0,0 } /* e.g. bc */
|
||||
#define INSTR_SI_RD 4, { D_20,B_16,0,0,0,0 } /* e.g. lpsw */
|
||||
#define INSTR_SI_URD 4, { D_20,B_16,U8_8,0,0,0 } /* e.g. cli */
|
||||
+#define INSTR_SIY_RD 6, { D20_20,B_16,0,0,0,0 } /* e.g. lpswey*/
|
||||
#define INSTR_SIY_URD 6, { D20_20,B_16,U8_8,0,0,0 } /* e.g. tmy */
|
||||
#define INSTR_SIY_IRD 6, { D20_20,B_16,I8_8,0,0,0 } /* e.g. asi */
|
||||
#define INSTR_SIL_RDI 6, { D_20,B_16,I16_32,0,0,0 } /* e.g. chhsi */
|
||||
@@ -664,6 +665,7 @@ const struct s390_operand s390_operands[
|
||||
#define MASK_RX_URRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
|
||||
#define MASK_SI_RD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
|
||||
#define MASK_SI_URD { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
|
||||
+#define MASK_SIY_RD { 0xff, 0xff, 0x00, 0x00, 0x00, 0xff }
|
||||
#define MASK_SIY_URD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
|
||||
#define MASK_SIY_IRD { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
|
||||
#define MASK_SIL_RDI { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
|
||||
diff -rup binutils.orig/opcodes/s390-opc.txt binutils-2.35.2/opcodes/s390-opc.txt
|
||||
--- binutils.orig/opcodes/s390-opc.txt 2021-08-16 13:07:33.348206585 +0100
|
||||
+++ binutils-2.35.2/opcodes/s390-opc.txt 2021-08-16 14:26:36.600187594 +0100
|
||||
@@ -2041,6 +2041,8 @@ e60000000055 vcnf VRR_VV0UU2 " " arch14
|
||||
|
||||
b98B rdp RRF_RURR2 " " arch14 zarch optparm
|
||||
|
||||
-eb0000000071 lpswey SIY_URD " " arch14 zarch
|
||||
+eb0000000071 lpswey SIY_RD " " arch14 zarch
|
||||
b200 lbear S_RD " " arch14 zarch
|
||||
b201 stbear S_RD " " arch14 zarch
|
||||
+
|
||||
+b28f qpaci S_RD " " arch14 zarch
|
||||
@ -1,656 +0,0 @@
|
||||
From 9c422a59953cd6b64bc8ed5f3d6e72a180f13540 Mon Sep 17 00:00:00 2001
|
||||
From: Jens Remus <jremus@linux.ibm.com>
|
||||
Date: Thu, 23 Nov 2023 15:43:36 +0100
|
||||
Subject: [PATCH] s390: Position independent verification of relative addressing
|
||||
|
||||
Commit: c62bc28b2155
|
||||
|
||||
Opcode test cases for z/Architecture instructions that use relative
|
||||
addressing contained hardcoded offsets in the test verification
|
||||
patterns. Inserting or reordering of instructions into those test cases
|
||||
therefore required updating of those hardcoded offsets.
|
||||
|
||||
Use regular expressions with backreferences to verify results of test
|
||||
cases containing instructions with relative addressing. This makes the
|
||||
verification position independent.
|
||||
|
||||
gas/
|
||||
* testsuite/gas/s390/esa-g5.d: Make opcode test verification
|
||||
pattern position independent where possible.
|
||||
* testsuite/gas/s390/esa-z900.d: Likewise.
|
||||
* testsuite/gas/s390/zarch-z900.d: Likewise.
|
||||
* testsuite/gas/s390/zarch-z10.d: Likewise.
|
||||
* testsuite/gas/s390/zarch-z196.d: Likewise.
|
||||
* testsuite/gas/s390/zarch-zEC12.d: Likewise.
|
||||
|
||||
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
|
||||
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
|
||||
---
|
||||
gas/testsuite/gas/s390/esa-g5.d | 104 +++++------
|
||||
gas/testsuite/gas/s390/esa-z900.d | 96 +++++-----
|
||||
gas/testsuite/gas/s390/zarch-z10.d | 254 +++++++++++++--------------
|
||||
gas/testsuite/gas/s390/zarch-z196.d | 2 +-
|
||||
gas/testsuite/gas/s390/zarch-z900.d | 12 +-
|
||||
gas/testsuite/gas/s390/zarch-zEC12.d | 6 +-
|
||||
6 files changed, 237 insertions(+), 237 deletions(-)
|
||||
|
||||
diff --git a/gas/testsuite/gas/s390/esa-g5.d b/gas/testsuite/gas/s390/esa-g5.d
|
||||
index 67a971bef15..7422e88b127 100644
|
||||
--- a/gas/testsuite/gas/s390/esa-g5.d
|
||||
+++ b/gas/testsuite/gas/s390/esa-g5.d
|
||||
@@ -77,15 +77,15 @@ Disassembly of section .text:
|
||||
.*: 47 25 af ff [ ]*bh 4095\(%r5,%r10\)
|
||||
.*: 07 29 [ ]*bhr %r9
|
||||
.*: 07 f9 [ ]*br %r9
|
||||
-.*: a7 95 00 00 [ ]*bras %r9,e2 <foo\+0xe2>
|
||||
-.*: a7 65 00 00 [ ]*bras %r6,e6 <foo\+0xe6>
|
||||
-.*: a7 64 00 00 [ ]*jlh ea <foo\+0xea>
|
||||
-.*: a7 66 00 00 [ ]*brct %r6,ee <foo\+0xee>
|
||||
-.*: a7 66 00 00 [ ]*brct %r6,f2 <foo\+0xf2>
|
||||
-.*: 84 69 00 00 [ ]*brxh %r6,%r9,f6 <foo\+0xf6>
|
||||
-.*: 84 69 00 00 [ ]*brxh %r6,%r9,fa <foo\+0xfa>
|
||||
-.*: 85 69 00 00 [ ]*brxle %r6,%r9,fe <foo\+0xfe>
|
||||
-.*: 85 69 00 00 [ ]*brxle %r6,%r9,102 <foo\+0x102>
|
||||
+ *([\da-f]+): a7 95 00 00 [ ]*bras %r9,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 65 00 00 [ ]*bras %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 64 00 00 [ ]*jlh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 66 00 00 [ ]*brct %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 66 00 00 [ ]*brct %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): 84 69 00 00 [ ]*brxh %r6,%r9,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): 84 69 00 00 [ ]*brxh %r6,%r9,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): 85 69 00 00 [ ]*brxle %r6,%r9,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): 85 69 00 00 [ ]*brxle %r6,%r9,\1 <foo\+0x\1>
|
||||
.*: b2 5a 00 69 [ ]*bsa %r6,%r9
|
||||
.*: b2 58 00 69 [ ]*bsg %r6,%r9
|
||||
.*: 0b 69 [ ]*bsm %r6,%r9
|
||||
@@ -184,49 +184,49 @@ Disassembly of section .text:
|
||||
.*: b2 21 00 69 [ ]*ipte %r6,%r9
|
||||
.*: b2 29 00 69 [ ]*iske %r6,%r9
|
||||
.*: b2 23 00 69 [ ]*ivsk %r6,%r9
|
||||
-.*: a7 f4 00 00 [ ]*j 288 <foo\+0x288>
|
||||
-.*: a7 84 00 00 [ ]*je 28c <foo\+0x28c>
|
||||
-.*: a7 24 00 00 [ ]*jh 290 <foo\+0x290>
|
||||
-.*: a7 a4 00 00 [ ]*jhe 294 <foo\+0x294>
|
||||
-.*: a7 44 00 00 [ ]*jl 298 <foo\+0x298>
|
||||
-.*: a7 c4 00 00 [ ]*jle 29c <foo\+0x29c>
|
||||
-.*: a7 64 00 00 [ ]*jlh 2a0 <foo\+0x2a0>
|
||||
-.*: a7 44 00 00 [ ]*jl 2a4 <foo\+0x2a4>
|
||||
-.*: a7 74 00 00 [ ]*jne 2a8 <foo\+0x2a8>
|
||||
-.*: a7 d4 00 00 [ ]*jnh 2ac <foo\+0x2ac>
|
||||
-.*: a7 54 00 00 [ ]*jnhe 2b0 <foo\+0x2b0>
|
||||
-.*: a7 b4 00 00 [ ]*jnl 2b4 <foo\+0x2b4>
|
||||
-.*: a7 34 00 00 [ ]*jnle 2b8 <foo\+0x2b8>
|
||||
-.*: a7 94 00 00 [ ]*jnlh 2bc <foo\+0x2bc>
|
||||
-.*: a7 b4 00 00 [ ]*jnl 2c0 <foo\+0x2c0>
|
||||
-.*: a7 e4 00 00 [ ]*jno 2c4 <foo\+0x2c4>
|
||||
-.*: a7 d4 00 00 [ ]*jnh 2c8 <foo\+0x2c8>
|
||||
-.*: a7 74 00 00 [ ]*jne 2cc <foo\+0x2cc>
|
||||
-.*: a7 14 00 00 [ ]*jo 2d0 <foo\+0x2d0>
|
||||
-.*: a7 24 00 00 [ ]*jh 2d4 <foo\+0x2d4>
|
||||
-.*: a7 84 00 00 [ ]*je 2d8 <foo\+0x2d8>
|
||||
-.*: a7 04 00 00 [ ]*jnop 2dc <foo\+0x2dc>
|
||||
-.*: a7 14 00 00 [ ]*jo 2e0 <foo\+0x2e0>
|
||||
-.*: a7 24 00 00 [ ]*jh 2e4 <foo\+0x2e4>
|
||||
-.*: a7 24 00 00 [ ]*jh 2e8 <foo\+0x2e8>
|
||||
-.*: a7 34 00 00 [ ]*jnle 2ec <foo\+0x2ec>
|
||||
-.*: a7 44 00 00 [ ]*jl 2f0 <foo\+0x2f0>
|
||||
-.*: a7 44 00 00 [ ]*jl 2f4 <foo\+0x2f4>
|
||||
-.*: a7 54 00 00 [ ]*jnhe 2f8 <foo\+0x2f8>
|
||||
-.*: a7 64 00 00 [ ]*jlh 2fc <foo\+0x2fc>
|
||||
-.*: a7 74 00 00 [ ]*jne 300 <foo\+0x300>
|
||||
-.*: a7 74 00 00 [ ]*jne 304 <foo\+0x304>
|
||||
-.*: a7 84 00 00 [ ]*je 308 <foo\+0x308>
|
||||
-.*: a7 84 00 00 [ ]*je 30c <foo\+0x30c>
|
||||
-.*: a7 94 00 00 [ ]*jnlh 310 <foo\+0x310>
|
||||
-.*: a7 a4 00 00 [ ]*jhe 314 <foo\+0x314>
|
||||
-.*: a7 b4 00 00 [ ]*jnl 318 <foo\+0x318>
|
||||
-.*: a7 b4 00 00 [ ]*jnl 31c <foo\+0x31c>
|
||||
-.*: a7 c4 00 00 [ ]*jle 320 <foo\+0x320>
|
||||
-.*: a7 d4 00 00 [ ]*jnh 324 <foo\+0x324>
|
||||
-.*: a7 d4 00 00 [ ]*jnh 328 <foo\+0x328>
|
||||
-.*: a7 e4 00 00 [ ]*jno 32c <foo\+0x32c>
|
||||
-.*: a7 f4 00 00 [ ]*j 330 <foo\+0x330>
|
||||
+ *([\da-f]+): a7 f4 00 00 [ ]*j \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 84 00 00 [ ]*je \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 24 00 00 [ ]*jh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 a4 00 00 [ ]*jhe \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 44 00 00 [ ]*jl \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 c4 00 00 [ ]*jle \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 64 00 00 [ ]*jlh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 44 00 00 [ ]*jl \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 74 00 00 [ ]*jne \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 d4 00 00 [ ]*jnh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 54 00 00 [ ]*jnhe \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 b4 00 00 [ ]*jnl \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 34 00 00 [ ]*jnle \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 94 00 00 [ ]*jnlh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 b4 00 00 [ ]*jnl \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 e4 00 00 [ ]*jno \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 d4 00 00 [ ]*jnh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 74 00 00 [ ]*jne \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 14 00 00 [ ]*jo \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 24 00 00 [ ]*jh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 84 00 00 [ ]*je \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 04 00 00 [ ]*jnop \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 14 00 00 [ ]*jo \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 24 00 00 [ ]*jh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 24 00 00 [ ]*jh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 34 00 00 [ ]*jnle \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 44 00 00 [ ]*jl \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 44 00 00 [ ]*jl \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 54 00 00 [ ]*jnhe \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 64 00 00 [ ]*jlh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 74 00 00 [ ]*jne \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 74 00 00 [ ]*jne \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 84 00 00 [ ]*je \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 84 00 00 [ ]*je \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 94 00 00 [ ]*jnlh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 a4 00 00 [ ]*jhe \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 b4 00 00 [ ]*jnl \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 b4 00 00 [ ]*jnl \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 c4 00 00 [ ]*jle \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 d4 00 00 [ ]*jnh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 d4 00 00 [ ]*jnh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 e4 00 00 [ ]*jno \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 f4 00 00 [ ]*j \1 <foo\+0x\1>
|
||||
.*: ed 65 af ff 00 18 [ ]*kdb %f6,4095\(%r5,%r10\)
|
||||
.*: b3 18 00 69 [ ]*kdbr %f6,%f9
|
||||
.*: ed 65 af ff 00 08 [ ]*keb %f6,4095\(%r5,%r10\)
|
||||
diff --git a/gas/testsuite/gas/s390/esa-z900.d b/gas/testsuite/gas/s390/esa-z900.d
|
||||
index 86db0641e95..75e3a385815 100644
|
||||
--- a/gas/testsuite/gas/s390/esa-z900.d
|
||||
+++ b/gas/testsuite/gas/s390/esa-z900.d
|
||||
@@ -7,53 +7,53 @@ Disassembly of section .text:
|
||||
|
||||
.* <foo>:
|
||||
.*: c0 f4 00 00 00 00 [ ]*jg 0 <foo>
|
||||
-.*: c0 04 00 00 00 00 [ ]*jgnop 6 <foo\+0x6>
|
||||
-.*: c0 14 00 00 00 00 [ ]*jgo c <foo\+0xc>
|
||||
-.*: c0 24 00 00 00 00 [ ]*jgh 12 <foo\+0x12>
|
||||
-.*: c0 24 00 00 00 00 [ ]*jgh 18 <foo\+0x18>
|
||||
-.*: c0 34 00 00 00 00 [ ]*jgnle 1e <foo\+0x1e>
|
||||
-.*: c0 44 00 00 00 00 [ ]*jgl 24 <foo\+0x24>
|
||||
-.*: c0 44 00 00 00 00 [ ]*jgl 2a <foo\+0x2a>
|
||||
-.*: c0 54 00 00 00 00 [ ]*jgnhe 30 <foo\+0x30>
|
||||
-.*: c0 64 00 00 00 00 [ ]*jglh 36 <foo\+0x36>
|
||||
-.*: c0 74 00 00 00 00 [ ]*jgne 3c <foo\+0x3c>
|
||||
-.*: c0 74 00 00 00 00 [ ]*jgne 42 <foo\+0x42>
|
||||
-.*: c0 84 00 00 00 00 [ ]*jge 48 <foo\+0x48>
|
||||
-.*: c0 84 00 00 00 00 [ ]*jge 4e <foo\+0x4e>
|
||||
-.*: c0 94 00 00 00 00 [ ]*jgnlh 54 <foo\+0x54>
|
||||
-.*: c0 a4 00 00 00 00 [ ]*jghe 5a <foo\+0x5a>
|
||||
-.*: c0 b4 00 00 00 00 [ ]*jgnl 60 <foo\+0x60>
|
||||
-.*: c0 b4 00 00 00 00 [ ]*jgnl 66 <foo\+0x66>
|
||||
-.*: c0 c4 00 00 00 00 [ ]*jgle 6c <foo\+0x6c>
|
||||
-.*: c0 d4 00 00 00 00 [ ]*jgnh 72 <foo\+0x72>
|
||||
-.*: c0 d4 00 00 00 00 [ ]*jgnh 78 <foo\+0x78>
|
||||
-.*: c0 e4 00 00 00 00 [ ]*jgno 7e <foo\+0x7e>
|
||||
-.*: c0 f4 00 00 00 00 [ ]*jg 84 <foo\+0x84>
|
||||
-.*: c0 14 00 00 00 00 [ ]*jgo 8a <foo\+0x8a>
|
||||
-.*: c0 24 00 00 00 00 [ ]*jgh 90 <foo\+0x90>
|
||||
-.*: c0 24 00 00 00 00 [ ]*jgh 96 <foo\+0x96>
|
||||
-.*: c0 34 00 00 00 00 [ ]*jgnle 9c <foo\+0x9c>
|
||||
-.*: c0 44 00 00 00 00 [ ]*jgl a2 <foo\+0xa2>
|
||||
-.*: c0 44 00 00 00 00 [ ]*jgl a8 <foo\+0xa8>
|
||||
-.*: c0 54 00 00 00 00 [ ]*jgnhe ae <foo\+0xae>
|
||||
-.*: c0 64 00 00 00 00 [ ]*jglh b4 <foo\+0xb4>
|
||||
-.*: c0 74 00 00 00 00 [ ]*jgne ba <foo\+0xba>
|
||||
-.*: c0 74 00 00 00 00 [ ]*jgne c0 <foo\+0xc0>
|
||||
-.*: c0 84 00 00 00 00 [ ]*jge c6 <foo\+0xc6>
|
||||
-.*: c0 84 00 00 00 00 [ ]*jge cc <foo\+0xcc>
|
||||
-.*: c0 94 00 00 00 00 [ ]*jgnlh d2 <foo\+0xd2>
|
||||
-.*: c0 a4 00 00 00 00 [ ]*jghe d8 <foo\+0xd8>
|
||||
-.*: c0 b4 00 00 00 00 [ ]*jgnl de <foo\+0xde>
|
||||
-.*: c0 b4 00 00 00 00 [ ]*jgnl e4 <foo\+0xe4>
|
||||
-.*: c0 c4 00 00 00 00 [ ]*jgle ea <foo\+0xea>
|
||||
-.*: c0 d4 00 00 00 00 [ ]*jgnh f0 <foo\+0xf0>
|
||||
-.*: c0 d4 00 00 00 00 [ ]*jgnh f6 <foo\+0xf6>
|
||||
-.*: c0 e4 00 00 00 00 [ ]*jgno fc <foo\+0xfc>
|
||||
-.*: c0 f4 00 00 00 00 [ ]*jg 102 <foo\+0x102>
|
||||
-.*: c0 65 00 00 00 00 [ ]*brasl %r6,108 <foo\+0x108>
|
||||
-.*: c0 65 00 00 00 00 [ ]*brasl %r6,10e <foo\+0x10e>
|
||||
-.*: c0 65 80 00 00 00 [ ]*brasl %r6,114 <foo\+0x114>
|
||||
-.*: c0 65 80 00 00 00 [ ]*brasl %r6,11a <foo\+0x11a>
|
||||
+ *([\da-f]+): c0 04 00 00 00 00 [ ]*jgnop \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 14 00 00 00 00 [ ]*jgo \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 24 00 00 00 00 [ ]*jgh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 24 00 00 00 00 [ ]*jgh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 34 00 00 00 00 [ ]*jgnle \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 44 00 00 00 00 [ ]*jgl \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 44 00 00 00 00 [ ]*jgl \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 54 00 00 00 00 [ ]*jgnhe \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 64 00 00 00 00 [ ]*jglh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 74 00 00 00 00 [ ]*jgne \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 74 00 00 00 00 [ ]*jgne \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 84 00 00 00 00 [ ]*jge \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 84 00 00 00 00 [ ]*jge \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 94 00 00 00 00 [ ]*jgnlh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 a4 00 00 00 00 [ ]*jghe \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 b4 00 00 00 00 [ ]*jgnl \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 b4 00 00 00 00 [ ]*jgnl \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 c4 00 00 00 00 [ ]*jgle \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 d4 00 00 00 00 [ ]*jgnh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 d4 00 00 00 00 [ ]*jgnh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 e4 00 00 00 00 [ ]*jgno \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 f4 00 00 00 00 [ ]*jg \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 14 00 00 00 00 [ ]*jgo \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 24 00 00 00 00 [ ]*jgh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 24 00 00 00 00 [ ]*jgh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 34 00 00 00 00 [ ]*jgnle \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 44 00 00 00 00 [ ]*jgl \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 44 00 00 00 00 [ ]*jgl \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 54 00 00 00 00 [ ]*jgnhe \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 64 00 00 00 00 [ ]*jglh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 74 00 00 00 00 [ ]*jgne \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 74 00 00 00 00 [ ]*jgne \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 84 00 00 00 00 [ ]*jge \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 84 00 00 00 00 [ ]*jge \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 94 00 00 00 00 [ ]*jgnlh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 a4 00 00 00 00 [ ]*jghe \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 b4 00 00 00 00 [ ]*jgnl \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 b4 00 00 00 00 [ ]*jgnl \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 c4 00 00 00 00 [ ]*jgle \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 d4 00 00 00 00 [ ]*jgnh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 d4 00 00 00 00 [ ]*jgnh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 e4 00 00 00 00 [ ]*jgno \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 f4 00 00 00 00 [ ]*jg \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 65 00 00 00 00 [ ]*brasl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 65 00 00 00 00 [ ]*brasl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 65 80 00 00 00 [ ]*brasl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 65 80 00 00 00 [ ]*brasl %r6,\1 <foo\+0x\1>
|
||||
.*: c0 65 7f ff ff ff [ ]*brasl %r6,11e <foo\+0x11e>
|
||||
.*: c0 65 7f ff ff ff [ ]*brasl %r6,124 <foo\+0x124>
|
||||
.*: 01 0b [ ]*tam
|
||||
@@ -66,7 +66,7 @@ Disassembly of section .text:
|
||||
.*: b9 97 00 69 [ ]*dlr %r6,%r9
|
||||
.*: b9 98 00 69 [ ]*alcr %r6,%r9
|
||||
.*: b9 99 00 69 [ ]*slbr %r6,%r9
|
||||
-.*: c0 60 00 00 00 00 [ ]*larl %r6,14e <foo\+0x14e>
|
||||
+ *([\da-f]+): c0 60 00 00 00 00 [ ]*larl %r6,\1 <foo\+0x\1>
|
||||
.*: e3 65 af ff 00 1e [ ]*lrv %r6,4095\(%r5,%r10\)
|
||||
.*: e3 65 af ff 00 1f [ ]*lrvh %r6,4095\(%r5,%r10\)
|
||||
.*: e3 65 af ff 00 3e [ ]*strv %r6,4095\(%r5,%r10\)
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-z10.d b/gas/testsuite/gas/s390/zarch-z10.d
|
||||
index 183e98ee741..2c7c485a1a1 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-z10.d
|
||||
+++ b/gas/testsuite/gas/s390/zarch-z10.d
|
||||
@@ -10,9 +10,9 @@ Disassembly of section .text:
|
||||
.*: eb d6 65 b3 01 7a [ ]*agsi 5555\(%r6\),-42
|
||||
.*: eb d6 65 b3 01 6e [ ]*alsi 5555\(%r6\),-42
|
||||
.*: eb d6 65 b3 01 7e [ ]*algsi 5555\(%r6\),-42
|
||||
-.*: c6 6d 00 00 00 00 [ ]*crl %r6,18 <foo\+0x18>
|
||||
-.*: c6 68 00 00 00 00 [ ]*cgrl %r6,1e <foo\+0x1e>
|
||||
-.*: c6 6c 00 00 00 00 [ ]*cgfrl %r6,24 <foo\+0x24>
|
||||
+ *([\da-f]+): c6 6d 00 00 00 00 [ ]*crl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c6 68 00 00 00 00 [ ]*cgrl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c6 6c 00 00 00 00 [ ]*cgfrl %r6,\1 <foo\+0x\1>
|
||||
.*: ec 67 84 57 a0 f6 [ ]*crbnl %r6,%r7,1111\(%r8\)
|
||||
.*: ec 67 84 57 20 f6 [ ]*crbh %r6,%r7,1111\(%r8\)
|
||||
.*: ec 67 84 57 20 f6 [ ]*crbh %r6,%r7,1111\(%r8\)
|
||||
@@ -39,32 +39,32 @@ Disassembly of section .text:
|
||||
.*: ec 67 84 57 a0 e4 [ ]*cgrbnl %r6,%r7,1111\(%r8\)
|
||||
.*: ec 67 84 57 c0 e4 [ ]*cgrbnh %r6,%r7,1111\(%r8\)
|
||||
.*: ec 67 84 57 c0 e4 [ ]*cgrbnh %r6,%r7,1111\(%r8\)
|
||||
-.*: ec 67 00 00 a0 76 [ ]*crjnl %r6,%r7,c6 <foo\+0xc6>
|
||||
-.*: ec 67 00 00 20 76 [ ]*crjh %r6,%r7,cc <foo\+0xcc>
|
||||
-.*: ec 67 00 00 20 76 [ ]*crjh %r6,%r7,d2 <foo\+0xd2>
|
||||
-.*: ec 67 00 00 40 76 [ ]*crjl %r6,%r7,d8 <foo\+0xd8>
|
||||
-.*: ec 67 00 00 40 76 [ ]*crjl %r6,%r7,de <foo\+0xde>
|
||||
-.*: ec 67 00 00 60 76 [ ]*crjne %r6,%r7,e4 <foo\+0xe4>
|
||||
-.*: ec 67 00 00 60 76 [ ]*crjne %r6,%r7,ea <foo\+0xea>
|
||||
-.*: ec 67 00 00 80 76 [ ]*crje %r6,%r7,f0 <foo\+0xf0>
|
||||
-.*: ec 67 00 00 80 76 [ ]*crje %r6,%r7,f6 <foo\+0xf6>
|
||||
-.*: ec 67 00 00 a0 76 [ ]*crjnl %r6,%r7,fc <foo\+0xfc>
|
||||
-.*: ec 67 00 00 a0 76 [ ]*crjnl %r6,%r7,102 <foo\+0x102>
|
||||
-.*: ec 67 00 00 c0 76 [ ]*crjnh %r6,%r7,108 <foo\+0x108>
|
||||
-.*: ec 67 00 00 c0 76 [ ]*crjnh %r6,%r7,10e <foo\+0x10e>
|
||||
-.*: ec 67 00 00 a0 64 [ ]*cgrjnl %r6,%r7,114 <foo\+0x114>
|
||||
-.*: ec 67 00 00 20 64 [ ]*cgrjh %r6,%r7,11a <foo\+0x11a>
|
||||
-.*: ec 67 00 00 20 64 [ ]*cgrjh %r6,%r7,120 <foo\+0x120>
|
||||
-.*: ec 67 00 00 40 64 [ ]*cgrjl %r6,%r7,126 <foo\+0x126>
|
||||
-.*: ec 67 00 00 40 64 [ ]*cgrjl %r6,%r7,12c <foo\+0x12c>
|
||||
-.*: ec 67 00 00 60 64 [ ]*cgrjne %r6,%r7,132 <foo\+0x132>
|
||||
-.*: ec 67 00 00 60 64 [ ]*cgrjne %r6,%r7,138 <foo\+0x138>
|
||||
-.*: ec 67 00 00 80 64 [ ]*cgrje %r6,%r7,13e <foo\+0x13e>
|
||||
-.*: ec 67 00 00 80 64 [ ]*cgrje %r6,%r7,144 <foo\+0x144>
|
||||
-.*: ec 67 00 00 a0 64 [ ]*cgrjnl %r6,%r7,14a <foo\+0x14a>
|
||||
-.*: ec 67 00 00 a0 64 [ ]*cgrjnl %r6,%r7,150 <foo\+0x150>
|
||||
-.*: ec 67 00 00 c0 64 [ ]*cgrjnh %r6,%r7,156 <foo\+0x156>
|
||||
-.*: ec 67 00 00 c0 64 [ ]*cgrjnh %r6,%r7,15c <foo\+0x15c>
|
||||
+ *([\da-f]+): ec 67 00 00 a0 76 [ ]*crjnl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 20 76 [ ]*crjh %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 20 76 [ ]*crjh %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 40 76 [ ]*crjl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 40 76 [ ]*crjl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 60 76 [ ]*crjne %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 60 76 [ ]*crjne %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 80 76 [ ]*crje %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 80 76 [ ]*crje %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 a0 76 [ ]*crjnl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 a0 76 [ ]*crjnl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 c0 76 [ ]*crjnh %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 c0 76 [ ]*crjnh %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 a0 64 [ ]*cgrjnl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 20 64 [ ]*cgrjh %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 20 64 [ ]*cgrjh %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 40 64 [ ]*cgrjl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 40 64 [ ]*cgrjl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 60 64 [ ]*cgrjne %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 60 64 [ ]*cgrjne %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 80 64 [ ]*cgrje %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 80 64 [ ]*cgrje %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 a0 64 [ ]*cgrjnl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 a0 64 [ ]*cgrjnl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 c0 64 [ ]*cgrjnh %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 c0 64 [ ]*cgrjnh %r6,%r7,\1 <foo\+0x\1>
|
||||
.*: ec 6a 74 57 d6 fe [ ]*cibnl %r6,-42,1111\(%r7\)
|
||||
.*: ec 62 74 57 d6 fe [ ]*cibh %r6,-42,1111\(%r7\)
|
||||
.*: ec 62 74 57 d6 fe [ ]*cibh %r6,-42,1111\(%r7\)
|
||||
@@ -91,32 +91,32 @@ Disassembly of section .text:
|
||||
.*: ec 6a 74 57 d6 fc [ ]*cgibnl %r6,-42,1111\(%r7\)
|
||||
.*: ec 6c 74 57 d6 fc [ ]*cgibnh %r6,-42,1111\(%r7\)
|
||||
.*: ec 6c 74 57 d6 fc [ ]*cgibnh %r6,-42,1111\(%r7\)
|
||||
-.*: ec 6a 00 00 d6 7e [ ]*cijnl %r6,-42,1fe <foo\+0x1fe>
|
||||
-.*: ec 62 00 00 d6 7e [ ]*cijh %r6,-42,204 <foo\+0x204>
|
||||
-.*: ec 62 00 00 d6 7e [ ]*cijh %r6,-42,20a <foo\+0x20a>
|
||||
-.*: ec 64 00 00 d6 7e [ ]*cijl %r6,-42,210 <foo\+0x210>
|
||||
-.*: ec 64 00 00 d6 7e [ ]*cijl %r6,-42,216 <foo\+0x216>
|
||||
-.*: ec 66 00 00 d6 7e [ ]*cijne %r6,-42,21c <foo\+0x21c>
|
||||
-.*: ec 66 00 00 d6 7e [ ]*cijne %r6,-42,222 <foo\+0x222>
|
||||
-.*: ec 68 00 00 d6 7e [ ]*cije %r6,-42,228 <foo\+0x228>
|
||||
-.*: ec 68 00 00 d6 7e [ ]*cije %r6,-42,22e <foo\+0x22e>
|
||||
-.*: ec 6a 00 00 d6 7e [ ]*cijnl %r6,-42,234 <foo\+0x234>
|
||||
-.*: ec 6a 00 00 d6 7e [ ]*cijnl %r6,-42,23a <foo\+0x23a>
|
||||
-.*: ec 6c 00 00 d6 7e [ ]*cijnh %r6,-42,240 <foo\+0x240>
|
||||
-.*: ec 6c 00 00 d6 7e [ ]*cijnh %r6,-42,246 <foo\+0x246>
|
||||
-.*: ec 6a 00 00 d6 7c [ ]*cgijnl %r6,-42,24c <foo\+0x24c>
|
||||
-.*: ec 62 00 00 d6 7c [ ]*cgijh %r6,-42,252 <foo\+0x252>
|
||||
-.*: ec 62 00 00 d6 7c [ ]*cgijh %r6,-42,258 <foo\+0x258>
|
||||
-.*: ec 64 00 00 d6 7c [ ]*cgijl %r6,-42,25e <foo\+0x25e>
|
||||
-.*: ec 64 00 00 d6 7c [ ]*cgijl %r6,-42,264 <foo\+0x264>
|
||||
-.*: ec 66 00 00 d6 7c [ ]*cgijne %r6,-42,26a <foo\+0x26a>
|
||||
-.*: ec 66 00 00 d6 7c [ ]*cgijne %r6,-42,270 <foo\+0x270>
|
||||
-.*: ec 68 00 00 d6 7c [ ]*cgije %r6,-42,276 <foo\+0x276>
|
||||
-.*: ec 68 00 00 d6 7c [ ]*cgije %r6,-42,27c <foo\+0x27c>
|
||||
-.*: ec 6a 00 00 d6 7c [ ]*cgijnl %r6,-42,282 <foo\+0x282>
|
||||
-.*: ec 6a 00 00 d6 7c [ ]*cgijnl %r6,-42,288 <foo\+0x288>
|
||||
-.*: ec 6c 00 00 d6 7c [ ]*cgijnh %r6,-42,28e <foo\+0x28e>
|
||||
-.*: ec 6c 00 00 d6 7c [ ]*cgijnh %r6,-42,294 <foo\+0x294>
|
||||
+ *([\da-f]+): ec 6a 00 00 d6 7e [ ]*cijnl %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 62 00 00 d6 7e [ ]*cijh %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 62 00 00 d6 7e [ ]*cijh %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 64 00 00 d6 7e [ ]*cijl %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 64 00 00 d6 7e [ ]*cijl %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 66 00 00 d6 7e [ ]*cijne %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 66 00 00 d6 7e [ ]*cijne %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 68 00 00 d6 7e [ ]*cije %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 68 00 00 d6 7e [ ]*cije %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 6a 00 00 d6 7e [ ]*cijnl %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 6a 00 00 d6 7e [ ]*cijnl %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 6c 00 00 d6 7e [ ]*cijnh %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 6c 00 00 d6 7e [ ]*cijnh %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 6a 00 00 d6 7c [ ]*cgijnl %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 62 00 00 d6 7c [ ]*cgijh %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 62 00 00 d6 7c [ ]*cgijh %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 64 00 00 d6 7c [ ]*cgijl %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 64 00 00 d6 7c [ ]*cgijl %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 66 00 00 d6 7c [ ]*cgijne %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 66 00 00 d6 7c [ ]*cgijne %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 68 00 00 d6 7c [ ]*cgije %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 68 00 00 d6 7c [ ]*cgije %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 6a 00 00 d6 7c [ ]*cgijnl %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 6a 00 00 d6 7c [ ]*cgijnl %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 6c 00 00 d6 7c [ ]*cgijnh %r6,-42,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 6c 00 00 d6 7c [ ]*cgijnh %r6,-42,\1 <foo\+0x\1>
|
||||
.*: b9 72 a0 67 [ ]*crtnl %r6,%r7
|
||||
.*: b9 72 20 67 [ ]*crth %r6,%r7
|
||||
.*: b9 72 20 67 [ ]*crth %r6,%r7
|
||||
@@ -173,16 +173,16 @@ Disassembly of section .text:
|
||||
.*: e5 54 64 57 8a d0 [ ]*chhsi 1111\(%r6\),-30000
|
||||
.*: e5 5c 64 57 8a d0 [ ]*chsi 1111\(%r6\),-30000
|
||||
.*: e5 58 64 57 8a d0 [ ]*cghsi 1111\(%r6\),-30000
|
||||
-.*: c6 65 00 00 00 00 [ ]*chrl %r6,3b6 <foo\+0x3b6>
|
||||
-.*: c6 64 00 00 00 00 [ ]*cghrl %r6,3bc <foo\+0x3bc>
|
||||
+ *([\da-f]+): c6 65 00 00 00 00 [ ]*chrl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c6 64 00 00 00 00 [ ]*cghrl %r6,\1 <foo\+0x\1>
|
||||
.*: e5 55 64 57 9c 40 [ ]*clhhsi 1111\(%r6\),40000
|
||||
.*: e5 5d 64 57 9c 40 [ ]*clfhsi 1111\(%r6\),40000
|
||||
.*: e5 59 64 57 9c 40 [ ]*clghsi 1111\(%r6\),40000
|
||||
-.*: c6 6f 00 00 00 00 [ ]*clrl %r6,3d4 <foo\+0x3d4>
|
||||
-.*: c6 6a 00 00 00 00 [ ]*clgrl %r6,3da <foo\+0x3da>
|
||||
-.*: c6 6e 00 00 00 00 [ ]*clgfrl %r6,3e0 <foo\+0x3e0>
|
||||
-.*: c6 67 00 00 00 00 [ ]*clhrl %r6,3e6 <foo\+0x3e6>
|
||||
-.*: c6 66 00 00 00 00 [ ]*clghrl %r6,3ec <foo\+0x3ec>
|
||||
+ *([\da-f]+): c6 6f 00 00 00 00 [ ]*clrl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c6 6a 00 00 00 00 [ ]*clgrl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c6 6e 00 00 00 00 [ ]*clgfrl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c6 67 00 00 00 00 [ ]*clhrl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c6 66 00 00 00 00 [ ]*clghrl %r6,\1 <foo\+0x\1>
|
||||
.*: ec 67 84 57 a0 f7 [ ]*clrbnl %r6,%r7,1111\(%r8\)
|
||||
.*: ec 67 84 57 20 f7 [ ]*clrbh %r6,%r7,1111\(%r8\)
|
||||
.*: ec 67 84 57 20 f7 [ ]*clrbh %r6,%r7,1111\(%r8\)
|
||||
@@ -209,32 +209,32 @@ Disassembly of section .text:
|
||||
.*: ec 67 84 57 a0 e5 [ ]*clgrbnl %r6,%r7,1111\(%r8\)
|
||||
.*: ec 67 84 57 c0 e5 [ ]*clgrbnh %r6,%r7,1111\(%r8\)
|
||||
.*: ec 67 84 57 c0 e5 [ ]*clgrbnh %r6,%r7,1111\(%r8\)
|
||||
-.*: ec 67 00 00 a0 77 [ ]*clrjnl %r6,%r7,48e <foo\+0x48e>
|
||||
-.*: ec 67 00 00 20 77 [ ]*clrjh %r6,%r7,494 <foo\+0x494>
|
||||
-.*: ec 67 00 00 20 77 [ ]*clrjh %r6,%r7,49a <foo\+0x49a>
|
||||
-.*: ec 67 00 00 40 77 [ ]*clrjl %r6,%r7,4a0 <foo\+0x4a0>
|
||||
-.*: ec 67 00 00 40 77 [ ]*clrjl %r6,%r7,4a6 <foo\+0x4a6>
|
||||
-.*: ec 67 00 00 60 77 [ ]*clrjne %r6,%r7,4ac <foo\+0x4ac>
|
||||
-.*: ec 67 00 00 60 77 [ ]*clrjne %r6,%r7,4b2 <foo\+0x4b2>
|
||||
-.*: ec 67 00 00 80 77 [ ]*clrje %r6,%r7,4b8 <foo\+0x4b8>
|
||||
-.*: ec 67 00 00 80 77 [ ]*clrje %r6,%r7,4be <foo\+0x4be>
|
||||
-.*: ec 67 00 00 a0 77 [ ]*clrjnl %r6,%r7,4c4 <foo\+0x4c4>
|
||||
-.*: ec 67 00 00 a0 77 [ ]*clrjnl %r6,%r7,4ca <foo\+0x4ca>
|
||||
-.*: ec 67 00 00 c0 77 [ ]*clrjnh %r6,%r7,4d0 <foo\+0x4d0>
|
||||
-.*: ec 67 00 00 c0 77 [ ]*clrjnh %r6,%r7,4d6 <foo\+0x4d6>
|
||||
-.*: ec 67 00 00 a0 65 [ ]*clgrjnl %r6,%r7,4dc <foo\+0x4dc>
|
||||
-.*: ec 67 00 00 20 65 [ ]*clgrjh %r6,%r7,4e2 <foo\+0x4e2>
|
||||
-.*: ec 67 00 00 20 65 [ ]*clgrjh %r6,%r7,4e8 <foo\+0x4e8>
|
||||
-.*: ec 67 00 00 40 65 [ ]*clgrjl %r6,%r7,4ee <foo\+0x4ee>
|
||||
-.*: ec 67 00 00 40 65 [ ]*clgrjl %r6,%r7,4f4 <foo\+0x4f4>
|
||||
-.*: ec 67 00 00 60 65 [ ]*clgrjne %r6,%r7,4fa <foo\+0x4fa>
|
||||
-.*: ec 67 00 00 60 65 [ ]*clgrjne %r6,%r7,500 <foo\+0x500>
|
||||
-.*: ec 67 00 00 80 65 [ ]*clgrje %r6,%r7,506 <foo\+0x506>
|
||||
-.*: ec 67 00 00 80 65 [ ]*clgrje %r6,%r7,50c <foo\+0x50c>
|
||||
-.*: ec 67 00 00 a0 65 [ ]*clgrjnl %r6,%r7,512 <foo\+0x512>
|
||||
-.*: ec 67 00 00 a0 65 [ ]*clgrjnl %r6,%r7,518 <foo\+0x518>
|
||||
-.*: ec 67 00 00 c0 65 [ ]*clgrjnh %r6,%r7,51e <foo\+0x51e>
|
||||
-.*: ec 67 00 00 c0 65 [ ]*clgrjnh %r6,%r7,524 <foo\+0x524>
|
||||
+ *([\da-f]+): ec 67 00 00 a0 77 [ ]*clrjnl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 20 77 [ ]*clrjh %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 20 77 [ ]*clrjh %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 40 77 [ ]*clrjl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 40 77 [ ]*clrjl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 60 77 [ ]*clrjne %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 60 77 [ ]*clrjne %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 80 77 [ ]*clrje %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 80 77 [ ]*clrje %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 a0 77 [ ]*clrjnl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 a0 77 [ ]*clrjnl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 c0 77 [ ]*clrjnh %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 c0 77 [ ]*clrjnh %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 a0 65 [ ]*clgrjnl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 20 65 [ ]*clgrjh %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 20 65 [ ]*clgrjh %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 40 65 [ ]*clgrjl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 40 65 [ ]*clgrjl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 60 65 [ ]*clgrjne %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 60 65 [ ]*clgrjne %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 80 65 [ ]*clgrje %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 80 65 [ ]*clgrje %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 a0 65 [ ]*clgrjnl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 a0 65 [ ]*clgrjnl %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 c0 65 [ ]*clgrjnh %r6,%r7,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 67 00 00 c0 65 [ ]*clgrjnh %r6,%r7,\1 <foo\+0x\1>
|
||||
.*: ec 6a 74 57 c8 ff [ ]*clibnl %r6,200,1111\(%r7\)
|
||||
.*: ec 62 74 57 c8 ff [ ]*clibh %r6,200,1111\(%r7\)
|
||||
.*: ec 62 74 57 c8 ff [ ]*clibh %r6,200,1111\(%r7\)
|
||||
@@ -261,32 +261,32 @@ Disassembly of section .text:
|
||||
.*: ec 6a 74 57 c8 fd [ ]*clgibnl %r6,200,1111\(%r7\)
|
||||
.*: ec 6c 74 57 c8 fd [ ]*clgibnh %r6,200,1111\(%r7\)
|
||||
.*: ec 6c 74 57 c8 fd [ ]*clgibnh %r6,200,1111\(%r7\)
|
||||
-.*: ec 6a 00 00 c8 7f [ ]*clijnl %r6,200,5c6 <foo\+0x5c6>
|
||||
-.*: ec 62 00 00 c8 7f [ ]*clijh %r6,200,5cc <foo\+0x5cc>
|
||||
-.*: ec 62 00 00 c8 7f [ ]*clijh %r6,200,5d2 <foo\+0x5d2>
|
||||
-.*: ec 64 00 00 c8 7f [ ]*clijl %r6,200,5d8 <foo\+0x5d8>
|
||||
-.*: ec 64 00 00 c8 7f [ ]*clijl %r6,200,5de <foo\+0x5de>
|
||||
-.*: ec 66 00 00 c8 7f [ ]*clijne %r6,200,5e4 <foo\+0x5e4>
|
||||
-.*: ec 66 00 00 c8 7f [ ]*clijne %r6,200,5ea <foo\+0x5ea>
|
||||
-.*: ec 68 00 00 c8 7f [ ]*clije %r6,200,5f0 <foo\+0x5f0>
|
||||
-.*: ec 68 00 00 c8 7f [ ]*clije %r6,200,5f6 <foo\+0x5f6>
|
||||
-.*: ec 6a 00 00 c8 7f [ ]*clijnl %r6,200,5fc <foo\+0x5fc>
|
||||
-.*: ec 6a 00 00 c8 7f [ ]*clijnl %r6,200,602 <foo\+0x602>
|
||||
-.*: ec 6c 00 00 c8 7f [ ]*clijnh %r6,200,608 <foo\+0x608>
|
||||
-.*: ec 6c 00 00 c8 7f [ ]*clijnh %r6,200,60e <foo\+0x60e>
|
||||
-.*: ec 6a 00 00 c8 7d [ ]*clgijnl %r6,200,614 <foo\+0x614>
|
||||
-.*: ec 62 00 00 c8 7d [ ]*clgijh %r6,200,61a <foo\+0x61a>
|
||||
-.*: ec 62 00 00 c8 7d [ ]*clgijh %r6,200,620 <foo\+0x620>
|
||||
-.*: ec 64 00 00 c8 7d [ ]*clgijl %r6,200,626 <foo\+0x626>
|
||||
-.*: ec 64 00 00 c8 7d [ ]*clgijl %r6,200,62c <foo\+0x62c>
|
||||
-.*: ec 66 00 00 c8 7d [ ]*clgijne %r6,200,632 <foo\+0x632>
|
||||
-.*: ec 66 00 00 c8 7d [ ]*clgijne %r6,200,638 <foo\+0x638>
|
||||
-.*: ec 68 00 00 c8 7d [ ]*clgije %r6,200,63e <foo\+0x63e>
|
||||
-.*: ec 68 00 00 c8 7d [ ]*clgije %r6,200,644 <foo\+0x644>
|
||||
-.*: ec 6a 00 00 c8 7d [ ]*clgijnl %r6,200,64a <foo\+0x64a>
|
||||
-.*: ec 6a 00 00 c8 7d [ ]*clgijnl %r6,200,650 <foo\+0x650>
|
||||
-.*: ec 6c 00 00 c8 7d [ ]*clgijnh %r6,200,656 <foo\+0x656>
|
||||
-.*: ec 6c 00 00 c8 7d [ ]*clgijnh %r6,200,65c <foo\+0x65c>
|
||||
+ *([\da-f]+): ec 6a 00 00 c8 7f [ ]*clijnl %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 62 00 00 c8 7f [ ]*clijh %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 62 00 00 c8 7f [ ]*clijh %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 64 00 00 c8 7f [ ]*clijl %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 64 00 00 c8 7f [ ]*clijl %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 66 00 00 c8 7f [ ]*clijne %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 66 00 00 c8 7f [ ]*clijne %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 68 00 00 c8 7f [ ]*clije %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 68 00 00 c8 7f [ ]*clije %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 6a 00 00 c8 7f [ ]*clijnl %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 6a 00 00 c8 7f [ ]*clijnl %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 6c 00 00 c8 7f [ ]*clijnh %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 6c 00 00 c8 7f [ ]*clijnh %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 6a 00 00 c8 7d [ ]*clgijnl %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 62 00 00 c8 7d [ ]*clgijh %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 62 00 00 c8 7d [ ]*clgijh %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 64 00 00 c8 7d [ ]*clgijl %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 64 00 00 c8 7d [ ]*clgijl %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 66 00 00 c8 7d [ ]*clgijne %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 66 00 00 c8 7d [ ]*clgijne %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 68 00 00 c8 7d [ ]*clgije %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 68 00 00 c8 7d [ ]*clgije %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 6a 00 00 c8 7d [ ]*clgijnl %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 6a 00 00 c8 7d [ ]*clgijnl %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 6c 00 00 c8 7d [ ]*clgijnh %r6,200,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 6c 00 00 c8 7d [ ]*clgijnh %r6,200,\1 <foo\+0x\1>
|
||||
.*: b9 73 a0 67 [ ]*clrtnl %r6,%r7
|
||||
.*: b9 73 20 67 [ ]*clrth %r6,%r7
|
||||
.*: b9 73 20 67 [ ]*clrth %r6,%r7
|
||||
@@ -340,16 +340,16 @@ Disassembly of section .text:
|
||||
.*: ec 60 75 30 c0 71 [ ]*clgitnh %r6,30000
|
||||
.*: ec 60 75 30 c0 71 [ ]*clgitnh %r6,30000
|
||||
.*: eb 67 84 57 00 4c [ ]*ecag %r6,%r7,1111\(%r8\)
|
||||
-.*: c4 6d 00 00 00 00 [ ]*lrl %r6,76c <foo\+0x76c>
|
||||
-.*: c4 68 00 00 00 00 [ ]*lgrl %r6,772 <foo\+0x772>
|
||||
-.*: c4 6c 00 00 00 00 [ ]*lgfrl %r6,778 <foo\+0x778>
|
||||
+ *([\da-f]+): c4 6d 00 00 00 00 [ ]*lrl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c4 68 00 00 00 00 [ ]*lgrl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c4 6c 00 00 00 00 [ ]*lgfrl %r6,\1 <foo\+0x\1>
|
||||
.*: e3 67 85 b3 01 75 [ ]*laey %r6,5555\(%r7,%r8\)
|
||||
.*: e3 67 85 b3 01 32 [ ]*ltgf %r6,5555\(%r7,%r8\)
|
||||
-.*: c4 65 00 00 00 00 [ ]*lhrl %r6,78a <foo\+0x78a>
|
||||
-.*: c4 64 00 00 00 00 [ ]*lghrl %r6,790 <foo\+0x790>
|
||||
-.*: c4 6e 00 00 00 00 [ ]*llgfrl %r6,796 <foo\+0x796>
|
||||
-.*: c4 62 00 00 00 00 [ ]*llhrl %r6,79c <foo\+0x79c>
|
||||
-.*: c4 66 00 00 00 00 [ ]*llghrl %r6,7a2 <foo\+0x7a2>
|
||||
+ *([\da-f]+): c4 65 00 00 00 00 [ ]*lhrl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c4 64 00 00 00 00 [ ]*lghrl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c4 6e 00 00 00 00 [ ]*llgfrl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c4 62 00 00 00 00 [ ]*llhrl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c4 66 00 00 00 00 [ ]*llghrl %r6,\1 <foo\+0x\1>
|
||||
.*: e5 44 64 57 8a d0 [ ]*mvhhi 1111\(%r6\),-30000
|
||||
.*: e5 4c 64 57 8a d0 [ ]*mvhi 1111\(%r6\),-30000
|
||||
.*: e5 48 64 57 8a d0 [ ]*mvghi 1111\(%r6\),-30000
|
||||
@@ -358,17 +358,17 @@ Disassembly of section .text:
|
||||
.*: c2 61 ff fe 79 60 [ ]*msfi %r6,-100000
|
||||
.*: c2 60 ff fe 79 60 [ ]*msgfi %r6,-100000
|
||||
.*: e3 a6 75 b3 01 36 [ ]*pfd 10,5555\(%r6,%r7\)
|
||||
-.*: c6 a2 00 00 00 00 [ ]*pfdrl 10,7d8 <foo\+0x7d8>
|
||||
+ *([\da-f]+): c6 a2 00 00 00 00 [ ]*pfdrl 10,\1 <foo\+0x\1>
|
||||
.*: ec 67 d2 dc e6 54 [ ]*rnsbg %r6,%r7,210,220,230
|
||||
.*: ec 67 d2 dc e6 57 [ ]*rxsbg %r6,%r7,210,220,230
|
||||
.*: ec 67 d2 dc e6 56 [ ]*rosbg %r6,%r7,210,220,230
|
||||
.*: ec 67 d2 14 e6 55 [ ]*risbg %r6,%r7,210,20,230
|
||||
.*: ec 67 d2 bc e6 55 [ ]*risbgz %r6,%r7,210,60,230
|
||||
.*: ec 67 d2 94 e6 55 [ ]*risbgz %r6,%r7,210,20,230
|
||||
-.*: c4 6f 00 00 00 00 [ ]*strl %r6,802 <foo\+0x802>
|
||||
-.*: c4 6b 00 00 00 00 [ ]*stgrl %r6,808 <foo\+0x808>
|
||||
-.*: c4 67 00 00 00 00 [ ]*sthrl %r6,80e <foo\+0x80e>
|
||||
-.*: c6 60 00 00 00 00 [ ]*exrl %r6,814 <foo\+0x814>
|
||||
+ *([\da-f]+): c4 6f 00 00 00 00 [ ]*strl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c4 6b 00 00 00 00 [ ]*stgrl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c4 67 00 00 00 00 [ ]*sthrl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c6 60 00 00 00 00 [ ]*exrl %r6,\1 <foo\+0x\1>
|
||||
.*: af ee 6d 05 [ ]*mc 3333\(%r6\),238
|
||||
.*: b9 a2 00 60 [ ]*ptf %r6
|
||||
.*: b9 af 00 67 [ ]*pfmf %r6,%r7
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-z196.d b/gas/testsuite/gas/s390/zarch-z196.d
|
||||
index 3889d32e02f..0f8bfeafa25 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-z196.d
|
||||
+++ b/gas/testsuite/gas/s390/zarch-z196.d
|
||||
@@ -13,7 +13,7 @@ Disassembly of section .text:
|
||||
.*: b9 da 80 67 [ ]*alhhlr %r6,%r7,%r8
|
||||
.*: cc 6a 00 00 fd e8 [ ]*alsih %r6,65000
|
||||
.*: cc 6b 00 00 fd e8 [ ]*alsihn %r6,65000
|
||||
-.*: cc 66 00 00 00 00 [ ]*brcth %r6,22 <foo\+0x22>
|
||||
+ *([\da-f]+): cc 66 00 00 00 00 [ ]*brcth %r6,\1 <foo\+0x\1>
|
||||
.*: b9 cd 00 67 [ ]*chhr %r6,%r7
|
||||
.*: b9 dd 00 67 [ ]*chlr %r6,%r7
|
||||
.*: e3 67 85 b3 01 cd [ ]*chf %r6,5555\(%r7,%r8\)
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-z900.d b/gas/testsuite/gas/s390/zarch-z900.d
|
||||
index 8d292dfc11b..2848dc1eb7c 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-z900.d
|
||||
+++ b/gas/testsuite/gas/s390/zarch-z900.d
|
||||
@@ -19,12 +19,12 @@ Disassembly of section .text:
|
||||
.*: b9 0a 00 96 [ ]*algr %r9,%r6
|
||||
.*: e3 95 af ff 00 46 [ ]*bctg %r9,4095\(%r5,%r10\)
|
||||
.*: b9 46 00 96 [ ]*bctgr %r9,%r6
|
||||
-.*: a7 97 00 00 [ ]*brctg %r9,40 \<foo\+0x40\>
|
||||
-.*: a7 67 00 00 [ ]*brctg %r6,44 <foo\+0x44>
|
||||
-.*: ec 96 00 00 00 44 [ ]*brxhg %r9,%r6,48 <foo\+0x48>
|
||||
-.*: ec 69 00 00 00 44 [ ]*brxhg %r6,%r9,4e <foo\+0x4e>
|
||||
-.*: ec 96 00 00 00 45 [ ]*brxlg %r9,%r6,54 <foo\+0x54>
|
||||
-.*: ec 69 00 00 00 45 [ ]*brxlg %r6,%r9,5a <foo\+0x5a>
|
||||
+ *([\da-f]+): a7 97 00 00 [ ]*brctg %r9,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 67 00 00 [ ]*brctg %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 96 00 00 00 44 [ ]*brxhg %r9,%r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 69 00 00 00 44 [ ]*brxhg %r6,%r9,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 96 00 00 00 45 [ ]*brxlg %r9,%r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): ec 69 00 00 00 45 [ ]*brxlg %r6,%r9,\1 <foo\+0x\1>
|
||||
.*: eb 96 5f ff 00 44 [ ]*bxhg %r9,%r6,4095\(%r5\)
|
||||
.*: eb 96 5f ff 00 45 [ ]*bxleg %r9,%r6,4095\(%r5\)
|
||||
.*: b3 a5 00 96 [ ]*cdgbr %f9,%r6
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-zEC12.d b/gas/testsuite/gas/s390/zarch-zEC12.d
|
||||
index e25ac134e1f..96bf59b9fb0 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-zEC12.d
|
||||
+++ b/gas/testsuite/gas/s390/zarch-zEC12.d
|
||||
@@ -57,12 +57,12 @@ Disassembly of section .text:
|
||||
.*: b9 8f 60 59 [ ]*crdte %r5,%r6,%r9
|
||||
.*: b9 8f 61 59 [ ]*crdte %r5,%r6,%r9,1
|
||||
.*: c5 a0 0c 00 00 0c [ ]*bprp 10,136 <bar>,136 <bar>
|
||||
-.*: c5 a0 00 00 00 00 [ ]*bprp 10,124 <foo\+0x124>,124 <foo\+0x124>
|
||||
+ *([\da-f]+): c5 a0 00 00 00 00 [ ]*bprp 10,\1 <foo\+0x\1>,\1 <foo\+0x\1>
|
||||
[ ]*125: R_390_PLT12DBL bar\+0x1
|
||||
[ ]*127: R_390_PLT24DBL bar\+0x3
|
||||
-.*: c7 a0 00 00 00 00 [ ]*bpp 10,12a <foo\+0x12a>,0
|
||||
+ *([\da-f]+): c7 a0 00 00 00 00 [ ]*bpp 10,\1 <foo\+0x\1>,0
|
||||
[ ]*12e: R_390_PLT16DBL bar\+0x4
|
||||
-.*: c7 a0 00 00 00 00 [ ]*bpp 10,130 <foo\+0x130>,0
|
||||
+ *([\da-f]+): c7 a0 00 00 00 00 [ ]*bpp 10,\1 <foo\+0x\1>,0
|
||||
[ ]*134: R_390_PC16DBL baz\+0x4
|
||||
|
||||
|
||||
--
|
||||
2.47.0
|
||||
|
||||
@ -1,63 +0,0 @@
|
||||
From 3f3c1e513bdf53d78adbde7f9d300c2281de21b9 Mon Sep 17 00:00:00 2001
|
||||
From: Jens Remus <jremus@linux.ibm.com>
|
||||
Date: Thu, 23 Nov 2023 15:44:41 +0100
|
||||
Subject: [PATCH] s390: Add brasl edge test cases from ESA to z/Architecture
|
||||
|
||||
Commit: 8f44c72d1f4f
|
||||
|
||||
The ESA opcode test cases for IBM z900 contain a few edge cases. They
|
||||
exercise the brasl mnemonic with its largest allowed negative and
|
||||
positive offsets. Linux on zSeries in ESA mode executes in 31-bit
|
||||
addressing mode. Therefore the ESA test cases are assembled with -m31.
|
||||
In 31-bit addressing mode the address computation using those large
|
||||
offsets wraps, which is correctly reflected in the disassembly.
|
||||
|
||||
Linux on Z in z/Architecture mode executes in 64-bit addressing mode.
|
||||
Therefore the z/Architecture (zarch) test cases are assembled with -m64.
|
||||
In 64-bit addressing mode the address computation using those large
|
||||
offsets does not necessarily wrap.
|
||||
|
||||
gas/
|
||||
* testsuite/gas/s390/zarch-z900.s: Add brasl tests from ESA that
|
||||
exercise edge cases.
|
||||
* testsuite/gas/s390/zarch-z900.d: Likewise.
|
||||
|
||||
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
|
||||
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
|
||||
---
|
||||
gas/testsuite/gas/s390/zarch-z900.d | 6 ++++++
|
||||
gas/testsuite/gas/s390/zarch-z900.s | 6 ++++++
|
||||
2 files changed, 12 insertions(+)
|
||||
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-z900.d b/gas/testsuite/gas/s390/zarch-z900.d
|
||||
index 2848dc1eb7c..93aee212785 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-z900.d
|
||||
+++ b/gas/testsuite/gas/s390/zarch-z900.d
|
||||
@@ -149,4 +149,10 @@ Disassembly of section .text:
|
||||
.*: eb 96 5f ff 00 0f [ ]*tracg %r9,%r6,4095\(%r5\)
|
||||
.*: e3 95 af ff 00 82 [ ]*xg %r9,4095\(%r5,%r10\)
|
||||
.*: b9 82 00 96 [ ]*xgr %r9,%r6
|
||||
+ *([\da-f]+): c0 65 00 00 00 00 [ ]*brasl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 65 00 00 00 00 [ ]*brasl %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): c0 65 80 00 00 00 [ ]*brasl %r6,ffffffff0+\1 <foo\+0xffffffff0+\1>
|
||||
+ *([\da-f]+): c0 65 80 00 00 00 [ ]*brasl %r6,ffffffff0+\1 <foo\+0xffffffff0+\1>
|
||||
+.*: c0 65 7f ff ff ff [ ]*brasl %r6,1000002d0 <foo\+0x1000002d0>
|
||||
+.*: c0 65 7f ff ff ff [ ]*brasl %r6,1000002d6 <foo\+0x1000002d6>
|
||||
.*: 07 07 [ ]*nopr %r7
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-z900.s b/gas/testsuite/gas/s390/zarch-z900.s
|
||||
index 96d27e7b7e2..22fa1da5a30 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-z900.s
|
||||
+++ b/gas/testsuite/gas/s390/zarch-z900.s
|
||||
@@ -143,3 +143,9 @@ foo:
|
||||
tracg %r9,%r6,4095(%r5)
|
||||
xg %r9,4095(%r5,%r10)
|
||||
xgr %r9,%r6
|
||||
+ brasl %r6,.
|
||||
+ jasl %r6,.
|
||||
+ brasl %r6,.-0x100000000
|
||||
+ jasl %r6,.-0x100000000
|
||||
+ brasl %r6,.+0xfffffffe
|
||||
+ jasl %r6,.+0xfffffffe
|
||||
--
|
||||
2.47.0
|
||||
|
||||
@ -1,349 +0,0 @@
|
||||
From eeafc61979c6f8399bb5ce770e46a00823a5cfae Mon Sep 17 00:00:00 2001
|
||||
From: Jens Remus <jremus@linux.ibm.com>
|
||||
Date: Thu, 23 Nov 2023 15:45:42 +0100
|
||||
Subject: [PATCH] s390: Make operand table indices relative to each other
|
||||
|
||||
Commit: 002dddf0b965
|
||||
|
||||
This is a purely mechanical change. It allows subsequent insertions into
|
||||
the operands table without having to renumber all operand indices.
|
||||
|
||||
The only differences in the resulting ELF object are in the .debug_info
|
||||
section. This has been confirmed by diffing the following xxd and readelf
|
||||
output:
|
||||
|
||||
xxd s390-opc.o
|
||||
readelf -aW -x .text -x .data -x .bss -x .rodata -x .debug_info \
|
||||
-x .symtab -x .strtab -x .shstrtab --debug-dump s390-opc.o
|
||||
|
||||
opcodes/
|
||||
* s390-opc.c: Make operand table indices relative to each other.
|
||||
|
||||
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
|
||||
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
|
||||
---
|
||||
opcodes/s390-opc.c | 174 ++++++++++++++++++++++++---------------------
|
||||
1 file changed, 92 insertions(+), 82 deletions(-)
|
||||
|
||||
diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c
|
||||
index 1910431ab89..b52fc8c3b62 100644
|
||||
--- a/opcodes/s390-opc.c
|
||||
+++ b/opcodes/s390-opc.c
|
||||
@@ -34,76 +34,82 @@
|
||||
inserting operands into instructions and vice-versa is kept in this
|
||||
file. */
|
||||
|
||||
+/* Build-time checks are preferrable over runtime ones. Use this construct
|
||||
+ in preference where possible. */
|
||||
+#define static_assert(e) ((void)sizeof (struct { int _:1 - 2 * !(e); }))
|
||||
+
|
||||
+#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
|
||||
+
|
||||
/* The operands table.
|
||||
The fields are bits, shift, insert, extract, flags. */
|
||||
|
||||
const struct s390_operand s390_operands[] =
|
||||
{
|
||||
-#define UNUSED 0
|
||||
+#define UNUSED 0
|
||||
{ 0, 0, 0 }, /* Indicates the end of the operand list */
|
||||
|
||||
/* General purpose register operands. */
|
||||
|
||||
-#define R_8 1 /* GPR starting at position 8 */
|
||||
+#define R_8 (UNUSED + 1) /* GPR starting at position 8 */
|
||||
{ 4, 8, S390_OPERAND_GPR },
|
||||
-#define R_12 2 /* GPR starting at position 12 */
|
||||
+#define R_12 (R_8 + 1) /* GPR starting at position 12 */
|
||||
{ 4, 12, S390_OPERAND_GPR },
|
||||
-#define R_16 3 /* GPR starting at position 16 */
|
||||
+#define R_16 (R_12 + 1) /* GPR starting at position 16 */
|
||||
{ 4, 16, S390_OPERAND_GPR },
|
||||
-#define R_20 4 /* GPR starting at position 20 */
|
||||
+#define R_20 (R_16 + 1) /* GPR starting at position 20 */
|
||||
{ 4, 20, S390_OPERAND_GPR },
|
||||
-#define R_24 5 /* GPR starting at position 24 */
|
||||
+#define R_24 (R_20 + 1) /* GPR starting at position 24 */
|
||||
{ 4, 24, S390_OPERAND_GPR },
|
||||
-#define R_28 6 /* GPR starting at position 28 */
|
||||
+#define R_28 (R_24 + 1) /* GPR starting at position 28 */
|
||||
{ 4, 28, S390_OPERAND_GPR },
|
||||
-#define R_32 7 /* GPR starting at position 32 */
|
||||
+#define R_32 (R_28 + 1) /* GPR starting at position 32 */
|
||||
{ 4, 32, S390_OPERAND_GPR },
|
||||
|
||||
/* General purpose register pair operands. */
|
||||
|
||||
-#define RE_8 8 /* GPR starting at position 8 */
|
||||
+#define RE_8 (R_32 + 1) /* GPR starting at position 8 */
|
||||
{ 4, 8, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR },
|
||||
-#define RE_12 9 /* GPR starting at position 12 */
|
||||
+#define RE_12 (RE_8 + 1) /* GPR starting at position 12 */
|
||||
{ 4, 12, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR },
|
||||
-#define RE_16 10 /* GPR starting at position 16 */
|
||||
+#define RE_16 (RE_12 + 1) /* GPR starting at position 16 */
|
||||
{ 4, 16, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR },
|
||||
-#define RE_20 11 /* GPR starting at position 20 */
|
||||
+#define RE_20 (RE_16 + 1) /* GPR starting at position 20 */
|
||||
{ 4, 20, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR },
|
||||
-#define RE_24 12 /* GPR starting at position 24 */
|
||||
+#define RE_24 (RE_20 + 1) /* GPR starting at position 24 */
|
||||
{ 4, 24, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR },
|
||||
-#define RE_28 13 /* GPR starting at position 28 */
|
||||
+#define RE_28 (RE_24 + 1) /* GPR starting at position 28 */
|
||||
{ 4, 28, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR },
|
||||
-#define RE_32 14 /* GPR starting at position 32 */
|
||||
+#define RE_32 (RE_28 + 1) /* GPR starting at position 32 */
|
||||
{ 4, 32, S390_OPERAND_GPR | S390_OPERAND_REG_PAIR },
|
||||
|
||||
/* Floating point register operands. */
|
||||
|
||||
-#define F_8 15 /* FPR starting at position 8 */
|
||||
+#define F_8 (RE_32 + 1) /* FPR starting at position 8 */
|
||||
{ 4, 8, S390_OPERAND_FPR },
|
||||
-#define F_12 16 /* FPR starting at position 12 */
|
||||
+#define F_12 (F_8 + 1) /* FPR starting at position 12 */
|
||||
{ 4, 12, S390_OPERAND_FPR },
|
||||
-#define F_16 17 /* FPR starting at position 16 */
|
||||
+#define F_16 (F_12 + 1) /* FPR starting at position 16 */
|
||||
{ 4, 16, S390_OPERAND_FPR },
|
||||
-#define F_24 18 /* FPR starting at position 24 */
|
||||
+#define F_24 (F_16 + 1) /* FPR starting at position 24 */
|
||||
{ 4, 24, S390_OPERAND_FPR },
|
||||
-#define F_28 19 /* FPR starting at position 28 */
|
||||
+#define F_28 (F_24 + 1) /* FPR starting at position 28 */
|
||||
{ 4, 28, S390_OPERAND_FPR },
|
||||
-#define F_32 20 /* FPR starting at position 32 */
|
||||
+#define F_32 (F_28 + 1) /* FPR starting at position 32 */
|
||||
{ 4, 32, S390_OPERAND_FPR },
|
||||
|
||||
/* Floating point register pair operands. */
|
||||
|
||||
-#define FE_8 21 /* FPR starting at position 8 */
|
||||
+#define FE_8 (F_32 + 1) /* FPR starting at position 8 */
|
||||
{ 4, 8, S390_OPERAND_FPR | S390_OPERAND_REG_PAIR },
|
||||
-#define FE_12 22 /* FPR starting at position 12 */
|
||||
+#define FE_12 (FE_8 + 1) /* FPR starting at position 12 */
|
||||
{ 4, 12, S390_OPERAND_FPR | S390_OPERAND_REG_PAIR },
|
||||
-#define FE_16 23 /* FPR starting at position 16 */
|
||||
+#define FE_16 (FE_12 + 1) /* FPR starting at position 16 */
|
||||
{ 4, 16, S390_OPERAND_FPR | S390_OPERAND_REG_PAIR },
|
||||
-#define FE_24 24 /* FPR starting at position 24 */
|
||||
+#define FE_24 (FE_16 + 1) /* FPR starting at position 24 */
|
||||
{ 4, 24, S390_OPERAND_FPR | S390_OPERAND_REG_PAIR },
|
||||
-#define FE_28 25 /* FPR starting at position 28 */
|
||||
+#define FE_28 (FE_24 + 1) /* FPR starting at position 28 */
|
||||
{ 4, 28, S390_OPERAND_FPR | S390_OPERAND_REG_PAIR },
|
||||
-#define FE_32 26 /* FPR starting at position 32 */
|
||||
+#define FE_32 (FE_28 + 1) /* FPR starting at position 32 */
|
||||
{ 4, 32, S390_OPERAND_FPR | S390_OPERAND_REG_PAIR },
|
||||
|
||||
/* Vector register operands. */
|
||||
@@ -111,145 +117,149 @@ const struct s390_operand s390_operands[] =
|
||||
/* For each of these operands and additional bit in the RXB operand is
|
||||
needed. */
|
||||
|
||||
-#define V_8 27 /* Vector reg. starting at position 8 */
|
||||
+#define V_8 (FE_32 + 1) /* Vector reg. starting at position 8 */
|
||||
{ 4, 8, S390_OPERAND_VR },
|
||||
-#define V_12 28 /* Vector reg. starting at position 12 */
|
||||
+#define V_12 (V_8 + 1) /* Vector reg. starting at position 12 */
|
||||
{ 4, 12, S390_OPERAND_VR },
|
||||
-#define V_CP16_12 29 /* Vector reg. starting at position 12 */
|
||||
+#define V_CP16_12 (V_12 + 1) /* Vector reg. starting at position 12 */
|
||||
{ 4, 12, S390_OPERAND_VR | S390_OPERAND_CP16 }, /* with a copy at pos 16 */
|
||||
-#define V_16 30 /* Vector reg. starting at position 16 */
|
||||
+#define V_16 (V_CP16_12+1) /* Vector reg. starting at position 16 */
|
||||
{ 4, 16, S390_OPERAND_VR },
|
||||
-#define V_32 31 /* Vector reg. starting at position 32 */
|
||||
+#define V_32 (V_16 + 1) /* Vector reg. starting at position 32 */
|
||||
{ 4, 32, S390_OPERAND_VR },
|
||||
|
||||
/* Access register operands. */
|
||||
|
||||
-#define A_8 32 /* Access reg. starting at position 8 */
|
||||
+#define A_8 (V_32 + 1) /* Access reg. starting at position 8 */
|
||||
{ 4, 8, S390_OPERAND_AR },
|
||||
-#define A_12 33 /* Access reg. starting at position 12 */
|
||||
+#define A_12 (A_8 + 1) /* Access reg. starting at position 12 */
|
||||
{ 4, 12, S390_OPERAND_AR },
|
||||
-#define A_24 34 /* Access reg. starting at position 24 */
|
||||
+#define A_24 (A_12 + 1) /* Access reg. starting at position 24 */
|
||||
{ 4, 24, S390_OPERAND_AR },
|
||||
-#define A_28 35 /* Access reg. starting at position 28 */
|
||||
+#define A_28 (A_24 + 1) /* Access reg. starting at position 28 */
|
||||
{ 4, 28, S390_OPERAND_AR },
|
||||
|
||||
/* Control register operands. */
|
||||
|
||||
-#define C_8 36 /* Control reg. starting at position 8 */
|
||||
+#define C_8 (A_28 + 1) /* Control reg. starting at position 8 */
|
||||
{ 4, 8, S390_OPERAND_CR },
|
||||
-#define C_12 37 /* Control reg. starting at position 12 */
|
||||
+#define C_12 (C_8 + 1) /* Control reg. starting at position 12 */
|
||||
{ 4, 12, S390_OPERAND_CR },
|
||||
|
||||
/* Base register operands. */
|
||||
|
||||
-#define B_16 38 /* Base register starting at position 16 */
|
||||
+#define B_16 (C_12 + 1) /* Base register starting at position 16 */
|
||||
{ 4, 16, S390_OPERAND_BASE | S390_OPERAND_GPR },
|
||||
-#define B_32 39 /* Base register starting at position 32 */
|
||||
+#define B_32 (B_16 + 1) /* Base register starting at position 32 */
|
||||
{ 4, 32, S390_OPERAND_BASE | S390_OPERAND_GPR },
|
||||
|
||||
-#define X_12 40 /* Index register starting at position 12 */
|
||||
+#define X_12 (B_32 + 1) /* Index register starting at position 12 */
|
||||
{ 4, 12, S390_OPERAND_INDEX | S390_OPERAND_GPR },
|
||||
|
||||
-#define VX_12 41 /* Vector index register starting at position 12 */
|
||||
+#define VX_12 (X_12+1) /* Vector index register starting at position 12 */
|
||||
{ 4, 12, S390_OPERAND_INDEX | S390_OPERAND_VR },
|
||||
|
||||
/* Address displacement operands. */
|
||||
|
||||
-#define D_20 42 /* Displacement starting at position 20 */
|
||||
+#define D_20 (VX_12 + 1) /* Displacement starting at position 20 */
|
||||
{ 12, 20, S390_OPERAND_DISP },
|
||||
-#define D_36 43 /* Displacement starting at position 36 */
|
||||
+#define D_36 (D_20 + 1) /* Displacement starting at position 36 */
|
||||
{ 12, 36, S390_OPERAND_DISP },
|
||||
-#define D20_20 44 /* 20 bit displacement starting at 20 */
|
||||
+#define D20_20 (D_36 + 1) /* 20 bit displacement starting at 20 */
|
||||
{ 20, 20, S390_OPERAND_DISP | S390_OPERAND_SIGNED },
|
||||
|
||||
/* Length operands. */
|
||||
|
||||
-#define L4_8 45 /* 4 bit length starting at position 8 */
|
||||
+#define L4_8 (D20_20 + 1) /* 4 bit length starting at position 8 */
|
||||
{ 4, 8, S390_OPERAND_LENGTH },
|
||||
-#define L4_12 46 /* 4 bit length starting at position 12 */
|
||||
+#define L4_12 (L4_8 + 1) /* 4 bit length starting at position 12 */
|
||||
{ 4, 12, S390_OPERAND_LENGTH },
|
||||
-#define L8_8 47 /* 8 bit length starting at position 8 */
|
||||
+#define L8_8 (L4_12 + 1) /* 8 bit length starting at position 8 */
|
||||
{ 8, 8, S390_OPERAND_LENGTH },
|
||||
|
||||
/* Signed immediate operands. */
|
||||
|
||||
-#define I8_8 48 /* 8 bit signed value starting at 8 */
|
||||
+#define I8_8 (L8_8 + 1) /* 8 bit signed value starting at 8 */
|
||||
{ 8, 8, S390_OPERAND_SIGNED },
|
||||
-#define I8_32 49 /* 8 bit signed value starting at 32 */
|
||||
+#define I8_32 (I8_8 + 1) /* 8 bit signed value starting at 32 */
|
||||
{ 8, 32, S390_OPERAND_SIGNED },
|
||||
-#define I12_12 50 /* 12 bit signed value starting at 12 */
|
||||
+#define I12_12 (I8_32 + 1) /* 12 bit signed value starting at 12 */
|
||||
{ 12, 12, S390_OPERAND_SIGNED },
|
||||
-#define I16_16 51 /* 16 bit signed value starting at 16 */
|
||||
+#define I16_16 (I12_12 + 1) /* 16 bit signed value starting at 16 */
|
||||
{ 16, 16, S390_OPERAND_SIGNED },
|
||||
-#define I16_32 52 /* 16 bit signed value starting at 32 */
|
||||
+#define I16_32 (I16_16 + 1) /* 16 bit signed value starting at 32 */
|
||||
{ 16, 32, S390_OPERAND_SIGNED },
|
||||
-#define I24_24 53 /* 24 bit signed value starting at 24 */
|
||||
+#define I24_24 (I16_32 + 1) /* 24 bit signed value starting at 24 */
|
||||
{ 24, 24, S390_OPERAND_SIGNED },
|
||||
-#define I32_16 54 /* 32 bit signed value starting at 16 */
|
||||
+#define I32_16 (I24_24 + 1) /* 32 bit signed value starting at 16 */
|
||||
{ 32, 16, S390_OPERAND_SIGNED },
|
||||
|
||||
/* Unsigned immediate operands. */
|
||||
|
||||
-#define U4_8 55 /* 4 bit unsigned value starting at 8 */
|
||||
+#define U4_8 (I32_16 + 1) /* 4 bit unsigned value starting at 8 */
|
||||
{ 4, 8, 0 },
|
||||
-#define U4_12 56 /* 4 bit unsigned value starting at 12 */
|
||||
+#define U4_12 (U4_8 + 1) /* 4 bit unsigned value starting at 12 */
|
||||
{ 4, 12, 0 },
|
||||
-#define U4_16 57 /* 4 bit unsigned value starting at 16 */
|
||||
+#define U4_16 (U4_12 + 1) /* 4 bit unsigned value starting at 16 */
|
||||
{ 4, 16, 0 },
|
||||
-#define U4_20 58 /* 4 bit unsigned value starting at 20 */
|
||||
+#define U4_20 (U4_16 + 1) /* 4 bit unsigned value starting at 20 */
|
||||
{ 4, 20, 0 },
|
||||
-#define U4_24 59 /* 4 bit unsigned value starting at 24 */
|
||||
+#define U4_24 (U4_20 + 1) /* 4 bit unsigned value starting at 24 */
|
||||
{ 4, 24, 0 },
|
||||
-#define U4_OR1_24 60 /* 4 bit unsigned value ORed with 1 */
|
||||
+#define U4_OR1_24 (U4_24 + 1) /* 4 bit unsigned value ORed with 1 */
|
||||
{ 4, 24, S390_OPERAND_OR1 }, /* starting at 24 */
|
||||
-#define U4_OR2_24 61 /* 4 bit unsigned value ORed with 2 */
|
||||
+#define U4_OR2_24 (U4_OR1_24+1) /* 4 bit unsigned value ORed with 2 */
|
||||
{ 4, 24, S390_OPERAND_OR2 }, /* starting at 24 */
|
||||
-#define U4_OR3_24 62 /* 4 bit unsigned value ORed with 3 */
|
||||
+#define U4_OR3_24 (U4_OR2_24+1) /* 4 bit unsigned value ORed with 3 */
|
||||
{ 4, 24, S390_OPERAND_OR1 | S390_OPERAND_OR2 }, /* starting at 24 */
|
||||
-#define U4_28 63 /* 4 bit unsigned value starting at 28 */
|
||||
+#define U4_28 (U4_OR3_24+1) /* 4 bit unsigned value starting at 28 */
|
||||
{ 4, 28, 0 },
|
||||
-#define U4_OR8_28 64 /* 4 bit unsigned value ORed with 8 */
|
||||
+#define U4_OR8_28 (U4_28 + 1) /* 4 bit unsigned value ORed with 8 */
|
||||
{ 4, 28, S390_OPERAND_OR8 }, /* starting at 28 */
|
||||
-#define U4_32 65 /* 4 bit unsigned value starting at 32 */
|
||||
+#define U4_32 (U4_OR8_28+1) /* 4 bit unsigned value starting at 32 */
|
||||
{ 4, 32, 0 },
|
||||
-#define U4_36 66 /* 4 bit unsigned value starting at 36 */
|
||||
+#define U4_36 (U4_32 + 1) /* 4 bit unsigned value starting at 36 */
|
||||
{ 4, 36, 0 },
|
||||
-#define U8_8 67 /* 8 bit unsigned value starting at 8 */
|
||||
+#define U8_8 (U4_36 + 1) /* 8 bit unsigned value starting at 8 */
|
||||
{ 8, 8, 0 },
|
||||
-#define U8_16 68 /* 8 bit unsigned value starting at 16 */
|
||||
+#define U8_16 (U8_8 + 1) /* 8 bit unsigned value starting at 16 */
|
||||
{ 8, 16, 0 },
|
||||
-#define U6_26 69 /* 6 bit unsigned value starting at 26 */
|
||||
+#define U6_26 (U8_16 + 1) /* 6 bit unsigned value starting at 26 */
|
||||
{ 6, 26, 0 },
|
||||
-#define U8_24 70 /* 8 bit unsigned value starting at 24 */
|
||||
+#define U8_24 (U6_26 + 1) /* 8 bit unsigned value starting at 24 */
|
||||
{ 8, 24, 0 },
|
||||
-#define U8_28 71 /* 8 bit unsigned value starting at 28 */
|
||||
+#define U8_28 (U8_24 + 1) /* 8 bit unsigned value starting at 28 */
|
||||
{ 8, 28, 0 },
|
||||
-#define U8_32 72 /* 8 bit unsigned value starting at 32 */
|
||||
+#define U8_32 (U8_28 + 1) /* 8 bit unsigned value starting at 32 */
|
||||
{ 8, 32, 0 },
|
||||
-#define U12_16 73 /* 12 bit unsigned value starting at 16 */
|
||||
+#define U12_16 (U8_32 + 1) /* 12 bit unsigned value starting at 16 */
|
||||
{ 12, 16, 0 },
|
||||
-#define U16_16 74 /* 16 bit unsigned value starting at 16 */
|
||||
+#define U16_16 (U12_16 + 1) /* 16 bit unsigned value starting at 16 */
|
||||
{ 16, 16, 0 },
|
||||
-#define U16_32 75 /* 16 bit unsigned value starting at 32 */
|
||||
+#define U16_32 (U16_16 + 1) /* 16 bit unsigned value starting at 32 */
|
||||
{ 16, 32, 0 },
|
||||
-#define U32_16 76 /* 32 bit unsigned value starting at 16 */
|
||||
+#define U32_16 (U16_32 + 1) /* 32 bit unsigned value starting at 16 */
|
||||
{ 32, 16, 0 },
|
||||
|
||||
/* PC-relative address operands. */
|
||||
|
||||
-#define J12_12 77 /* 12 bit PC relative offset at 12 */
|
||||
+#define J12_12 (U32_16 + 1) /* 12 bit PC relative offset at 12 */
|
||||
{ 12, 12, S390_OPERAND_PCREL },
|
||||
-#define J16_16 78 /* 16 bit PC relative offset at 16 */
|
||||
+#define J16_16 (J12_12 + 1) /* 16 bit PC relative offset at 16 */
|
||||
{ 16, 16, S390_OPERAND_PCREL },
|
||||
-#define J16_32 79 /* 16 bit PC relative offset at 32 */
|
||||
+#define J16_32 (J16_16 + 1) /* 16 bit PC relative offset at 32 */
|
||||
{ 16, 32, S390_OPERAND_PCREL },
|
||||
-#define J24_24 80 /* 24 bit PC relative offset at 24 */
|
||||
+#define J24_24 (J16_32 + 1) /* 24 bit PC relative offset at 24 */
|
||||
{ 24, 24, S390_OPERAND_PCREL },
|
||||
-#define J32_16 81 /* 32 bit PC relative offset at 16 */
|
||||
+#define J32_16 (J24_24 + 1) /* 32 bit PC relative offset at 16 */
|
||||
{ 32, 16, S390_OPERAND_PCREL },
|
||||
|
||||
};
|
||||
|
||||
+static inline void unused_s390_operands_static_asserts(void)
|
||||
+{
|
||||
+ static_assert(ARRAY_SIZE(s390_operands) - 1 == J32_16);
|
||||
+}
|
||||
|
||||
/* Macros used to form opcodes. */
|
||||
|
||||
--
|
||||
2.47.0
|
||||
|
||||
@ -1,237 +0,0 @@
|
||||
From fca086d928a940dc5aa3b5c0586bc5ed37d6b374 Mon Sep 17 00:00:00 2001
|
||||
From: Jens Remus <jremus@linux.ibm.com>
|
||||
Date: Thu, 23 Nov 2023 15:46:46 +0100
|
||||
Subject: [PATCH] s390: Align optional operand definition to specs
|
||||
|
||||
Commit: 1f53fac2bdd5
|
||||
|
||||
The IBM z/Architecture Principle of Operation [1] specifies the last
|
||||
operand(s) of some (extended) mnemonics to be optional. Align the
|
||||
mnemonic definitions in the opcode table according to specification.
|
||||
|
||||
This changes the last operand of the following (extended) mnemonics to
|
||||
be optional:
|
||||
risbg, risbgz, risbgn, risbgnz, risbhg, risblg, rnsbg, rosbg, rxsbg
|
||||
|
||||
Note that efpc and sfpc actually have only one operand, but had
|
||||
erroneously been defined to have two. For backwards compatibility the
|
||||
wrong RR register format must be retained. Since the superfluous second
|
||||
operand is defined as optional the instruction can still be coded as
|
||||
specified.
|
||||
|
||||
[1]: IBM z/Architecture Principles of Operation, SA22-7832-13, IBM z16,
|
||||
https://publibfp.dhe.ibm.com/epubs/pdf/a227832d.pdf
|
||||
|
||||
opcodes/
|
||||
* s390-opc.txt: Align optional operand definition to
|
||||
specification.
|
||||
|
||||
testsuite/
|
||||
* zarch-z10.s: Add test cases for risbg, risbgz, rnsbg, rosbg,
|
||||
and rxsbg.
|
||||
* zarch-z10.d: Likewise.
|
||||
* zarch-z196.s: Add test cases for risbhg and risblg.
|
||||
* zarch-z196.d: Likewise.
|
||||
* zarch-zEC12.s: Add test cases for risbgn and risbgnz.
|
||||
* zarch-zEC12.d: Likewise.
|
||||
|
||||
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
|
||||
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
|
||||
---
|
||||
gas/testsuite/gas/s390/zarch-z10.d | 6 ++++++
|
||||
gas/testsuite/gas/s390/zarch-z10.s | 6 ++++++
|
||||
gas/testsuite/gas/s390/zarch-z196.d | 2 ++
|
||||
gas/testsuite/gas/s390/zarch-z196.s | 2 ++
|
||||
gas/testsuite/gas/s390/zarch-zEC12.d | 18 ++++++++----------
|
||||
gas/testsuite/gas/s390/zarch-zEC12.s | 3 +++
|
||||
opcodes/s390-opc.txt | 20 +++++++++++---------
|
||||
7 files changed, 38 insertions(+), 19 deletions(-)
|
||||
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-z10.d b/gas/testsuite/gas/s390/zarch-z10.d
|
||||
index 2c7c485a1a1..4aca8372363 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-z10.d
|
||||
+++ b/gas/testsuite/gas/s390/zarch-z10.d
|
||||
@@ -360,11 +360,17 @@ Disassembly of section .text:
|
||||
.*: e3 a6 75 b3 01 36 [ ]*pfd 10,5555\(%r6,%r7\)
|
||||
*([\da-f]+): c6 a2 00 00 00 00 [ ]*pfdrl 10,\1 <foo\+0x\1>
|
||||
.*: ec 67 d2 dc e6 54 [ ]*rnsbg %r6,%r7,210,220,230
|
||||
+.*: ec 67 d2 dc 00 54 [ ]*rnsbg %r6,%r7,210,220
|
||||
.*: ec 67 d2 dc e6 57 [ ]*rxsbg %r6,%r7,210,220,230
|
||||
+.*: ec 67 d2 dc 00 57 [ ]*rxsbg %r6,%r7,210,220
|
||||
.*: ec 67 d2 dc e6 56 [ ]*rosbg %r6,%r7,210,220,230
|
||||
+.*: ec 67 d2 dc 00 56 [ ]*rosbg %r6,%r7,210,220
|
||||
.*: ec 67 d2 14 e6 55 [ ]*risbg %r6,%r7,210,20,230
|
||||
+.*: ec 67 d2 14 00 55 [ ]*risbg %r6,%r7,210,20
|
||||
.*: ec 67 d2 bc e6 55 [ ]*risbgz %r6,%r7,210,60,230
|
||||
+.*: ec 67 d2 bc 00 55 [ ]*risbgz %r6,%r7,210,60
|
||||
.*: ec 67 d2 94 e6 55 [ ]*risbgz %r6,%r7,210,20,230
|
||||
+.*: ec 67 d2 94 00 55 [ ]*risbgz %r6,%r7,210,20
|
||||
*([\da-f]+): c4 6f 00 00 00 00 [ ]*strl %r6,\1 <foo\+0x\1>
|
||||
*([\da-f]+): c4 6b 00 00 00 00 [ ]*stgrl %r6,\1 <foo\+0x\1>
|
||||
*([\da-f]+): c4 67 00 00 00 00 [ ]*sthrl %r6,\1 <foo\+0x\1>
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-z10.s b/gas/testsuite/gas/s390/zarch-z10.s
|
||||
index 5cfc533d4d1..3ed61a4f0fd 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-z10.s
|
||||
+++ b/gas/testsuite/gas/s390/zarch-z10.s
|
||||
@@ -354,11 +354,17 @@ foo:
|
||||
pfd 10,5555(%r6,%r7)
|
||||
pfdrl 10,.
|
||||
rnsbg %r6,%r7,210,220,230
|
||||
+ rnsbg %r6,%r7,210,220
|
||||
rxsbg %r6,%r7,210,220,230
|
||||
+ rxsbg %r6,%r7,210,220
|
||||
rosbg %r6,%r7,210,220,230
|
||||
+ rosbg %r6,%r7,210,220
|
||||
risbg %r6,%r7,210,20,230
|
||||
+ risbg %r6,%r7,210,20
|
||||
risbg %r6,%r7,210,188,230
|
||||
+ risbg %r6,%r7,210,188
|
||||
risbgz %r6,%r7,210,20,230
|
||||
+ risbgz %r6,%r7,210,20
|
||||
strl %r6,.
|
||||
stgrl %r6,.
|
||||
sthrl %r6,.
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-z196.d b/gas/testsuite/gas/s390/zarch-z196.d
|
||||
index 0f8bfeafa25..b9db65f43ee 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-z196.d
|
||||
+++ b/gas/testsuite/gas/s390/zarch-z196.d
|
||||
@@ -29,7 +29,9 @@ Disassembly of section .text:
|
||||
.*: e3 67 8a 4d fe c2 [ ]*llch %r6,-5555\(%r7,%r8\)
|
||||
.*: e3 67 8a 4d fe c6 [ ]*llhh %r6,-5555\(%r7,%r8\)
|
||||
.*: ec 67 0c 0d 0e 5d [ ]*risbhg %r6,%r7,12,13,14
|
||||
+.*: ec 67 0c 0d 00 5d [ ]*risbhg %r6,%r7,12,13
|
||||
.*: ec 67 0c 0d 0e 51 [ ]*risblg %r6,%r7,12,13,14
|
||||
+.*: ec 67 0c 0d 00 51 [ ]*risblg %r6,%r7,12,13
|
||||
.*: e3 67 8a 4d fe c3 [ ]*stch %r6,-5555\(%r7,%r8\)
|
||||
.*: e3 67 8a 4d fe c7 [ ]*sthh %r6,-5555\(%r7,%r8\)
|
||||
.*: e3 67 8a 4d fe cb [ ]*stfh %r6,-5555\(%r7,%r8\)
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-z196.s b/gas/testsuite/gas/s390/zarch-z196.s
|
||||
index 31be5a62dba..213c2a1e676 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-z196.s
|
||||
+++ b/gas/testsuite/gas/s390/zarch-z196.s
|
||||
@@ -23,7 +23,9 @@ foo:
|
||||
llch %r6,-5555(%r7,%r8)
|
||||
llhh %r6,-5555(%r7,%r8)
|
||||
risbhg %r6,%r7,12,13,14
|
||||
+ risbhg %r6,%r7,12,13
|
||||
risblg %r6,%r7,12,13,14
|
||||
+ risblg %r6,%r7,12,13
|
||||
stch %r6,-5555(%r7,%r8)
|
||||
sthh %r6,-5555(%r7,%r8)
|
||||
stfh %r6,-5555(%r7,%r8)
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-zEC12.d b/gas/testsuite/gas/s390/zarch-zEC12.d
|
||||
index 96bf59b9fb0..57d7becdcdf 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-zEC12.d
|
||||
+++ b/gas/testsuite/gas/s390/zarch-zEC12.d
|
||||
@@ -47,8 +47,11 @@ Disassembly of section .text:
|
||||
.*: eb 6c 7a 4d fe 2b [ ]*clgtnh %r6,-5555\(%r7\)
|
||||
.*: eb 6c 7a 4d fe 2b [ ]*clgtnh %r6,-5555\(%r7\)
|
||||
.*: ec 67 0c 0d 0e 59 [ ]*risbgn %r6,%r7,12,13,14
|
||||
+.*: ec 67 0c 0d 00 59 [ ]*risbgn %r6,%r7,12,13
|
||||
.*: ec 67 0c bc 0e 59 [ ]*risbgnz %r6,%r7,12,60,14
|
||||
+.*: ec 67 0c bc 00 59 [ ]*risbgnz %r6,%r7,12,60
|
||||
.*: ec 67 0c 94 0e 59 [ ]*risbgnz %r6,%r7,12,20,14
|
||||
+.*: ec 67 0c 94 00 59 [ ]*risbgnz %r6,%r7,12,20
|
||||
.*: ed 0f 8f a0 6d aa [ ]*cdzt %f6,4000\(16,%r8\),13
|
||||
.*: ed 21 8f a0 4d ab [ ]*cxzt %f4,4000\(34,%r8\),13
|
||||
.*: ed 0f 8f a0 6d a8 [ ]*czdt %f6,4000\(16,%r8\),13
|
||||
@@ -56,16 +59,11 @@ Disassembly of section .text:
|
||||
.*: b2 e8 c0 56 [ ]*ppa %r5,%r6,12
|
||||
.*: b9 8f 60 59 [ ]*crdte %r5,%r6,%r9
|
||||
.*: b9 8f 61 59 [ ]*crdte %r5,%r6,%r9,1
|
||||
-.*: c5 a0 0c 00 00 0c [ ]*bprp 10,136 <bar>,136 <bar>
|
||||
+.*: c5 a0 0c 00 00 0c [ ]*bprp 10,148 <bar>,148 <bar>
|
||||
*([\da-f]+): c5 a0 00 00 00 00 [ ]*bprp 10,\1 <foo\+0x\1>,\1 <foo\+0x\1>
|
||||
-[ ]*125: R_390_PLT12DBL bar\+0x1
|
||||
-[ ]*127: R_390_PLT24DBL bar\+0x3
|
||||
+[ ]*137: R_390_PLT12DBL bar\+0x1
|
||||
+[ ]*139: R_390_PLT24DBL bar\+0x3
|
||||
*([\da-f]+): c7 a0 00 00 00 00 [ ]*bpp 10,\1 <foo\+0x\1>,0
|
||||
-[ ]*12e: R_390_PLT16DBL bar\+0x4
|
||||
+[ ]*140: R_390_PLT16DBL bar\+0x4
|
||||
*([\da-f]+): c7 a0 00 00 00 00 [ ]*bpp 10,\1 <foo\+0x\1>,0
|
||||
-[ ]*134: R_390_PC16DBL baz\+0x4
|
||||
-
|
||||
-
|
||||
-0000000000000136 <bar>:
|
||||
-
|
||||
-.*: 07 07 [ ]*nopr %r7
|
||||
+[ ]*146: R_390_PC16DBL baz\+0x4
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-zEC12.s b/gas/testsuite/gas/s390/zarch-zEC12.s
|
||||
index 03b577e4830..3a30e8d72bf 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-zEC12.s
|
||||
+++ b/gas/testsuite/gas/s390/zarch-zEC12.s
|
||||
@@ -44,8 +44,11 @@ foo:
|
||||
clgtnh %r6,-5555(%r7)
|
||||
|
||||
risbgn %r6,%r7,12,13,14
|
||||
+ risbgn %r6,%r7,12,13
|
||||
risbgn %r6,%r7,12,188,14
|
||||
+ risbgn %r6,%r7,12,188
|
||||
risbgnz %r6,%r7,12,20,14
|
||||
+ risbgnz %r6,%r7,12,20
|
||||
|
||||
cdzt %f6,4000(16,%r8),13
|
||||
cxzt %f4,4000(34,%r8),13
|
||||
diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt
|
||||
index b7efa813e47..9aeb2cc7ad1 100644
|
||||
--- a/opcodes/s390-opc.txt
|
||||
+++ b/opcodes/s390-opc.txt
|
||||
@@ -305,6 +305,7 @@ b30d debr RRE_FF "divide short bfp" g5 esa,zarch
|
||||
ed000000000d deb RXE_FRRD "divide short bfp" g5 esa,zarch
|
||||
b35b didbr RRF_FUFF "divide to integer long bfp" g5 esa,zarch
|
||||
b353 diebr RRF_FUFF "divide to integer short bfp" g5 esa,zarch
|
||||
+# efpc and sfpc have only one operand; retain RR register format for compatibility
|
||||
b38c efpc RRE_RR "extract fpc" g5 esa,zarch optparm
|
||||
b342 ltxbr RRE_FEFE "load and test extended bfp" g5 esa,zarch
|
||||
b312 ltdbr RRE_FF "load and test long bfp" g5 esa,zarch
|
||||
@@ -348,6 +349,7 @@ b31f msdbr RRF_F0FF "multiply and subtract long bfp" g5 esa,zarch
|
||||
ed000000001f msdb RXF_FRRDF "multiply and subtract long bfp" g5 esa,zarch
|
||||
b30f msebr RRF_F0FF "multiply and subtract short bfp" g5 esa,zarch
|
||||
ed000000000f mseb RXF_FRRDF "multiply and subtract short bfp" g5 esa,zarch
|
||||
+# efpc and sfpc have only one operand; retain RR register format for compatibility
|
||||
b384 sfpc RRE_RR "set fpc" g5 esa,zarch optparm
|
||||
b299 srnm S_RD "set rounding mode" g5 esa,zarch
|
||||
b316 sqxbr RRE_FEFE "square root extended bfp" g5 esa,zarch
|
||||
@@ -966,11 +968,11 @@ c201 msfi RIL_RI "multiply single immediate (32)" z10 zarch
|
||||
c200 msgfi RIL_RI "multiply single immediate (64)" z10 zarch
|
||||
e30000000036 pfd RXY_URRD "prefetch data" z10 zarch
|
||||
c602 pfdrl RIL_UP "prefetch data relative long" z10 zarch
|
||||
-ec0000000054 rnsbg RIE_RRUUU "rotate then and selected bits" z10 zarch
|
||||
-ec0000000057 rxsbg RIE_RRUUU "rotate then exclusive or selected bits" z10 zarch
|
||||
-ec0000000056 rosbg RIE_RRUUU "rotate then or selected bits" z10 zarch
|
||||
-ec0000000055 risbg RIE_RRUUU "rotate then insert selected bits" z10 zarch
|
||||
-ec0000800055 risbgz RIE_RRUUU2 "rotate then insert selected bits and zero remaining bits" z10 zarch
|
||||
+ec0000000054 rnsbg RIE_RRUUU "rotate then and selected bits" z10 zarch optparm
|
||||
+ec0000000057 rxsbg RIE_RRUUU "rotate then exclusive or selected bits" z10 zarch optparm
|
||||
+ec0000000056 rosbg RIE_RRUUU "rotate then or selected bits" z10 zarch optparm
|
||||
+ec0000000055 risbg RIE_RRUUU "rotate then insert selected bits" z10 zarch optparm
|
||||
+ec0000800055 risbgz RIE_RRUUU2 "rotate then insert selected bits and zero remaining bits" z10 zarch optparm
|
||||
c40f strl RIL_RP "store relative long (32)" z10 zarch
|
||||
c40b stgrl RIL_RP "store relative long (64)" z10 zarch
|
||||
c407 sthrl RIL_RP "store halfword relative long" z10 zarch
|
||||
@@ -1014,8 +1016,8 @@ e300000000c4 lhh RXY_RRRD "load halfword high" z196 zarch
|
||||
e300000000ca lfh RXY_RRRD "load high" z196 zarch
|
||||
e300000000c2 llch RXY_RRRD "load logical character high" z196 zarch
|
||||
e300000000c6 llhh RXY_RRRD "load logical halfword high" z196 zarch
|
||||
-ec000000005d risbhg RIE_RRUUU "rotate then insert selected bits high" z196 zarch
|
||||
-ec0000000051 risblg RIE_RRUUU "rotate then insert selected bits low" z196 zarch
|
||||
+ec000000005d risbhg RIE_RRUUU "rotate then insert selected bits high" z196 zarch optparm
|
||||
+ec0000000051 risblg RIE_RRUUU "rotate then insert selected bits low" z196 zarch optparm
|
||||
e300000000c3 stch RXY_RRRD "store character high" z196 zarch
|
||||
e300000000c7 sthh RXY_RRRD "store halfword high" z196 zarch
|
||||
e300000000cb stfh RXY_RRRD "store high" z196 zarch
|
||||
@@ -1153,8 +1155,8 @@ eb0000000023 clt RSY_RURD "compare logical and trap 32 bit reg-mem" zEC12 zarch
|
||||
eb0000000023 clt$12 RSY_R0RD "compare logical and trap 32 bit reg-mem" zEC12 zarch
|
||||
eb000000002b clgt RSY_RURD "compare logical and trap 64 bit reg-mem" zEC12 zarch
|
||||
eb000000002b clgt$12 RSY_R0RD "compare logical and trap 64 bit reg-mem" zEC12 zarch
|
||||
-ec0000000059 risbgn RIE_RRUUU "rotate then insert selected bits nocc" zEC12 zarch
|
||||
-ec0000800059 risbgnz RIE_RRUUU2 "rotate then insert selected bits and zero remaining bits nocc" zEC12 zarch
|
||||
+ec0000000059 risbgn RIE_RRUUU "rotate then insert selected bits nocc" zEC12 zarch optparm
|
||||
+ec0000800059 risbgnz RIE_RRUUU2 "rotate then insert selected bits and zero remaining bits nocc" zEC12 zarch optparm
|
||||
ed00000000aa cdzt RSL_LRDFU "convert from zoned long" zEC12 zarch
|
||||
ed00000000ab cxzt RSL_LRDFEU "convert from zoned extended" zEC12 zarch
|
||||
ed00000000a8 czdt RSL_LRDFU "convert to zoned long" zEC12 zarch
|
||||
--
|
||||
2.47.0
|
||||
|
||||
@ -1,532 +0,0 @@
|
||||
From 2bf1f788bd7941375af27741715af645faa1cee6 Mon Sep 17 00:00:00 2001
|
||||
From: Jens Remus <jremus@linux.ibm.com>
|
||||
Date: Thu, 23 Nov 2023 15:48:15 +0100
|
||||
Subject: [PATCH] s390: Add missing extended mnemonics
|
||||
|
||||
Commit: aab23df73e55
|
||||
|
||||
Add extended mnemonics specified in the z/Architecture Principles of
|
||||
Operation [1] and z/Architecture Reference Summary [2], that were
|
||||
previously missing from the opcode table.
|
||||
|
||||
The following added extended mnemonics are synonyms to a base mnemonic
|
||||
and therefore disassemble into their base mnemonic:
|
||||
jc, jcth, lfi, llgfi, llghi
|
||||
|
||||
The following added extended mnemonics are more specific than their base
|
||||
mnemonic and therefore disassemble into the added extended mnemonic:
|
||||
risbhgz, risblgz, rnsbgt, rosbgt, rxsbgt
|
||||
|
||||
The following added extended mnemonics are more specific than their base
|
||||
mnemonic, but disassemble into their base mnemonic due to design
|
||||
constraints:
|
||||
notr, notgr
|
||||
|
||||
The missing extended mnemonic jl* conditional jump long flavors cannot
|
||||
be added, as they would clash with the existing non-standard extended
|
||||
mnemonic j* conditional jump flavors jle and jlh. The missing extended
|
||||
mnemonic jlc jump long conditional is not added, as the related jl*
|
||||
flavors cannot be added.
|
||||
Note that these missing jl* conditional jump long flavors are already
|
||||
defined as non-standard jg* flavors instead. While the related missing
|
||||
extended mnemonic jlc could be added as non-standard jgc instead it is
|
||||
forgone in favor of not adding further non-standard mnemonics.
|
||||
|
||||
The missing extended mnemonics sllhh, sllhl, slllh, srlhh, srlhl, and
|
||||
srllh cannot be implemented using the current design, as they require
|
||||
computed operands. For that reason the following missing extended
|
||||
mnemonics are not added as well, as they fall into the same category of
|
||||
instructions that operate on high and low words of registers. They
|
||||
should better be added together, not to confuse the user, which of those
|
||||
instructions are currently implemented or not.
|
||||
lhhr, lhlr, llhfr, llchhr, llchlr, llclhr, llhhhr, llhhlr, llhlhr,
|
||||
nhhr, nhlr, nlhr, ohhr, ohlr, olhr, xhhr, xhlr, xlhr
|
||||
|
||||
[1] IBM z/Architecture Principles of Operation, SA22-7832-13, IBM z16,
|
||||
https://publibfp.dhe.ibm.com/epubs/pdf/a227832d.pdf
|
||||
[2] IBM z/Architecture Reference Summary, SA22-7871-11,
|
||||
https://www.ibm.com/support/pages/sites/default/files/2022-09/SA22-7871-11.pdf
|
||||
|
||||
opcodes/
|
||||
* s390-opc.c: Define operand formats R_CP16_28, U6_18, and
|
||||
U5_27. Define instruction formats RIE_RRUUU3, RIE_RRUUU4,
|
||||
and RRF_R0RR4.
|
||||
* s390-opc.txt: Add extended mnemonics jc, jcth, lfi, llgfi,
|
||||
llghi, notgr, notr, risbhgz, risblgz, rnsbgt, rosbgt, and
|
||||
rxsbgt.
|
||||
|
||||
gas/
|
||||
* config/tc-s390.c: Add support to insert operand for format
|
||||
R_CP16_28, reusing existing logic for format V_CP16_12.
|
||||
* testsuite/gas/s390/esa-g5.s: Add test for extended mnemonic
|
||||
jc.
|
||||
* testsuite/gas/s390/esa-g5.d: Likewise.
|
||||
* testsuite/gas/s390/zarch-z900.s: Add test for extended
|
||||
mnemonic llghi.
|
||||
* testsuite/gas/s390/zarch-z900.d: Likewise.
|
||||
* testsuite/gas/s390/zarch-z9-109.s: Add tests for extended
|
||||
mnemonics lfi and llgfi.
|
||||
* testsuite/gas/s390/zarch-z9-109.d: Likewise.
|
||||
* testsuite/gas/s390/zarch-z10.s: Add tests for extended
|
||||
mnemonics rnsbgt, rosbgt, and rxsbgt.
|
||||
* testsuite/gas/s390/zarch-z10.d: Likewise.
|
||||
* testsuite/gas/s390/zarch-z196.s: Add tests for extended
|
||||
mnemonics jcth, risbhgz, and risblgz.
|
||||
* testsuite/gas/s390/zarch-z196.d: Likewise.
|
||||
* testsuite/gas/s390/zarch-arch13.s: Add tests for extended
|
||||
mnemonics notr and notgr.
|
||||
* testsuite/gas/s390/zarch-arch13.d: Likewise.
|
||||
|
||||
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
|
||||
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
|
||||
---
|
||||
gas/config/tc-s390.c | 12 ++++++++----
|
||||
gas/testsuite/gas/s390/esa-g5.d | 1 +
|
||||
gas/testsuite/gas/s390/esa-g5.s | 1 +
|
||||
gas/testsuite/gas/s390/zarch-arch13.d | 4 ++++
|
||||
gas/testsuite/gas/s390/zarch-arch13.s | 4 ++++
|
||||
gas/testsuite/gas/s390/zarch-z10.d | 12 ++++++++++++
|
||||
gas/testsuite/gas/s390/zarch-z10.s | 12 ++++++++++++
|
||||
gas/testsuite/gas/s390/zarch-z196.d | 10 +++++++++-
|
||||
gas/testsuite/gas/s390/zarch-z196.s | 9 +++++++++
|
||||
gas/testsuite/gas/s390/zarch-z9-109.d | 2 ++
|
||||
gas/testsuite/gas/s390/zarch-z9-109.s | 2 ++
|
||||
gas/testsuite/gas/s390/zarch-z900.d | 5 +++--
|
||||
gas/testsuite/gas/s390/zarch-z900.s | 1 +
|
||||
opcodes/s390-opc.c | 22 +++++++++++++++++-----
|
||||
opcodes/s390-opc.txt | 14 ++++++++++++++
|
||||
15 files changed, 99 insertions(+), 12 deletions(-)
|
||||
|
||||
diff --git a/gas/config/tc-s390.c b/gas/config/tc-s390.c
|
||||
index 765a9a2e6bd..d601618d9dc 100644
|
||||
--- a/gas/config/tc-s390.c
|
||||
+++ b/gas/config/tc-s390.c
|
||||
@@ -699,13 +699,17 @@ s390_insert_operand (unsigned char *insn,
|
||||
if (operand->flags & S390_OPERAND_OR8)
|
||||
uval |= 8;
|
||||
|
||||
- /* Duplicate the operand at bit pos 12 to 16. */
|
||||
+ /* Duplicate the GPR/VR operand at bit pos 12 to 16. */
|
||||
if (operand->flags & S390_OPERAND_CP16)
|
||||
{
|
||||
- /* Copy VR operand at bit pos 12 to bit pos 16. */
|
||||
+ /* Copy GPR/VR operand at bit pos 12 to bit pos 16. */
|
||||
insn[2] |= uval << 4;
|
||||
- /* Copy the flag in the RXB field. */
|
||||
- insn[4] |= (insn[4] & 4) >> 1;
|
||||
+
|
||||
+ if (operand->flags & S390_OPERAND_VR)
|
||||
+ {
|
||||
+ /* Copy the VR flag in the RXB field. */
|
||||
+ insn[4] |= (insn[4] & 4) >> 1;
|
||||
+ }
|
||||
}
|
||||
|
||||
/* Insert fragments of the operand byte for byte. */
|
||||
diff --git a/gas/testsuite/gas/s390/esa-g5.d b/gas/testsuite/gas/s390/esa-g5.d
|
||||
index 7422e88b127..d276af1a70d 100644
|
||||
--- a/gas/testsuite/gas/s390/esa-g5.d
|
||||
+++ b/gas/testsuite/gas/s390/esa-g5.d
|
||||
@@ -80,6 +80,7 @@ Disassembly of section .text:
|
||||
*([\da-f]+): a7 95 00 00 [ ]*bras %r9,\1 <foo\+0x\1>
|
||||
*([\da-f]+): a7 65 00 00 [ ]*bras %r6,\1 <foo\+0x\1>
|
||||
*([\da-f]+): a7 64 00 00 [ ]*jlh \1 <foo\+0x\1>
|
||||
+ *([\da-f]+): a7 64 00 00 [ ]*jlh \1 <foo\+0x\1>
|
||||
*([\da-f]+): a7 66 00 00 [ ]*brct %r6,\1 <foo\+0x\1>
|
||||
*([\da-f]+): a7 66 00 00 [ ]*brct %r6,\1 <foo\+0x\1>
|
||||
*([\da-f]+): 84 69 00 00 [ ]*brxh %r6,%r9,\1 <foo\+0x\1>
|
||||
diff --git a/gas/testsuite/gas/s390/esa-g5.s b/gas/testsuite/gas/s390/esa-g5.s
|
||||
index ee3d6319b19..2901a866ec9 100644
|
||||
--- a/gas/testsuite/gas/s390/esa-g5.s
|
||||
+++ b/gas/testsuite/gas/s390/esa-g5.s
|
||||
@@ -74,6 +74,7 @@ foo:
|
||||
bras %r9,.
|
||||
jas %r6,.
|
||||
brc 6,.
|
||||
+ jc 6,.
|
||||
brct 6,.
|
||||
jct %r6,.
|
||||
brxh %r6,%r9,.
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-arch13.d b/gas/testsuite/gas/s390/zarch-arch13.d
|
||||
index fecbeb548c0..3ebdd9c17f3 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-arch13.d
|
||||
+++ b/gas/testsuite/gas/s390/zarch-arch13.d
|
||||
@@ -12,7 +12,11 @@ Disassembly of section .text:
|
||||
.*: b9 74 b0 69 [ ]*nnrk %r6,%r9,%r11
|
||||
.*: b9 64 b0 69 [ ]*nngrk %r6,%r9,%r11
|
||||
.*: b9 76 b0 69 [ ]*nork %r6,%r9,%r11
|
||||
+.*: b9 76 70 67 [ ]*nork %r6,%r7,%r7
|
||||
+.*: b9 76 70 67 [ ]*nork %r6,%r7,%r7
|
||||
.*: b9 66 b0 69 [ ]*nogrk %r6,%r9,%r11
|
||||
+.*: b9 66 70 67 [ ]*nogrk %r6,%r7,%r7
|
||||
+.*: b9 66 70 67 [ ]*nogrk %r6,%r7,%r7
|
||||
.*: b9 77 b0 69 [ ]*nxrk %r6,%r9,%r11
|
||||
.*: b9 67 b0 69 [ ]*nxgrk %r6,%r9,%r11
|
||||
.*: b9 75 b0 69 [ ]*ocrk %r6,%r9,%r11
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-arch13.s b/gas/testsuite/gas/s390/zarch-arch13.s
|
||||
index 9563a1b4698..a830b20b3a5 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-arch13.s
|
||||
+++ b/gas/testsuite/gas/s390/zarch-arch13.s
|
||||
@@ -6,7 +6,11 @@ foo:
|
||||
nnrk %r6,%r9,%r11
|
||||
nngrk %r6,%r9,%r11
|
||||
nork %r6,%r9,%r11
|
||||
+ nork %r6,%r7,%r7
|
||||
+ notr %r6,%r7
|
||||
nogrk %r6,%r9,%r11
|
||||
+ nogrk %r6,%r7,%r7
|
||||
+ notgr %r6,%r7
|
||||
nxrk %r6,%r9,%r11
|
||||
nxgrk %r6,%r9,%r11
|
||||
ocrk %r6,%r9,%r11
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-z10.d b/gas/testsuite/gas/s390/zarch-z10.d
|
||||
index 4aca8372363..4a051533f93 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-z10.d
|
||||
+++ b/gas/testsuite/gas/s390/zarch-z10.d
|
||||
@@ -361,10 +361,22 @@ Disassembly of section .text:
|
||||
*([\da-f]+): c6 a2 00 00 00 00 [ ]*pfdrl 10,\1 <foo\+0x\1>
|
||||
.*: ec 67 d2 dc e6 54 [ ]*rnsbg %r6,%r7,210,220,230
|
||||
.*: ec 67 d2 dc 00 54 [ ]*rnsbg %r6,%r7,210,220
|
||||
+.*: ec 67 92 dc e6 54 [ ]*rnsbgt %r6,%r7,18,220,230
|
||||
+.*: ec 67 92 dc 00 54 [ ]*rnsbgt %r6,%r7,18,220
|
||||
+.*: ec 67 92 1c 26 54 [ ]*rnsbgt %r6,%r7,18,28,38
|
||||
+.*: ec 67 92 1c 00 54 [ ]*rnsbgt %r6,%r7,18,28
|
||||
.*: ec 67 d2 dc e6 57 [ ]*rxsbg %r6,%r7,210,220,230
|
||||
.*: ec 67 d2 dc 00 57 [ ]*rxsbg %r6,%r7,210,220
|
||||
+.*: ec 67 92 dc e6 57 [ ]*rxsbgt %r6,%r7,18,220,230
|
||||
+.*: ec 67 92 dc 00 57 [ ]*rxsbgt %r6,%r7,18,220
|
||||
+.*: ec 67 92 1c 26 57 [ ]*rxsbgt %r6,%r7,18,28,38
|
||||
+.*: ec 67 92 1c 00 57 [ ]*rxsbgt %r6,%r7,18,28
|
||||
.*: ec 67 d2 dc e6 56 [ ]*rosbg %r6,%r7,210,220,230
|
||||
.*: ec 67 d2 dc 00 56 [ ]*rosbg %r6,%r7,210,220
|
||||
+.*: ec 67 92 dc e6 56 [ ]*rosbgt %r6,%r7,18,220,230
|
||||
+.*: ec 67 92 dc 00 56 [ ]*rosbgt %r6,%r7,18,220
|
||||
+.*: ec 67 92 1c 26 56 [ ]*rosbgt %r6,%r7,18,28,38
|
||||
+.*: ec 67 92 1c 00 56 [ ]*rosbgt %r6,%r7,18,28
|
||||
.*: ec 67 d2 14 e6 55 [ ]*risbg %r6,%r7,210,20,230
|
||||
.*: ec 67 d2 14 00 55 [ ]*risbg %r6,%r7,210,20
|
||||
.*: ec 67 d2 bc e6 55 [ ]*risbgz %r6,%r7,210,60,230
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-z10.s b/gas/testsuite/gas/s390/zarch-z10.s
|
||||
index 3ed61a4f0fd..45bb8944793 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-z10.s
|
||||
+++ b/gas/testsuite/gas/s390/zarch-z10.s
|
||||
@@ -355,10 +355,22 @@ foo:
|
||||
pfdrl 10,.
|
||||
rnsbg %r6,%r7,210,220,230
|
||||
rnsbg %r6,%r7,210,220
|
||||
+ rnsbg %r6,%r7,146,220,230
|
||||
+ rnsbg %r6,%r7,146,220
|
||||
+ rnsbgt %r6,%r7,18,28,38
|
||||
+ rnsbgt %r6,%r7,18,28
|
||||
rxsbg %r6,%r7,210,220,230
|
||||
rxsbg %r6,%r7,210,220
|
||||
+ rxsbg %r6,%r7,146,220,230
|
||||
+ rxsbg %r6,%r7,146,220
|
||||
+ rxsbgt %r6,%r7,18,28,38
|
||||
+ rxsbgt %r6,%r7,18,28
|
||||
rosbg %r6,%r7,210,220,230
|
||||
rosbg %r6,%r7,210,220
|
||||
+ rosbg %r6,%r7,146,220,230
|
||||
+ rosbg %r6,%r7,146,220
|
||||
+ rosbgt %r6,%r7,18,28,38
|
||||
+ rosbgt %r6,%r7,18,28
|
||||
risbg %r6,%r7,210,20,230
|
||||
risbg %r6,%r7,210,20
|
||||
risbg %r6,%r7,210,188,230
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-z196.d b/gas/testsuite/gas/s390/zarch-z196.d
|
||||
index b9db65f43ee..ac2478d6219 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-z196.d
|
||||
+++ b/gas/testsuite/gas/s390/zarch-z196.d
|
||||
@@ -14,6 +14,7 @@ Disassembly of section .text:
|
||||
.*: cc 6a 00 00 fd e8 [ ]*alsih %r6,65000
|
||||
.*: cc 6b 00 00 fd e8 [ ]*alsihn %r6,65000
|
||||
*([\da-f]+): cc 66 00 00 00 00 [ ]*brcth %r6,\1 <foo\+0x\1>
|
||||
+ *([\da-f]+): cc 66 00 00 00 00 [ ]*brcth %r6,\1 <foo\+0x\1>
|
||||
.*: b9 cd 00 67 [ ]*chhr %r6,%r7
|
||||
.*: b9 dd 00 67 [ ]*chlr %r6,%r7
|
||||
.*: e3 67 85 b3 01 cd [ ]*chf %r6,5555\(%r7,%r8\)
|
||||
@@ -30,8 +31,16 @@ Disassembly of section .text:
|
||||
.*: e3 67 8a 4d fe c6 [ ]*llhh %r6,-5555\(%r7,%r8\)
|
||||
.*: ec 67 0c 0d 0e 5d [ ]*risbhg %r6,%r7,12,13,14
|
||||
.*: ec 67 0c 0d 00 5d [ ]*risbhg %r6,%r7,12,13
|
||||
+.*: ec 67 0c 8d 0e 5d [ ]*risbhgz %r6,%r7,12,13,14
|
||||
+.*: ec 67 0c 8d 00 5d [ ]*risbhgz %r6,%r7,12,13
|
||||
+.*: ec 67 0c 8d 0e 5d [ ]*risbhgz %r6,%r7,12,13,14
|
||||
+.*: ec 67 0c 8d 00 5d [ ]*risbhgz %r6,%r7,12,13
|
||||
.*: ec 67 0c 0d 0e 51 [ ]*risblg %r6,%r7,12,13,14
|
||||
.*: ec 67 0c 0d 00 51 [ ]*risblg %r6,%r7,12,13
|
||||
+.*: ec 67 0c 8d 0e 51 [ ]*risblgz %r6,%r7,12,13,14
|
||||
+.*: ec 67 0c 8d 00 51 [ ]*risblgz %r6,%r7,12,13
|
||||
+.*: ec 67 0c 8d 0e 51 [ ]*risblgz %r6,%r7,12,13,14
|
||||
+.*: ec 67 0c 8d 00 51 [ ]*risblgz %r6,%r7,12,13
|
||||
.*: e3 67 8a 4d fe c3 [ ]*stch %r6,-5555\(%r7,%r8\)
|
||||
.*: e3 67 8a 4d fe c7 [ ]*sthh %r6,-5555\(%r7,%r8\)
|
||||
.*: e3 67 8a 4d fe cb [ ]*stfh %r6,-5555\(%r7,%r8\)
|
||||
@@ -261,4 +270,3 @@ Disassembly of section .text:
|
||||
.*: b9 2c 00 00 [ ]*pcc
|
||||
.*: b9 2d 60 59 [ ]*kmctr %r5,%r6,%r9
|
||||
.*: b9 28 00 00 [ ]*pckmo
|
||||
-.*: 07 07 [ ]*nopr %r7
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-z196.s b/gas/testsuite/gas/s390/zarch-z196.s
|
||||
index 213c2a1e676..bd594259532 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-z196.s
|
||||
+++ b/gas/testsuite/gas/s390/zarch-z196.s
|
||||
@@ -8,6 +8,7 @@ foo:
|
||||
alsih %r6,65000
|
||||
alsihn %r6,65000
|
||||
brcth %r6,.
|
||||
+ jcth %r6,.
|
||||
chhr %r6,%r7
|
||||
chlr %r6,%r7
|
||||
chf %r6,5555(%r7,%r8)
|
||||
@@ -24,8 +25,16 @@ foo:
|
||||
llhh %r6,-5555(%r7,%r8)
|
||||
risbhg %r6,%r7,12,13,14
|
||||
risbhg %r6,%r7,12,13
|
||||
+ risbhg %r6,%r7,12,141,14
|
||||
+ risbhg %r6,%r7,12,141
|
||||
+ risbhgz %r6,%r7,12,13,14
|
||||
+ risbhgz %r6,%r7,12,13
|
||||
risblg %r6,%r7,12,13,14
|
||||
risblg %r6,%r7,12,13
|
||||
+ risblg %r6,%r7,12,141,14
|
||||
+ risblg %r6,%r7,12,141
|
||||
+ risblgz %r6,%r7,12,13,14
|
||||
+ risblgz %r6,%r7,12,13
|
||||
stch %r6,-5555(%r7,%r8)
|
||||
sthh %r6,-5555(%r7,%r8)
|
||||
stfh %r6,-5555(%r7,%r8)
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-z9-109.d b/gas/testsuite/gas/s390/zarch-z9-109.d
|
||||
index 5a9717c24ac..012270e733f 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-z9-109.d
|
||||
+++ b/gas/testsuite/gas/s390/zarch-z9-109.d
|
||||
@@ -36,6 +36,7 @@ Disassembly of section .text:
|
||||
.*: b9 85 00 69 [ ]*llghr %r6,%r9
|
||||
.*: c0 6e ff ff ff ff [ ]*llihf %r6,4294967295
|
||||
.*: c0 6f ff ff ff ff [ ]*llilf %r6,4294967295
|
||||
+.*: c0 6f ff ff ff ff [ ]*llilf %r6,4294967295
|
||||
.*: c0 6c ff ff ff ff [ ]*oihf %r6,4294967295
|
||||
.*: c0 6d ff ff ff ff [ ]*oilf %r6,4294967295
|
||||
.*: c2 65 ff ff ff ff [ ]*slfi %r6,4294967295
|
||||
@@ -70,4 +71,5 @@ Disassembly of section .text:
|
||||
.*: ed 95 af ff 60 38 [ ]*mayl %f6,%f9,4095\(%r5,%r10\)
|
||||
.*: b9 be 00 67 [ ]*srstu %r6,%r7
|
||||
.*: d0 16 5f ff ad 05 [ ]*trtr 4095\(23,%r5\),3333\(%r10\)
|
||||
+.*: c0 69 ff ff ff ff [ ]*iilf %r6,4294967295
|
||||
.*: 07 07 [ ]*nopr %r7
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-z9-109.s b/gas/testsuite/gas/s390/zarch-z9-109.s
|
||||
index 10d77ac673e..22dca84fd32 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-z9-109.s
|
||||
+++ b/gas/testsuite/gas/s390/zarch-z9-109.s
|
||||
@@ -30,6 +30,7 @@ foo:
|
||||
llghr %r6,%r9
|
||||
llihf %r6,4294967295
|
||||
llilf %r6,4294967295
|
||||
+ llgfi %r6,4294967295
|
||||
oihf %r6,4294967295
|
||||
oilf %r6,4294967295
|
||||
slfi %r6,4294967295
|
||||
@@ -64,3 +65,4 @@ foo:
|
||||
mayl %f6,%f9,4095(%r5,%r10)
|
||||
srstu %r6,%r7
|
||||
trtr 4095(23,%r5),3333(%r10)
|
||||
+ lfi %r6,4294967295
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-z900.d b/gas/testsuite/gas/s390/zarch-z900.d
|
||||
index 93aee212785..88751711c1b 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-z900.d
|
||||
+++ b/gas/testsuite/gas/s390/zarch-z900.d
|
||||
@@ -85,6 +85,7 @@ Disassembly of section .text:
|
||||
.*: a5 9d ff ff [ ]*llihl %r9,65535
|
||||
.*: a5 9e ff ff [ ]*llilh %r9,65535
|
||||
.*: a5 9f ff ff [ ]*llill %r9,65535
|
||||
+.*: a5 9f ff ff [ ]*llill %r9,65535
|
||||
.*: ef 96 5f ff af ff [ ]*lmd %r9,%r6,4095\(%r5\),4095\(%r10\)
|
||||
.*: eb 96 5f ff 00 04 [ ]*lmg %r9,%r6,4095\(%r5\)
|
||||
.*: eb 96 5f ff 00 96 [ ]*lmh %r9,%r6,4095\(%r5\)
|
||||
@@ -153,6 +154,6 @@ Disassembly of section .text:
|
||||
*([\da-f]+): c0 65 00 00 00 00 [ ]*brasl %r6,\1 <foo\+0x\1>
|
||||
*([\da-f]+): c0 65 80 00 00 00 [ ]*brasl %r6,ffffffff0+\1 <foo\+0xffffffff0+\1>
|
||||
*([\da-f]+): c0 65 80 00 00 00 [ ]*brasl %r6,ffffffff0+\1 <foo\+0xffffffff0+\1>
|
||||
-.*: c0 65 7f ff ff ff [ ]*brasl %r6,1000002d0 <foo\+0x1000002d0>
|
||||
-.*: c0 65 7f ff ff ff [ ]*brasl %r6,1000002d6 <foo\+0x1000002d6>
|
||||
+.*: c0 65 7f ff ff ff [ ]*brasl %r6,1000002d4 <foo\+0x1000002d4>
|
||||
+.*: c0 65 7f ff ff ff [ ]*brasl %r6,1000002da <foo\+0x1000002da>
|
||||
.*: 07 07 [ ]*nopr %r7
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-z900.s b/gas/testsuite/gas/s390/zarch-z900.s
|
||||
index 22fa1da5a30..8890fbb78a0 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-z900.s
|
||||
+++ b/gas/testsuite/gas/s390/zarch-z900.s
|
||||
@@ -79,6 +79,7 @@ foo:
|
||||
llihl %r9,65535
|
||||
llilh %r9,65535
|
||||
llill %r9,65535
|
||||
+ llghi %r9,65535
|
||||
lmd %r9,%r6,4095(%r5),4095(%r10)
|
||||
lmg %r9,%r6,4095(%r5)
|
||||
lmh %r9,%r6,4095(%r5)
|
||||
diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c
|
||||
index b52fc8c3b62..0427bd8b2e0 100644
|
||||
--- a/opcodes/s390-opc.c
|
||||
+++ b/opcodes/s390-opc.c
|
||||
@@ -62,7 +62,9 @@ const struct s390_operand s390_operands[] =
|
||||
{ 4, 24, S390_OPERAND_GPR },
|
||||
#define R_28 (R_24 + 1) /* GPR starting at position 28 */
|
||||
{ 4, 28, S390_OPERAND_GPR },
|
||||
-#define R_32 (R_28 + 1) /* GPR starting at position 32 */
|
||||
+#define R_CP16_28 (R_28 + 1) /* GPR starting at position 28 */
|
||||
+ { 4, 28, S390_OPERAND_GPR | S390_OPERAND_CP16 }, /* with a copy at pos 16 */
|
||||
+#define R_32 (R_CP16_28+1) /* GPR starting at position 32 */
|
||||
{ 4, 32, S390_OPERAND_GPR },
|
||||
|
||||
/* General purpose register pair operands. */
|
||||
@@ -222,9 +224,13 @@ const struct s390_operand s390_operands[] =
|
||||
{ 4, 36, 0 },
|
||||
#define U8_8 (U4_36 + 1) /* 8 bit unsigned value starting at 8 */
|
||||
{ 8, 8, 0 },
|
||||
-#define U8_16 (U8_8 + 1) /* 8 bit unsigned value starting at 16 */
|
||||
+#define U6_18 (U8_8 + 1) /* 6 bit unsigned value starting at 18 */
|
||||
+ { 6, 18, 0 },
|
||||
+#define U8_16 (U6_18 + 1) /* 8 bit unsigned value starting at 16 */
|
||||
{ 8, 16, 0 },
|
||||
-#define U6_26 (U8_16 + 1) /* 6 bit unsigned value starting at 26 */
|
||||
+#define U5_27 (U8_16 + 1) /* 5 bit unsigned value starting at 27 */
|
||||
+ { 5, 27, 0 },
|
||||
+#define U6_26 (U5_27 + 1) /* 6 bit unsigned value starting at 26 */
|
||||
{ 6, 26, 0 },
|
||||
#define U8_24 (U6_26 + 1) /* 8 bit unsigned value starting at 24 */
|
||||
{ 8, 24, 0 },
|
||||
@@ -289,7 +295,7 @@ static inline void unused_s390_operands_static_asserts(void)
|
||||
p - pc relative
|
||||
r - general purpose register
|
||||
re - gpr extended operand, a valid general purpose register pair
|
||||
- u - unsigned integer, 4, 8, 16 or 32 bit
|
||||
+ u - unsigned integer, 4, 6, 8, 16 or 32 bit
|
||||
m - mode field, 4 bit
|
||||
0 - operand skipped.
|
||||
The order of the letters reflects the layout of the format in
|
||||
@@ -325,7 +331,9 @@ static inline void unused_s390_operands_static_asserts(void)
|
||||
#define INSTR_RIE_R0U0 6, { R_8,U16_16,0,0,0,0 } /* e.g. clfitne */
|
||||
#define INSTR_RIE_RUI0 6, { R_8,I16_16,U4_12,0,0,0 } /* e.g. lochi */
|
||||
#define INSTR_RIE_RRUUU 6, { R_8,R_12,U8_16,U8_24,U8_32,0 } /* e.g. rnsbg */
|
||||
-#define INSTR_RIE_RRUUU2 6, { R_8,R_12,U8_16,U6_26,U8_32,0 } /* e.g. rnsbg */
|
||||
+#define INSTR_RIE_RRUUU2 6, { R_8,R_12,U8_16,U6_26,U8_32,0 } /* e.g. risbgz */
|
||||
+#define INSTR_RIE_RRUUU3 6, { R_8,R_12,U8_16,U5_27,U8_32,0 } /* e.g. risbhg */
|
||||
+#define INSTR_RIE_RRUUU4 6, { R_8,R_12,U6_18,U8_24,U8_32,0 } /* e.g. rnsbgt */
|
||||
#define INSTR_RIL_0P 6, { J32_16,0,0,0,0 } /* e.g. jg */
|
||||
#define INSTR_RIL_RP 6, { R_8,J32_16,0,0,0,0 } /* e.g. brasl */
|
||||
#define INSTR_RIL_UP 6, { U4_8,J32_16,0,0,0,0 } /* e.g. brcl */
|
||||
@@ -374,6 +382,7 @@ static inline void unused_s390_operands_static_asserts(void)
|
||||
#define INSTR_RRF_R0RR2 4, { R_24,R_28,R_16,0,0,0 } /* e.g. ark */
|
||||
#define INSTR_RRF_R0RER 4, { RE_24,R_28,R_16,0,0,0 } /* e.g. mgrk */
|
||||
#define INSTR_RRF_R0RR3 4, { R_24,R_28,R_16,0,0,0 } /* e.g. selrz */
|
||||
+#define INSTR_RRF_R0RR4 4, { R_24,R_CP16_28,0,0,0,0 } /* e.g. notr */
|
||||
#define INSTR_RRF_U0FF 4, { F_24,U4_16,F_28,0,0,0 } /* e.g. fidbr */
|
||||
#define INSTR_RRF_U0FEFE 4, { FE_24,U4_16,FE_28,0,0,0 } /* e.g. fixbr */
|
||||
#define INSTR_RRF_U0RF 4, { R_24,U4_16,F_28,0,0,0 } /* e.g. cfebr */
|
||||
@@ -550,6 +559,8 @@ static inline void unused_s390_operands_static_asserts(void)
|
||||
#define MASK_RIE_RUI0 { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
|
||||
#define MASK_RIE_RRUUU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
|
||||
#define MASK_RIE_RRUUU2 { 0xff, 0x00, 0x00, 0xc0, 0x00, 0xff }
|
||||
+#define MASK_RIE_RRUUU3 { 0xff, 0x00, 0x00, 0xe0, 0x00, 0xff }
|
||||
+#define MASK_RIE_RRUUU4 { 0xff, 0x00, 0xc0, 0x00, 0x00, 0xff }
|
||||
#define MASK_RIL_0P { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
|
||||
#define MASK_RIL_RP { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
|
||||
#define MASK_RIL_UP { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
|
||||
@@ -598,6 +609,7 @@ static inline void unused_s390_operands_static_asserts(void)
|
||||
#define MASK_RRF_R0RR2 { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
|
||||
#define MASK_RRF_R0RER { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
|
||||
#define MASK_RRF_R0RR3 { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
|
||||
+#define MASK_RRF_R0RR4 { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
|
||||
#define MASK_RRF_U0FF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
|
||||
#define MASK_RRF_U0FEFE { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
|
||||
#define MASK_RRF_U0RF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
|
||||
diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt
|
||||
index 9aeb2cc7ad1..674c0cf1987 100644
|
||||
--- a/opcodes/s390-opc.txt
|
||||
+++ b/opcodes/s390-opc.txt
|
||||
@@ -272,6 +272,7 @@ a701 tml RI_RU "test under mask low" g5 esa,zarch
|
||||
4700 nop RX_0RRD "no operation" g5 esa,zarch optparm
|
||||
4700 b*8 RX_0RRD "conditional branch" g5 esa,zarch
|
||||
47f0 b RX_0RRD "unconditional branch" g5 esa,zarch
|
||||
+a704 jc RI_UP "conditional jump" g5 esa,zarch
|
||||
a704 jnop RI_0P "nop jump" g5 esa,zarch
|
||||
a704 j*8 RI_0P "conditional jump" g5 esa,zarch
|
||||
a704 br*8 RI_0P "conditional jump" g5 esa,zarch
|
||||
@@ -473,8 +474,10 @@ eb0000000080 icmh RSE_RURD "insert characters under mask high" z900 zarch
|
||||
a702 tmhh RI_RU "test under mask high high" z900 zarch
|
||||
a703 tmhl RI_RU "test under mask high low" z900 zarch
|
||||
c004 brcl RIL_UP "branch relative on condition long" z900 esa,zarch
|
||||
+# jlc omitted due to missing jl* (see jl*8) and not added as non-standard jgc
|
||||
c004 jgnop RIL_0P "nop jump long" z900 esa,zarch
|
||||
c004 jg*8 RIL_0P "conditional jump long" z900 esa,zarch
|
||||
+# jl*8 omitted due to clash with non-standard j*8 flavors jle and jlh; exists as non-standard jg*8 instead
|
||||
c004 br*8l RIL_0P "conditional jump long" z900 esa,zarch
|
||||
c0f4 jg RIL_0P "unconditional jump long" z900 esa,zarch
|
||||
c0f4 brul RIL_0P "unconditional jump long" z900 esa,zarch
|
||||
@@ -523,6 +526,7 @@ a50c llihh RI_RU "load logical immediate high high" z900 zarch
|
||||
a50d llihl RI_RU "load logical immediate high low" z900 zarch
|
||||
a50e llilh RI_RU "load logical immediate low high" z900 zarch
|
||||
a50f llill RI_RU "load logical immediate low low" z900 zarch
|
||||
+a50f llghi RI_RU "load logical immediate" z900 zarch
|
||||
b2b1 stfl S_RD "store facility list" z900 esa,zarch
|
||||
b2b2 lpswe S_RD "load psw extended" z900 zarch
|
||||
b90d dsgr RRE_RER "divide single 64" z900 zarch
|
||||
@@ -750,6 +754,7 @@ c006 xihf RIL_RU "exclusive or immediate high" z9-109 zarch
|
||||
c007 xilf RIL_RU "exclusive or immediate low" z9-109 zarch
|
||||
c008 iihf RIL_RU "insert immediate high" z9-109 zarch
|
||||
c009 iilf RIL_RU "insert immediate low" z9-109 zarch
|
||||
+c009 lfi RIL_RU "insert immediate 32" z9-109 zarch
|
||||
# z9-109 misc instruction
|
||||
b983 flogr RRE_RER "find leftmost one" z9-109 zarch
|
||||
e30000000012 lt RXY_RRRD "load and test 32" z9-109 zarch
|
||||
@@ -767,6 +772,7 @@ b995 llhr RRE_RR "load logical halfword 32" z9-109 zarch
|
||||
b985 llghr RRE_RR "load logical halfword 64" z9-109 zarch
|
||||
c00e llihf RIL_RU "load logical immediate high" z9-109 zarch
|
||||
c00f llilf RIL_RU "load logical immediate low" z9-109 zarch
|
||||
+c00f llgfi RIL_RU "load logical immediate" z9-109 zarch
|
||||
c00c oihf RIL_RU "or immediate high" z9-109 zarch
|
||||
c00d oilf RIL_RU "or immediate low" z9-109 zarch
|
||||
c205 slfi RIL_RU "subtract logical immediate 32" z9-109 zarch
|
||||
@@ -969,8 +975,11 @@ c200 msgfi RIL_RI "multiply single immediate (64)" z10 zarch
|
||||
e30000000036 pfd RXY_URRD "prefetch data" z10 zarch
|
||||
c602 pfdrl RIL_UP "prefetch data relative long" z10 zarch
|
||||
ec0000000054 rnsbg RIE_RRUUU "rotate then and selected bits" z10 zarch optparm
|
||||
+ec0080000054 rnsbgt RIE_RRUUU4 "rotate then and selected bits and test results" z10 zarch optparm
|
||||
ec0000000057 rxsbg RIE_RRUUU "rotate then exclusive or selected bits" z10 zarch optparm
|
||||
+ec0080000057 rxsbgt RIE_RRUUU4 "rotate then exclusive or selected bits and test results" z10 zarch optparm
|
||||
ec0000000056 rosbg RIE_RRUUU "rotate then or selected bits" z10 zarch optparm
|
||||
+ec0080000056 rosbgt RIE_RRUUU4 "rotate then or selected bits and test results" z10 zarch optparm
|
||||
ec0000000055 risbg RIE_RRUUU "rotate then insert selected bits" z10 zarch optparm
|
||||
ec0000800055 risbgz RIE_RRUUU2 "rotate then insert selected bits and zero remaining bits" z10 zarch optparm
|
||||
c40f strl RIL_RP "store relative long (32)" z10 zarch
|
||||
@@ -1003,6 +1012,7 @@ b9da alhhlr RRF_R0RR2 "add logical high low" z196 zarch
|
||||
cc0a alsih RIL_RI "add logical with signed immediate high with cc" z196 zarch
|
||||
cc0b alsihn RIL_RI "add logical with signed immediate high no cc" z196 zarch
|
||||
cc06 brcth RIL_RP "branch relative on count high" z196 zarch
|
||||
+cc06 jcth RIL_RP "jump on count high" z196 zarch
|
||||
b9cd chhr RRE_RR "compare high high" z196 zarch
|
||||
b9dd chlr RRE_RR "compare high low" z196 zarch
|
||||
e300000000cd chf RXY_RRRD "compare high" z196 zarch
|
||||
@@ -1017,7 +1027,9 @@ e300000000ca lfh RXY_RRRD "load high" z196 zarch
|
||||
e300000000c2 llch RXY_RRRD "load logical character high" z196 zarch
|
||||
e300000000c6 llhh RXY_RRRD "load logical halfword high" z196 zarch
|
||||
ec000000005d risbhg RIE_RRUUU "rotate then insert selected bits high" z196 zarch optparm
|
||||
+ec000080005d risbhgz RIE_RRUUU3 "rotate then insert selected bits high and zero remaining bits" z196 zarch optparm
|
||||
ec0000000051 risblg RIE_RRUUU "rotate then insert selected bits low" z196 zarch optparm
|
||||
+ec0000800051 risblgz RIE_RRUUU3 "rotate then insert selected bits low and zero remaining bits" z196 zarch optparm
|
||||
e300000000c3 stch RXY_RRRD "store character high" z196 zarch
|
||||
e300000000c7 sthh RXY_RRRD "store halfword high" z196 zarch
|
||||
e300000000cb stfh RXY_RRRD "store high" z196 zarch
|
||||
@@ -1913,7 +1925,9 @@ e50a mvcrl SSE_RDRD "move right to left" arch13 zarch
|
||||
b974 nnrk RRF_R0RR2 "nand 32 bit" arch13 zarch
|
||||
b964 nngrk RRF_R0RR2 "nand 64 bit" arch13 zarch
|
||||
b976 nork RRF_R0RR2 "nor 32 bit" arch13 zarch
|
||||
+b976 notr RRF_R0RR4 "not 32 bit" arch13 zarch
|
||||
b966 nogrk RRF_R0RR2 "nor 64 bit" arch13 zarch
|
||||
+b966 notgr RRF_R0RR4 "not 64 bit" arch13 zarch
|
||||
b977 nxrk RRF_R0RR2 "not exclusive or 32 bit" arch13 zarch
|
||||
b967 nxgrk RRF_R0RR2 "not exclusive or 64 bit" arch13 zarch
|
||||
b975 ocrk RRF_R0RR2 "or with complement 32 bit" arch13 zarch
|
||||
--
|
||||
2.47.0
|
||||
|
||||
@ -1,36 +0,0 @@
|
||||
From 6e1d1b2e7b2e12e53fa287387fbbca9c56dc29d0 Mon Sep 17 00:00:00 2001
|
||||
From: Jens Remus <jremus@linux.ibm.com>
|
||||
Date: Thu, 23 Nov 2023 15:48:59 +0100
|
||||
Subject: [PATCH] s390: Correct prno instruction name
|
||||
|
||||
Commit: 31238493cc81
|
||||
|
||||
IBM z13 (arch11) introduced ppno (Perform Pseudorandom Number Operation).
|
||||
IBM z14 (arch12) introduced prno (Perform Random Number Operation) and
|
||||
deprecated ppno.
|
||||
|
||||
opcodes/
|
||||
* s390-opc.txt: Correct prno instruction name.
|
||||
|
||||
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
|
||||
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
|
||||
---
|
||||
opcodes/s390-opc.txt | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt
|
||||
index 674c0cf1987..853758b96aa 100644
|
||||
--- a/opcodes/s390-opc.txt
|
||||
+++ b/opcodes/s390-opc.txt
|
||||
@@ -1910,7 +1910,7 @@ e30000000049 stgsc RXY_RRRD "store guarded storage controls" arch12 zarch
|
||||
|
||||
b929 kma RRF_R0RR "cipher message with galois counter mode" arch12 zarch
|
||||
|
||||
-b93c prno RRE_RR "perform pseudorandom number operation" arch12 zarch
|
||||
+b93c prno RRE_RR "perform random number operation" arch12 zarch
|
||||
b9a1 tpei RRE_RR "test pending external interruption" arch12 zarch
|
||||
b9ac irbm RRE_RR "insert reference bits multiple" arch12 zarch
|
||||
|
||||
--
|
||||
2.47.0
|
||||
|
||||
@ -1,31 +0,0 @@
|
||||
From 6c0c7d489bdf106d90b300aeb8d042c7b1ad3d2b Mon Sep 17 00:00:00 2001
|
||||
From: Nick Clifton <nickc@redhat.com>
|
||||
Date: Fri, 24 Nov 2023 08:10:12 +0000
|
||||
Subject: [PATCH] Fix building for the s390 target with clang
|
||||
|
||||
Commit: adc54be82956
|
||||
|
||||
---
|
||||
opcodes/s390-opc.c | 5 +++--
|
||||
1 file changed, 3 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c
|
||||
index 0427bd8b2e0..cbfdb3df0b7 100644
|
||||
--- a/opcodes/s390-opc.c
|
||||
+++ b/opcodes/s390-opc.c
|
||||
@@ -262,9 +262,10 @@ const struct s390_operand s390_operands[] =
|
||||
|
||||
};
|
||||
|
||||
-static inline void unused_s390_operands_static_asserts(void)
|
||||
+static inline void ATTRIBUTE_UNUSED
|
||||
+unused_s390_operands_static_asserts (void)
|
||||
{
|
||||
- static_assert(ARRAY_SIZE(s390_operands) - 1 == J32_16);
|
||||
+ static_assert (ARRAY_SIZE (s390_operands) - 1 == J32_16);
|
||||
}
|
||||
|
||||
/* Macros used to form opcodes. */
|
||||
--
|
||||
2.47.0
|
||||
|
||||
@ -1,100 +0,0 @@
|
||||
From 8e194ff8cced7cd3924353d39706bd6656d654e2 Mon Sep 17 00:00:00 2001
|
||||
From: Jens Remus <jremus@linux.ibm.com>
|
||||
Date: Wed, 20 Dec 2023 11:16:08 +0100
|
||||
Subject: [PATCH] s390: Align letter case of instruction descriptions
|
||||
|
||||
Commit: 47ee40afbf8d
|
||||
|
||||
Change the bitwise operations names "and" and "or" to lower case. Change
|
||||
the register name abbreviations "FPR", "GR", and "VR" to upper case.
|
||||
|
||||
opcodes/
|
||||
* s390-opc.txt: Align letter case of instruction descriptions.
|
||||
|
||||
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
|
||||
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
|
||||
---
|
||||
opcodes/s390-opc.txt | 42 +++++++++++++++++++++---------------------
|
||||
1 file changed, 21 insertions(+), 21 deletions(-)
|
||||
|
||||
diff -rup binutils.orig/opcodes/s390-opc.txt binutils-2.41/opcodes/s390-opc.txt
|
||||
--- binutils.orig/opcodes/s390-opc.txt 2024-11-12 16:44:14.887824730 +0000
|
||||
+++ binutils-2.41/opcodes/s390-opc.txt 2024-11-12 16:44:23.719849187 +0000
|
||||
@@ -144,14 +144,14 @@ d3 mvz SS_L0RDRD "move zones" g5 esa,zar
|
||||
67 mxd RX_FERRD "multiply (long to ext.)" g5 esa,zarch
|
||||
27 mxdr RR_FEF "multiply (long to ext.)" g5 esa,zarch
|
||||
26 mxr RR_FEFE "multiply (ext.)" g5 esa,zarch
|
||||
-54 n RX_RRRD "AND" g5 esa,zarch
|
||||
-d4 nc SS_L0RDRD "AND" g5 esa,zarch
|
||||
-94 ni SI_URD "AND" g5 esa,zarch
|
||||
-14 nr RR_RR "AND" g5 esa,zarch
|
||||
-56 o RX_RRRD "OR" g5 esa,zarch
|
||||
-d6 oc SS_L0RDRD "OR" g5 esa,zarch
|
||||
-96 oi SI_URD "OR" g5 esa,zarch
|
||||
-16 or RR_RR "OR" g5 esa,zarch
|
||||
+54 n RX_RRRD "and" g5 esa,zarch
|
||||
+d4 nc SS_L0RDRD "and" g5 esa,zarch
|
||||
+94 ni SI_URD "and" g5 esa,zarch
|
||||
+14 nr RR_RR "and" g5 esa,zarch
|
||||
+56 o RX_RRRD "or" g5 esa,zarch
|
||||
+d6 oc SS_L0RDRD "or" g5 esa,zarch
|
||||
+96 oi SI_URD "or" g5 esa,zarch
|
||||
+16 or RR_RR "or" g5 esa,zarch
|
||||
f2 pack SS_LLRDRD "pack" g5 esa,zarch
|
||||
b248 palb RRE_00 "purge ALB" g5 esa,zarch
|
||||
b218 pc S_RD "program call" g5 esa,zarch
|
||||
@@ -215,8 +215,8 @@ b6 stctl RS_CCRD "store control" g5 esa,
|
||||
40 sth RX_RRRD "store halfword" g5 esa,zarch
|
||||
b202 stidp S_RD "store CPU id" g5 esa,zarch
|
||||
90 stm RS_RRRD "store multiple" g5 esa,zarch
|
||||
-ac stnsm SI_URD "store then AND system mask" g5 esa,zarch
|
||||
-ad stosm SI_URD "store then OR system mask" g5 esa,zarch
|
||||
+ac stnsm SI_URD "store then and system mask" g5 esa,zarch
|
||||
+ad stosm SI_URD "store then or system mask" g5 esa,zarch
|
||||
b209 stpt S_RD "store CPU timer" g5 esa,zarch
|
||||
b211 stpx S_RD "store prefix" g5 esa,zarch
|
||||
b234 stsch S_RD "store subchannel" g5 esa,zarch
|
||||
@@ -239,10 +239,10 @@ dd trt SS_L0RDRD "translate and test" g5
|
||||
b235 tsch S_RD "test subchannel" g5 esa,zarch
|
||||
f3 unpk SS_LLRDRD "unpack" g5 esa,zarch
|
||||
0102 upt E "update tree" g5 esa,zarch
|
||||
-57 x RX_RRRD "exclusive OR" g5 esa,zarch
|
||||
-d7 xc SS_L0RDRD "exclusive OR" g5 esa,zarch
|
||||
-97 xi SI_URD "exclusive OR" g5 esa,zarch
|
||||
-17 xr RR_RR "exclusive OR" g5 esa,zarch
|
||||
+57 x RX_RRRD "exclusive or" g5 esa,zarch
|
||||
+d7 xc SS_L0RDRD "exclusive or" g5 esa,zarch
|
||||
+97 xi SI_URD "exclusive or" g5 esa,zarch
|
||||
+17 xr RR_RR "exclusive or" g5 esa,zarch
|
||||
f8 zap SS_LLRDRD "zero and add" g5 esa,zarch
|
||||
a70a ahi RI_RI "add halfword immediate" g5 esa,zarch
|
||||
84 brxh RSI_RRP "branch relative on index high" g5 esa,zarch
|
||||
@@ -821,8 +821,8 @@ b370 lpdfr RRE_FF "load positive no cc"
|
||||
b371 lndfr RRE_FF "load negative no cc" z9-ec zarch
|
||||
b372 cpsdr RRF_F0FF2 "copy sign" z9-ec zarch
|
||||
b373 lcdfr RRE_FF "load complement no cc" z9-ec zarch
|
||||
-b3c1 ldgr RRE_FR "load fpr from gr" z9-ec zarch
|
||||
-b3cd lgdr RRE_RF "load gr from fpr" z9-ec zarch
|
||||
+b3c1 ldgr RRE_FR "load FPR from GR" z9-ec zarch
|
||||
+b3cd lgdr RRE_RF "load GR from FPR" z9-ec zarch
|
||||
b3d2 adtr RRR_F0FF "add long dfp" z9-ec zarch
|
||||
b3da axtr RRR_FE0FEFE "add extended dfp" z9-ec zarch
|
||||
b3e4 cdtr RRE_FF "compare long dfp" z9-ec zarch
|
||||
@@ -1203,11 +1203,11 @@ e70000000040 vleib VRI_V0IU "vector load
|
||||
e70000000041 vleih VRI_V0IU "vector load halfword element immediate" z13 zarch vx
|
||||
e70000000043 vleif VRI_V0IU "vector load word element immediate" z13 zarch vx
|
||||
e70000000042 vleig VRI_V0IU "vector load double word element immediate" z13 zarch vx
|
||||
-e70000000021 vlgv VRS_RVRDU "vector load gr from vr element" z13 zarch vx
|
||||
-e70000000021 vlgvb VRS_RVRD "vector load gr from vr byte element" z13 zarch vx
|
||||
-e70000001021 vlgvh VRS_RVRD "vector load gr from vr halfword element" z13 zarch vx
|
||||
-e70000002021 vlgvf VRS_RVRD "vector load gr from vr word element" z13 zarch vx
|
||||
-e70000003021 vlgvg VRS_RVRD "vector load gr from vr double word element" z13 zarch vx
|
||||
+e70000000021 vlgv VRS_RVRDU "vector load GR from VR element" z13 zarch vx
|
||||
+e70000000021 vlgvb VRS_RVRD "vector load GR from VR byte element" z13 zarch vx
|
||||
+e70000001021 vlgvh VRS_RVRD "vector load GR from VR halfword element" z13 zarch vx
|
||||
+e70000002021 vlgvf VRS_RVRD "vector load GR from VR word element" z13 zarch vx
|
||||
+e70000003021 vlgvg VRS_RVRD "vector load GR from VR double word element" z13 zarch vx
|
||||
e70000000004 vllez VRX_VRRDU "vector load logical element and zero" z13 zarch vx
|
||||
e70000000004 vllezb VRX_VRRD "vector load logical byte element and zero" z13 zarch vx
|
||||
e70000001004 vllezh VRX_VRRD "vector load logical halfword element and zero" z13 zarch vx
|
||||
|
||||
@ -1,103 +0,0 @@
|
||||
From 2ff609b4ce8f3142b4e5592116f28c83a07066c3 Mon Sep 17 00:00:00 2001
|
||||
From: Jens Remus <jremus@linux.ibm.com>
|
||||
Date: Wed, 20 Dec 2023 11:16:38 +0100
|
||||
Subject: [PATCH] s390: Provide IBM z16 (arch14) instruction descriptions
|
||||
|
||||
Commit: 72a045b9f300
|
||||
|
||||
Provide descriptions for instructions introduced with commit ba2b480f103
|
||||
("IBM Z: Implement instruction set extensions"). This complements commit
|
||||
69341966def ("IBM zSystems: Add support for z16 as CPU name."). Use
|
||||
instruction names from IBM z/Architecture Principles of Operation [1] as
|
||||
instruction description.
|
||||
|
||||
[1]: IBM z/Architecture Principles of Operation, SA22-7832-13, IBM z16,
|
||||
https://publibfp.dhe.ibm.com/epubs/pdf/a227832d.pdf
|
||||
|
||||
opcodes/
|
||||
* s390-opc.txt: Add descriptions for IBM z16 (arch14)
|
||||
instructions.
|
||||
|
||||
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
|
||||
Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
|
||||
---
|
||||
opcodes/s390-opc.txt | 66 +++++++++++++++++++++++++-------------------
|
||||
1 file changed, 38 insertions(+), 28 deletions(-)
|
||||
|
||||
diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt
|
||||
index ef4ef9dc517..a3117eeebc5 100644
|
||||
--- a/opcodes/s390-opc.txt
|
||||
+++ b/opcodes/s390-opc.txt
|
||||
@@ -2034,31 +2034,41 @@ e60000000052 vcvbg VRR_RV0UU "vector convert to binary 64 bit" arch13 zarch optp
|
||||
b93a kdsa RRE_RR "compute digital signature authentication" arch13 zarch
|
||||
|
||||
|
||||
-# arch14 instructions
|
||||
-
|
||||
-e60000000074 vschp VRR_VVV0U0U " " arch14 zarch
|
||||
-e60000002074 vschsp VRR_VVV0U0 " " arch14 zarch
|
||||
-e60000003074 vschdp VRR_VVV0U0 " " arch14 zarch
|
||||
-e60000004074 vschxp VRR_VVV0U0 " " arch14 zarch
|
||||
-e6000000007c vscshp VRR_VVV " " arch14 zarch
|
||||
-e6000000007d vcsph VRR_VVV0U0 " " arch14 zarch
|
||||
-e60000000051 vclzdp VRR_VV0U2 " " arch14 zarch
|
||||
-e60000000070 vpkzr VRI_VVV0UU2 " " arch14 zarch
|
||||
-e60000000072 vsrpr VRI_VVV0UU2 " " arch14 zarch
|
||||
-e60000000054 vupkzh VRR_VV0U2 " " arch14 zarch
|
||||
-e6000000005c vupkzl VRR_VV0U2 " " arch14 zarch
|
||||
-
|
||||
-b93b nnpa RRE_00 " " arch14 zarch
|
||||
-e60000000056 vclfnh VRR_VV0UU2 " " arch14 zarch
|
||||
-e6000000005e vclfnl VRR_VV0UU2 " " arch14 zarch
|
||||
-e60000000075 vcrnf VRR_VVV0UU " " arch14 zarch
|
||||
-e6000000005d vcfn VRR_VV0UU2 " " arch14 zarch
|
||||
-e60000000055 vcnf VRR_VV0UU2 " " arch14 zarch
|
||||
-
|
||||
-b98B rdp RRF_RURR2 " " arch14 zarch optparm
|
||||
-
|
||||
-eb0000000071 lpswey SIY_RD " " arch14 zarch
|
||||
-b200 lbear S_RD " " arch14 zarch
|
||||
-b201 stbear S_RD " " arch14 zarch
|
||||
-
|
||||
-b28f qpaci S_RD " " arch14 zarch
|
||||
+# arch14 (z16) instructions
|
||||
+
|
||||
+# Vector-Packed-Decimal-Enhancement Facility 2
|
||||
+
|
||||
+e60000000074 vschp VRR_VVV0U0U "decimal scale and convert to hfp" arch14 zarch
|
||||
+e60000002074 vschsp VRR_VVV0U0 "decimal scale and convert to short hfp" arch14 zarch
|
||||
+e60000003074 vschdp VRR_VVV0U0 "decimal scale and convert to long hfp" arch14 zarch
|
||||
+e60000004074 vschxp VRR_VVV0U0 "decimal scale and convert to extended hfp" arch14 zarch
|
||||
+e6000000007c vscshp VRR_VVV "decimal scale and convert and split to hfp" arch14 zarch
|
||||
+e6000000007d vcsph VRR_VVV0U0 "vector convert hfp to scaled decimal" arch14 zarch
|
||||
+e60000000051 vclzdp VRR_VV0U2 "vector count leading zero digits" arch14 zarch
|
||||
+e60000000070 vpkzr VRI_VVV0UU2 "vector pack zoned register" arch14 zarch
|
||||
+e60000000072 vsrpr VRI_VVV0UU2 "vector shift and round decimal register" arch14 zarch
|
||||
+e60000000054 vupkzh VRR_VV0U2 "vector unpack zoned high" arch14 zarch
|
||||
+e6000000005c vupkzl VRR_VV0U2 "vector unpack zoned low" arch14 zarch
|
||||
+
|
||||
+# Neural-Network-Processing-Assist Facility
|
||||
+
|
||||
+b93b nnpa RRE_00 "neural network processing assist" arch14 zarch
|
||||
+e60000000056 vclfnh VRR_VV0UU2 "vector fp convert and lengthen from nnp high" arch14 zarch
|
||||
+e6000000005e vclfnl VRR_VV0UU2 "vector fp convert and lengthen from nnp low" arch14 zarch
|
||||
+e60000000075 vcrnf VRR_VVV0UU "vector fp convert and round to nnp" arch14 zarch
|
||||
+e6000000005d vcfn VRR_VV0UU2 "vector fp convert from nnp" arch14 zarch
|
||||
+e60000000055 vcnf VRR_VV0UU2 "vector fp convert to nnp" arch14 zarch
|
||||
+
|
||||
+# Reset-DAT-Protection Facility
|
||||
+
|
||||
+b98B rdp RRF_RURR2 "reset dat protection" arch14 zarch optparm
|
||||
+
|
||||
+# BEAR-Enhancement Facility
|
||||
+
|
||||
+eb0000000071 lpswey SIY_RD "load PSW extended" arch14 zarch
|
||||
+b200 lbear S_RD "load bear" arch14 zarch
|
||||
+b201 stbear S_RD "store bear" arch14 zarch
|
||||
+
|
||||
+# Processor-Activity-Instrumentation Facility
|
||||
+
|
||||
+b28f qpaci S_RD "query processor activity counter information" arch14 zarch
|
||||
--
|
||||
2.47.0
|
||||
|
||||
@ -1,31 +0,0 @@
|
||||
From 1afe02759f1569fb647b691d308c95efc2116b23 Mon Sep 17 00:00:00 2001
|
||||
From: Jens Remus <jremus@linux.ibm.com>
|
||||
Date: Mon, 9 Sep 2024 17:05:28 +0200
|
||||
Subject: [PATCH] s390: Align opcodes to lower-case
|
||||
|
||||
Commit: 307b615828bb
|
||||
|
||||
opcodes/
|
||||
* s390-opc.txt (rdp): Change opcode to lower-case.
|
||||
|
||||
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
|
||||
---
|
||||
opcodes/s390-opc.txt | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt
|
||||
index 1182e196059..4610a8fddd7 100644
|
||||
--- a/opcodes/s390-opc.txt
|
||||
+++ b/opcodes/s390-opc.txt
|
||||
@@ -2061,7 +2061,7 @@ e60000000055 vcnf VRR_VV0UU2 "vector fp convert to nnp" arch14 zarch
|
||||
|
||||
# Reset-DAT-Protection Facility
|
||||
|
||||
-b98B rdp RRF_RURR2 "reset dat protection" arch14 zarch optparm
|
||||
+b98b rdp RRF_RURR2 "reset dat protection" arch14 zarch optparm
|
||||
|
||||
# BEAR-Enhancement Facility
|
||||
|
||||
--
|
||||
2.47.0
|
||||
|
||||
@ -1,180 +0,0 @@
|
||||
From a3f1e7c56a60573562e8578ae8b675ec1f4448e7 Mon Sep 17 00:00:00 2001
|
||||
From: Jens Remus <jremus@linux.ibm.com>
|
||||
Date: Thu, 12 Sep 2024 15:06:06 +0200
|
||||
Subject: [PATCH] s390: Simplify (dis)assembly of insn operands with const bits
|
||||
|
||||
Commit: a3a696bfd8b8
|
||||
|
||||
Simplify assembly and disassembly of extended mnemonics with operands
|
||||
with constant ORed bits:
|
||||
Their instruction template already contains the respective constant
|
||||
operand bits, as they are significant to distinguish the extended from
|
||||
their base mnemonic. Operands are ORed into the instruction template.
|
||||
Therefore it is not necessary to OR the constant bits into the operand
|
||||
value during assembly in s390_insert_operand.
|
||||
Additionally the constant operand bits from the instruction template
|
||||
can be used to mask them from the operand value during disassembly in
|
||||
s390_print_insn_with_opcode. For now do so for non-length unsigned
|
||||
integer operands only.
|
||||
|
||||
The separate instruction formats need to be retained, as their masks
|
||||
differ, which is relevant during disassembly to distinguish the base
|
||||
and extended mnemonics from each other.
|
||||
|
||||
This affects the following extended mnemonics:
|
||||
- vfaebs, vfaehs, vfaefs
|
||||
- vfaezb, vfaezh, vfaezf
|
||||
- vfaezbs, vfaezhs, vfaezfs
|
||||
- vstrcbs, vstrchs, vstrcfs
|
||||
- vstrczb, vstrczh, vstrczf
|
||||
- vstrczbs, vstrczhs, vstrczfs
|
||||
- wcefb, wcdgb
|
||||
- wcelfb, wcdlgb
|
||||
- wcfeb, wcgdb
|
||||
- wclfeb, wclgdb
|
||||
- wfisb, wfidb, wfixb
|
||||
- wledb, wflrd, wflrx
|
||||
|
||||
include/
|
||||
* opcode/s390.h (S390_OPERAND_OR1, S390_OPERAND_OR2,
|
||||
S390_OPERAND_OR8): Remove.
|
||||
|
||||
opcodes/
|
||||
* s390-opc.c (U4_OR1_24, U4_OR2_24, U4_OR8_28): Remove.
|
||||
(INSTR_VRR_VVV0U1, INSTR_VRR_VVV0U2, INSTR_VRR_VVV0U3): Define
|
||||
as INSTR_VRR_VVV0U0 while retaining respective insn fmt mask.
|
||||
(INSTR_VRR_VV0UU8): Define as INSTR_VRR_VV0UU while retaining
|
||||
respective insn fmt mask.
|
||||
(INSTR_VRR_VVVU0VB1, INSTR_VRR_VVVU0VB2, INSTR_VRR_VVVU0VB3):
|
||||
Define as INSTR_VRR_VVVU0VB while retaining respective insn fmt
|
||||
mask.
|
||||
* s390-dis.c (s390_print_insn_with_opcode): Mask constant
|
||||
operand bits set in insn template of non-length unsigned
|
||||
integer operands.
|
||||
|
||||
gas/
|
||||
* config/tc-s390.c (s390_insert_operand): Do not OR constant
|
||||
operand value bits.
|
||||
|
||||
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
|
||||
---
|
||||
gas/config/tc-s390.c | 7 -------
|
||||
include/opcode/s390.h | 4 ----
|
||||
opcodes/s390-dis.c | 14 ++++++++------
|
||||
opcodes/s390-opc.c | 26 +++++++++-----------------
|
||||
4 files changed, 17 insertions(+), 34 deletions(-)
|
||||
|
||||
diff --git a/gas/config/tc-s390.c b/gas/config/tc-s390.c
|
||||
index 659c6af392b..75e1011f67b 100644
|
||||
--- a/gas/config/tc-s390.c
|
||||
+++ b/gas/config/tc-s390.c
|
||||
@@ -795,13 +795,6 @@ s390_insert_operand (unsigned char *insn,
|
||||
uval &= 0xf;
|
||||
}
|
||||
|
||||
- if (operand->flags & S390_OPERAND_OR1)
|
||||
- uval |= 1;
|
||||
- if (operand->flags & S390_OPERAND_OR2)
|
||||
- uval |= 2;
|
||||
- if (operand->flags & S390_OPERAND_OR8)
|
||||
- uval |= 8;
|
||||
-
|
||||
/* Duplicate the GPR/VR operand at bit pos 12 to 16. */
|
||||
if (operand->flags & S390_OPERAND_CP16)
|
||||
{
|
||||
diff --git a/include/opcode/s390.h b/include/opcode/s390.h
|
||||
index e5dfcb27570..8de03701172 100644
|
||||
--- a/include/opcode/s390.h
|
||||
+++ b/include/opcode/s390.h
|
||||
@@ -193,8 +193,4 @@ extern const struct s390_operand s390_operands[];
|
||||
|
||||
#define S390_OPERAND_CP16 0x1000
|
||||
|
||||
-#define S390_OPERAND_OR1 0x2000
|
||||
-#define S390_OPERAND_OR2 0x4000
|
||||
-#define S390_OPERAND_OR8 0x8000
|
||||
-
|
||||
#endif /* S390_H */
|
||||
diff --git a/opcodes/s390-dis.c b/opcodes/s390-dis.c
|
||||
index ee2f2cb62ed..852d2f6ebb9 100644
|
||||
--- a/opcodes/s390-dis.c
|
||||
+++ b/opcodes/s390-dis.c
|
||||
@@ -299,12 +299,14 @@ s390_print_insn_with_opcode (bfd_vma memaddr,
|
||||
{
|
||||
enum disassembler_style style;
|
||||
|
||||
- if (flags & S390_OPERAND_OR1)
|
||||
- val.u &= ~1;
|
||||
- if (flags & S390_OPERAND_OR2)
|
||||
- val.u &= ~2;
|
||||
- if (flags & S390_OPERAND_OR8)
|
||||
- val.u &= ~8;
|
||||
+ if (!(flags & S390_OPERAND_LENGTH))
|
||||
+ {
|
||||
+ union operand_value insn_opval;
|
||||
+
|
||||
+ /* Mask any constant operand bits set in insn template. */
|
||||
+ insn_opval = s390_extract_operand (opcode->opcode, operand);
|
||||
+ val.u &= ~insn_opval.u;
|
||||
+ }
|
||||
|
||||
if ((opcode->flags & S390_INSTR_FLAG_OPTPARM)
|
||||
&& val.u == 0
|
||||
diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c
|
||||
index 10482fbc1e0..987004d7b07 100644
|
||||
--- a/opcodes/s390-opc.c
|
||||
+++ b/opcodes/s390-opc.c
|
||||
@@ -208,17 +208,9 @@ const struct s390_operand s390_operands[] =
|
||||
{ 4, 20, 0 },
|
||||
#define U4_24 (U4_20 + 1) /* 4 bit unsigned value starting at 24 */
|
||||
{ 4, 24, 0 },
|
||||
-#define U4_OR1_24 (U4_24 + 1) /* 4 bit unsigned value ORed with 1 */
|
||||
- { 4, 24, S390_OPERAND_OR1 }, /* starting at 24 */
|
||||
-#define U4_OR2_24 (U4_OR1_24+1) /* 4 bit unsigned value ORed with 2 */
|
||||
- { 4, 24, S390_OPERAND_OR2 }, /* starting at 24 */
|
||||
-#define U4_OR3_24 (U4_OR2_24+1) /* 4 bit unsigned value ORed with 3 */
|
||||
- { 4, 24, S390_OPERAND_OR1 | S390_OPERAND_OR2 }, /* starting at 24 */
|
||||
-#define U4_28 (U4_OR3_24+1) /* 4 bit unsigned value starting at 28 */
|
||||
+#define U4_28 (U4_24+1) /* 4 bit unsigned value starting at 28 */
|
||||
{ 4, 28, 0 },
|
||||
-#define U4_OR8_28 (U4_28 + 1) /* 4 bit unsigned value ORed with 8 */
|
||||
- { 4, 28, S390_OPERAND_OR8 }, /* starting at 28 */
|
||||
-#define U4_32 (U4_OR8_28+1) /* 4 bit unsigned value starting at 32 */
|
||||
+#define U4_32 (U4_28+1) /* 4 bit unsigned value starting at 32 */
|
||||
{ 4, 32, 0 },
|
||||
#define U4_36 (U4_32 + 1) /* 4 bit unsigned value starting at 36 */
|
||||
{ 4, 36, 0 },
|
||||
@@ -512,23 +504,23 @@ unused_s390_operands_static_asserts (void)
|
||||
#define INSTR_VRR_VRR 6, { V_8,R_12,R_16,0,0,0 } /* e.g. vlvgp */
|
||||
#define INSTR_VRR_VVV0U 6, { V_8,V_12,V_16,U4_32,0,0 } /* e.g. vmrh */
|
||||
#define INSTR_VRR_VVV0U0 6, { V_8,V_12,V_16,U4_24,0,0 } /* e.g. vfaeb */
|
||||
-#define INSTR_VRR_VVV0U1 6, { V_8,V_12,V_16,U4_OR1_24,0,0 } /* e.g. vfaebs*/
|
||||
-#define INSTR_VRR_VVV0U2 6, { V_8,V_12,V_16,U4_OR2_24,0,0 } /* e.g. vfaezb*/
|
||||
-#define INSTR_VRR_VVV0U3 6, { V_8,V_12,V_16,U4_OR3_24,0,0 } /* e.g. vfaezbs*/
|
||||
+#define INSTR_VRR_VVV0U1 INSTR_VRR_VVV0U0 /* e.g. vfaebs*/
|
||||
+#define INSTR_VRR_VVV0U2 INSTR_VRR_VVV0U0 /* e.g. vfaezb*/
|
||||
+#define INSTR_VRR_VVV0U3 INSTR_VRR_VVV0U0 /* e.g. vfaezbs*/
|
||||
#define INSTR_VRR_VVV 6, { V_8,V_12,V_16,0,0,0 } /* e.g. vmrhb */
|
||||
#define INSTR_VRR_VVV2 6, { V_8,V_CP16_12,0,0,0,0 } /* e.g. vnot */
|
||||
#define INSTR_VRR_VV0U 6, { V_8,V_12,U4_32,0,0,0 } /* e.g. vseg */
|
||||
#define INSTR_VRR_VV0U2 6, { V_8,V_12,U4_24,0,0,0 } /* e.g. vistrb*/
|
||||
#define INSTR_VRR_VV0UU 6, { V_8,V_12,U4_28,U4_24,0,0 } /* e.g. vcdgb */
|
||||
#define INSTR_VRR_VV0UU2 6, { V_8,V_12,U4_32,U4_28,0,0 } /* e.g. wfc */
|
||||
-#define INSTR_VRR_VV0UU8 6, { V_8,V_12,U4_OR8_28,U4_24,0,0 } /* e.g. wcdgb */
|
||||
+#define INSTR_VRR_VV0UU8 INSTR_VRR_VV0UU /* e.g. wcdgb */
|
||||
#define INSTR_VRR_VV 6, { V_8,V_12,0,0,0,0 } /* e.g. vsegb */
|
||||
#define INSTR_VRR_VVVUU0V 6, { V_8,V_12,V_16,V_32,U4_20,U4_24 } /* e.g. vstrc */
|
||||
#define INSTR_VRR_VVVU0V 6, { V_8,V_12,V_16,V_32,U4_20,0 } /* e.g. vac */
|
||||
#define INSTR_VRR_VVVU0VB 6, { V_8,V_12,V_16,V_32,U4_24,0 } /* e.g. vstrcb*/
|
||||
-#define INSTR_VRR_VVVU0VB1 6, { V_8,V_12,V_16,V_32,U4_OR1_24,0 } /* e.g. vstrcbs*/
|
||||
-#define INSTR_VRR_VVVU0VB2 6, { V_8,V_12,V_16,V_32,U4_OR2_24,0 } /* e.g. vstrczb*/
|
||||
-#define INSTR_VRR_VVVU0VB3 6, { V_8,V_12,V_16,V_32,U4_OR3_24,0 } /* e.g. vstrczbs*/
|
||||
+#define INSTR_VRR_VVVU0VB1 INSTR_VRR_VVVU0VB /* e.g. vstrcbs*/
|
||||
+#define INSTR_VRR_VVVU0VB2 INSTR_VRR_VVVU0VB /* e.g. vstrczb*/
|
||||
+#define INSTR_VRR_VVVU0VB3 INSTR_VRR_VVVU0VB /* e.g. vstrczbs*/
|
||||
#define INSTR_VRR_VVV0V 6, { V_8,V_12,V_16,V_32,0,0 } /* e.g. vacq */
|
||||
#define INSTR_VRR_VVV0U0U 6, { V_8,V_12,V_16,U4_32,U4_24,0 } /* e.g. vfae */
|
||||
#define INSTR_VRR_VVVV 6, { V_8,V_12,V_16,V_32,0,0 } /* e.g. vfmadb*/
|
||||
--
|
||||
2.47.0
|
||||
|
||||
@ -1,173 +0,0 @@
|
||||
From b8b60e2d0cb0ab1f235f082dbb8a4e8bc43aadf6 Mon Sep 17 00:00:00 2001
|
||||
From: Jens Remus <jremus@linux.ibm.com>
|
||||
Date: Thu, 12 Sep 2024 15:06:06 +0200
|
||||
Subject: [PATCH] s390: Relax risbg[n]z, risb{h|l}gz, {rns|ros|rxs}bgt operand constraints
|
||||
|
||||
Commit: 69371b2a1567
|
||||
|
||||
This leverages commit ("s390: Simplify (dis)assembly of insn operands
|
||||
with const bits") to relax the operand constraints of the immediate
|
||||
operand that contains the constant Z- or T-bit of the following extended
|
||||
mnemonics:
|
||||
risbgz, risbgnz, risbhgz, risblgz, rnsbgt, rosbgt, rxsbgt
|
||||
|
||||
Previously those instructions were the only ones where the assembler
|
||||
on s390 restricted the specification of the subject I3/I4 operand values
|
||||
exactly according to their specification to an unsigned 6- or 5-bit
|
||||
unsigned integer. For any other instructions the assembler allows to
|
||||
specify any operand value allowed by the instruction format, regardless
|
||||
of whether the instruction specification is more restrictive.
|
||||
|
||||
Allow to specify the subject I3/I4 operand as unsigned 8-bit integer
|
||||
with the constant operand bits being ORed during assembly.
|
||||
Relax the instructions subject significant operand bit masks to only
|
||||
consider the Z/T-bit as significant, so that the instructions get
|
||||
disassembled as their *z or *t flavor regardless of whether any reserved
|
||||
bits are set in addition to the Z/T-bit.
|
||||
Adapt the rnsbg, rosbg, and rxsbg test cases not to inadvertently set
|
||||
the T-bit in operand I3, as they otherwise get disassembled as their
|
||||
rnsbgt, rosbgt, and rxsbgt counterpart.
|
||||
|
||||
This aligns GNU Assembler to LLVM Assembler.
|
||||
|
||||
opcodes/
|
||||
* s390-opc.c (U6_18, U5_27, U6_26): Remove.
|
||||
(INSTR_RIE_RRUUU2, INSTR_RIE_RRUUU3, INSTR_RIE_RRUUU4): Define
|
||||
as INSTR_RIE_RRUUU while retaining insn fmt mask.
|
||||
(MASK_RIE_RRUUU2, MASK_RIE_RRUUU3, MASK_RIE_RRUUU4): Treat only
|
||||
Z/T-bit of I3/I4 operand as significant.
|
||||
|
||||
gas/testsuite/
|
||||
* gas/s390/zarch-z10.s (rnsbg, rosbg, rxsbg): Do not set T-bit.
|
||||
|
||||
Reported-by: Dominik Steenken <dost@de.ibm.com>
|
||||
Suggested-by: Ulrich Weigand <ulrich.weigand@de.ibm.com>
|
||||
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
|
||||
---
|
||||
gas/testsuite/gas/s390/zarch-z10.d | 12 ++++++------
|
||||
gas/testsuite/gas/s390/zarch-z10.s | 12 ++++++------
|
||||
opcodes/s390-opc.c | 24 +++++++++---------------
|
||||
3 files changed, 21 insertions(+), 27 deletions(-)
|
||||
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-z10.d b/gas/testsuite/gas/s390/zarch-z10.d
|
||||
index 4a051533f93..beb057878d6 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-z10.d
|
||||
+++ b/gas/testsuite/gas/s390/zarch-z10.d
|
||||
@@ -359,20 +359,20 @@ Disassembly of section .text:
|
||||
.*: c2 60 ff fe 79 60 [ ]*msgfi %r6,-100000
|
||||
.*: e3 a6 75 b3 01 36 [ ]*pfd 10,5555\(%r6,%r7\)
|
||||
*([\da-f]+): c6 a2 00 00 00 00 [ ]*pfdrl 10,\1 <foo\+0x\1>
|
||||
-.*: ec 67 d2 dc e6 54 [ ]*rnsbg %r6,%r7,210,220,230
|
||||
-.*: ec 67 d2 dc 00 54 [ ]*rnsbg %r6,%r7,210,220
|
||||
+.*: ec 67 6e dc e6 54 [ ]*rnsbg %r6,%r7,110,220,230
|
||||
+.*: ec 67 6e dc 00 54 [ ]*rnsbg %r6,%r7,110,220
|
||||
.*: ec 67 92 dc e6 54 [ ]*rnsbgt %r6,%r7,18,220,230
|
||||
.*: ec 67 92 dc 00 54 [ ]*rnsbgt %r6,%r7,18,220
|
||||
.*: ec 67 92 1c 26 54 [ ]*rnsbgt %r6,%r7,18,28,38
|
||||
.*: ec 67 92 1c 00 54 [ ]*rnsbgt %r6,%r7,18,28
|
||||
-.*: ec 67 d2 dc e6 57 [ ]*rxsbg %r6,%r7,210,220,230
|
||||
-.*: ec 67 d2 dc 00 57 [ ]*rxsbg %r6,%r7,210,220
|
||||
+.*: ec 67 6e dc e6 57 [ ]*rxsbg %r6,%r7,110,220,230
|
||||
+.*: ec 67 6e dc 00 57 [ ]*rxsbg %r6,%r7,110,220
|
||||
.*: ec 67 92 dc e6 57 [ ]*rxsbgt %r6,%r7,18,220,230
|
||||
.*: ec 67 92 dc 00 57 [ ]*rxsbgt %r6,%r7,18,220
|
||||
.*: ec 67 92 1c 26 57 [ ]*rxsbgt %r6,%r7,18,28,38
|
||||
.*: ec 67 92 1c 00 57 [ ]*rxsbgt %r6,%r7,18,28
|
||||
-.*: ec 67 d2 dc e6 56 [ ]*rosbg %r6,%r7,210,220,230
|
||||
-.*: ec 67 d2 dc 00 56 [ ]*rosbg %r6,%r7,210,220
|
||||
+.*: ec 67 6e dc e6 56 [ ]*rosbg %r6,%r7,110,220,230
|
||||
+.*: ec 67 6e dc 00 56 [ ]*rosbg %r6,%r7,110,220
|
||||
.*: ec 67 92 dc e6 56 [ ]*rosbgt %r6,%r7,18,220,230
|
||||
.*: ec 67 92 dc 00 56 [ ]*rosbgt %r6,%r7,18,220
|
||||
.*: ec 67 92 1c 26 56 [ ]*rosbgt %r6,%r7,18,28,38
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-z10.s b/gas/testsuite/gas/s390/zarch-z10.s
|
||||
index 45bb8944793..a6245888c4c 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-z10.s
|
||||
+++ b/gas/testsuite/gas/s390/zarch-z10.s
|
||||
@@ -353,20 +353,20 @@ foo:
|
||||
msgfi %r6,-100000
|
||||
pfd 10,5555(%r6,%r7)
|
||||
pfdrl 10,.
|
||||
- rnsbg %r6,%r7,210,220,230
|
||||
- rnsbg %r6,%r7,210,220
|
||||
+ rnsbg %r6,%r7,110,220,230
|
||||
+ rnsbg %r6,%r7,110,220
|
||||
rnsbg %r6,%r7,146,220,230
|
||||
rnsbg %r6,%r7,146,220
|
||||
rnsbgt %r6,%r7,18,28,38
|
||||
rnsbgt %r6,%r7,18,28
|
||||
- rxsbg %r6,%r7,210,220,230
|
||||
- rxsbg %r6,%r7,210,220
|
||||
+ rxsbg %r6,%r7,110,220,230
|
||||
+ rxsbg %r6,%r7,110,220
|
||||
rxsbg %r6,%r7,146,220,230
|
||||
rxsbg %r6,%r7,146,220
|
||||
rxsbgt %r6,%r7,18,28,38
|
||||
rxsbgt %r6,%r7,18,28
|
||||
- rosbg %r6,%r7,210,220,230
|
||||
- rosbg %r6,%r7,210,220
|
||||
+ rosbg %r6,%r7,110,220,230
|
||||
+ rosbg %r6,%r7,110,220
|
||||
rosbg %r6,%r7,146,220,230
|
||||
rosbg %r6,%r7,146,220
|
||||
rosbgt %r6,%r7,18,28,38
|
||||
diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c
|
||||
index 987004d7b07..fe0299aa4e5 100644
|
||||
--- a/opcodes/s390-opc.c
|
||||
+++ b/opcodes/s390-opc.c
|
||||
@@ -216,15 +216,9 @@ const struct s390_operand s390_operands[] =
|
||||
{ 4, 36, 0 },
|
||||
#define U8_8 (U4_36 + 1) /* 8 bit unsigned value starting at 8 */
|
||||
{ 8, 8, 0 },
|
||||
-#define U6_18 (U8_8 + 1) /* 6 bit unsigned value starting at 18 */
|
||||
- { 6, 18, 0 },
|
||||
-#define U8_16 (U6_18 + 1) /* 8 bit unsigned value starting at 16 */
|
||||
+#define U8_16 (U8_8 + 1) /* 8 bit unsigned value starting at 16 */
|
||||
{ 8, 16, 0 },
|
||||
-#define U5_27 (U8_16 + 1) /* 5 bit unsigned value starting at 27 */
|
||||
- { 5, 27, 0 },
|
||||
-#define U6_26 (U5_27 + 1) /* 6 bit unsigned value starting at 26 */
|
||||
- { 6, 26, 0 },
|
||||
-#define U8_24 (U6_26 + 1) /* 8 bit unsigned value starting at 24 */
|
||||
+#define U8_24 (U8_16 + 1) /* 8 bit unsigned value starting at 24 */
|
||||
{ 8, 24, 0 },
|
||||
#define U8_28 (U8_24 + 1) /* 8 bit unsigned value starting at 28 */
|
||||
{ 8, 28, 0 },
|
||||
@@ -288,7 +282,7 @@ unused_s390_operands_static_asserts (void)
|
||||
p - pc relative
|
||||
r - general purpose register
|
||||
re - gpr extended operand, a valid general purpose register pair
|
||||
- u - unsigned integer, 4, 6, 8, 16 or 32 bit
|
||||
+ u - unsigned integer, 4, 8, 16 or 32 bit
|
||||
m - mode field, 4 bit
|
||||
0 - operand skipped.
|
||||
The order of the letters reflects the layout of the format in
|
||||
@@ -324,9 +318,9 @@ unused_s390_operands_static_asserts (void)
|
||||
#define INSTR_RIE_R0U0 6, { R_8,U16_16,0,0,0,0 } /* e.g. clfitne */
|
||||
#define INSTR_RIE_RUI0 6, { R_8,I16_16,U4_12,0,0,0 } /* e.g. lochi */
|
||||
#define INSTR_RIE_RRUUU 6, { R_8,R_12,U8_16,U8_24,U8_32,0 } /* e.g. rnsbg */
|
||||
-#define INSTR_RIE_RRUUU2 6, { R_8,R_12,U8_16,U6_26,U8_32,0 } /* e.g. risbgz */
|
||||
-#define INSTR_RIE_RRUUU3 6, { R_8,R_12,U8_16,U5_27,U8_32,0 } /* e.g. risbhg */
|
||||
-#define INSTR_RIE_RRUUU4 6, { R_8,R_12,U6_18,U8_24,U8_32,0 } /* e.g. rnsbgt */
|
||||
+#define INSTR_RIE_RRUUU2 INSTR_RIE_RRUUU /* e.g. risbgz */
|
||||
+#define INSTR_RIE_RRUUU3 INSTR_RIE_RRUUU /* e.g. risbhg */
|
||||
+#define INSTR_RIE_RRUUU4 INSTR_RIE_RRUUU /* e.g. rnsbgt */
|
||||
#define INSTR_RIL_0P 6, { J32_16,0,0,0,0 } /* e.g. jg */
|
||||
#define INSTR_RIL_RP 6, { R_8,J32_16,0,0,0,0 } /* e.g. brasl */
|
||||
#define INSTR_RIL_UP 6, { U4_8,J32_16,0,0,0,0 } /* e.g. brcl */
|
||||
@@ -551,9 +545,9 @@ unused_s390_operands_static_asserts (void)
|
||||
#define MASK_RIE_R0U0 { 0xff, 0x0f, 0x00, 0x00, 0xff, 0xff }
|
||||
#define MASK_RIE_RUI0 { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
|
||||
#define MASK_RIE_RRUUU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
|
||||
-#define MASK_RIE_RRUUU2 { 0xff, 0x00, 0x00, 0xc0, 0x00, 0xff }
|
||||
-#define MASK_RIE_RRUUU3 { 0xff, 0x00, 0x00, 0xe0, 0x00, 0xff }
|
||||
-#define MASK_RIE_RRUUU4 { 0xff, 0x00, 0xc0, 0x00, 0x00, 0xff }
|
||||
+#define MASK_RIE_RRUUU2 { 0xff, 0x00, 0x00, 0x80, 0x00, 0xff }
|
||||
+#define MASK_RIE_RRUUU3 { 0xff, 0x00, 0x00, 0x80, 0x00, 0xff }
|
||||
+#define MASK_RIE_RRUUU4 { 0xff, 0x00, 0x80, 0x00, 0x00, 0xff }
|
||||
#define MASK_RIL_0P { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
|
||||
#define MASK_RIL_RP { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
|
||||
#define MASK_RIL_UP { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
|
||||
--
|
||||
2.47.0
|
||||
|
||||
@ -1,526 +0,0 @@
|
||||
From a98a6fa2d8ef5eb61534b07db80850dcdf07bdb4 Mon Sep 17 00:00:00 2001
|
||||
From: Andreas Krebbel <krebbel@linux.ibm.com>
|
||||
Date: Tue, 8 Oct 2024 12:04:31 +0200
|
||||
Subject: [PATCH] s390: Add arch15 instructions
|
||||
|
||||
Commit: 1ff59168d0e8
|
||||
|
||||
opcodes/
|
||||
* s390-mkopc.c (main) Accept arch15 as CPU string.
|
||||
* s390-opc.txt: Add arch15 instructions.
|
||||
|
||||
include/
|
||||
* opcode/s390.h (enum s390_opcode_cpu_val): Add
|
||||
S390_OPCODE_ARCH15.
|
||||
|
||||
gas/
|
||||
* config/tc-s390.c (s390_parse_cpu): New entry for arch15.
|
||||
* doc/c-s390.texi: Document arch15 march option.
|
||||
* doc/as.texi: Likewise.
|
||||
* testsuite/gas/s390/s390.exp: Run the arch15 related tests.
|
||||
* testsuite/gas/s390/zarch-arch15.d: Tests for arch15
|
||||
instructions.
|
||||
* testsuite/gas/s390/zarch-arch15.s: Likewise.
|
||||
|
||||
Signed-off-by: Andreas Krebbel <krebbel@linux.ibm.com>
|
||||
Reviewed-by: Jens Remus <jremus@linux.ibm.com>
|
||||
---
|
||||
gas/config/tc-s390.c | 2 +
|
||||
gas/doc/as.texi | 2 +-
|
||||
gas/doc/c-s390.texi | 7 +-
|
||||
gas/testsuite/gas/s390/s390.exp | 1 +
|
||||
gas/testsuite/gas/s390/zarch-arch15.d | 102 ++++++++++++++++++++++++
|
||||
gas/testsuite/gas/s390/zarch-arch15.s | 96 ++++++++++++++++++++++
|
||||
include/opcode/s390.h | 1 +
|
||||
opcodes/s390-mkopc.c | 2 +
|
||||
opcodes/s390-opc.c | 18 ++++-
|
||||
opcodes/s390-opc.txt | 110 ++++++++++++++++++++++++++
|
||||
10 files changed, 334 insertions(+), 7 deletions(-)
|
||||
create mode 100644 gas/testsuite/gas/s390/zarch-arch15.d
|
||||
create mode 100644 gas/testsuite/gas/s390/zarch-arch15.s
|
||||
|
||||
diff -rup binutils.orig/gas/config/tc-s390.c binutils-2.41/gas/config/tc-s390.c
|
||||
--- binutils.orig/gas/config/tc-s390.c 2024-11-12 16:46:31.266202400 +0000
|
||||
+++ binutils-2.41/gas/config/tc-s390.c 2024-11-12 16:46:43.847237239 +0000
|
||||
@@ -294,6 +294,8 @@ s390_parse_cpu (const char *arg,
|
||||
{ STRING_COMMA_LEN ("z15"), STRING_COMMA_LEN ("arch13"),
|
||||
S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX },
|
||||
{ STRING_COMMA_LEN ("z16"), STRING_COMMA_LEN ("arch14"),
|
||||
+ S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX },
|
||||
+ { STRING_COMMA_LEN (""), STRING_COMMA_LEN ("arch15"),
|
||||
S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX }
|
||||
};
|
||||
static struct
|
||||
diff -rup binutils.orig/gas/doc/as.texi binutils-2.41/gas/doc/as.texi
|
||||
--- binutils.orig/gas/doc/as.texi 2024-11-12 16:46:31.281202441 +0000
|
||||
+++ binutils-2.41/gas/doc/as.texi 2024-11-12 16:46:43.850237248 +0000
|
||||
@@ -1938,7 +1938,7 @@ Specify which s390 processor variant is
|
||||
@samp{arch6}), @samp{z9-109}, @samp{z9-ec} (or @samp{arch7}), @samp{z10} (or
|
||||
@samp{arch8}), @samp{z196} (or @samp{arch9}), @samp{zEC12} (or @samp{arch10}),
|
||||
@samp{z13} (or @samp{arch11}), @samp{z14} (or @samp{arch12}), @samp{z15}
|
||||
-(or @samp{arch13}), or @samp{z16} (or @samp{arch14}).
|
||||
+(or @samp{arch13}), @samp{z16} (or @samp{arch14}), or @samp{arch15}.
|
||||
@item -mregnames
|
||||
@itemx -mno-regnames
|
||||
Allow or disallow symbolic names for registers.
|
||||
diff -rup binutils.orig/gas/doc/c-s390.texi binutils-2.41/gas/doc/c-s390.texi
|
||||
--- binutils.orig/gas/doc/c-s390.texi 2024-11-12 16:46:31.297202486 +0000
|
||||
+++ binutils-2.41/gas/doc/c-s390.texi 2024-11-12 16:46:43.851237250 +0000
|
||||
@@ -18,7 +18,7 @@ and eleven chip levels. The architecture
|
||||
Architecture (ESA) and the newer z/Architecture mode. The chip levels
|
||||
are g5 (or arch3), g6, z900 (or arch5), z990 (or arch6), z9-109, z9-ec
|
||||
(or arch7), z10 (or arch8), z196 (or arch9), zEC12 (or arch10), z13
|
||||
-(or arch11), z14 (or arch12), z15 (or arch13), or z16 (or arch14).
|
||||
+(or arch11), z14 (or arch12), z15 (or arch13), z16 (or arch14), or arch15.
|
||||
|
||||
@menu
|
||||
* s390 Options:: Command-line Options.
|
||||
@@ -71,8 +71,9 @@ are recognized:
|
||||
@code{zEC12} (or @code{arch10}),
|
||||
@code{z13} (or @code{arch11}),
|
||||
@code{z14} (or @code{arch12}),
|
||||
-@code{z15} (or @code{arch13}), and
|
||||
-@code{z16} (or @code{arch14}).
|
||||
+@code{z15} (or @code{arch13}),
|
||||
+@code{z16} (or @code{arch14}), and
|
||||
+@code{arch15}.
|
||||
|
||||
Assembling an instruction that is not supported on the target
|
||||
processor results in an error message.
|
||||
diff -rup binutils.orig/gas/testsuite/gas/s390/s390.exp binutils-2.41/gas/testsuite/gas/s390/s390.exp
|
||||
--- binutils.orig/gas/testsuite/gas/s390/s390.exp 2024-11-12 16:46:32.163204884 +0000
|
||||
+++ binutils-2.41/gas/testsuite/gas/s390/s390.exp 2024-11-12 16:46:43.851237250 +0000
|
||||
@@ -33,6 +33,7 @@ if [expr [istarget "s390-*-*"] || [ista
|
||||
run_dump_test "zarch-arch12" "{as -m64} {as -march=arch12}"
|
||||
run_dump_test "zarch-arch13" "{as -m64} {as -march=arch13}"
|
||||
run_dump_test "zarch-arch14" "{as -m64} {as -march=arch14}"
|
||||
+ run_dump_test "zarch-arch15" "{as -m64} {as -march=arch15}"
|
||||
run_dump_test "zarch-reloc" "{as -m64}"
|
||||
run_dump_test "zarch-operands" "{as -m64} {as -march=z9-109}"
|
||||
run_dump_test "zarch-machine" "{as -m64} {as -march=z900}"
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-arch15.d b/gas/testsuite/gas/s390/zarch-arch15.d
|
||||
new file mode 100644
|
||||
index 00000000000..955c9706b35
|
||||
--- /dev/null
|
||||
+++ b/gas/testsuite/gas/s390/zarch-arch15.d
|
||||
@@ -0,0 +1,102 @@
|
||||
+#name: s390x opcode
|
||||
+#objdump: -dr
|
||||
+
|
||||
+.*: +file format .*
|
||||
+
|
||||
+Disassembly of section .text:
|
||||
+
|
||||
+.* <foo>:
|
||||
+.*: e7 f1 4d 00 87 89 [ ]*vblend %v15,%v17,%v20,%v24,13
|
||||
+.*: e7 f1 40 00 87 89 [ ]*vblendb %v15,%v17,%v20,%v24
|
||||
+.*: e7 f1 41 00 87 89 [ ]*vblendh %v15,%v17,%v20,%v24
|
||||
+.*: e7 f1 42 00 87 89 [ ]*vblendf %v15,%v17,%v20,%v24
|
||||
+.*: e7 f1 43 00 87 89 [ ]*vblendg %v15,%v17,%v20,%v24
|
||||
+.*: e7 f1 44 00 87 89 [ ]*vblendq %v15,%v17,%v20,%v24
|
||||
+.*: e7 f1 40 fd 87 88 [ ]*veval %v15,%v17,%v20,%v24,253
|
||||
+.*: e7 f1 00 00 d4 54 [ ]*vgem %v15,%v17,13
|
||||
+.*: e7 f1 00 00 04 54 [ ]*vgemb %v15,%v17
|
||||
+.*: e7 f1 00 00 14 54 [ ]*vgemh %v15,%v17
|
||||
+.*: e7 f1 00 00 24 54 [ ]*vgemf %v15,%v17
|
||||
+.*: e7 f1 00 00 34 54 [ ]*vgemg %v15,%v17
|
||||
+.*: e7 f1 00 00 44 54 [ ]*vgemq %v15,%v17
|
||||
+.*: e7 f1 00 00 34 d7 [ ]*vuphg %v15,%v17
|
||||
+.*: e7 f1 00 00 34 d5 [ ]*vuplhg %v15,%v17
|
||||
+.*: e7 f1 00 00 34 d6 [ ]*vuplg %v15,%v17
|
||||
+.*: e7 f1 00 00 34 d4 [ ]*vupllg %v15,%v17
|
||||
+.*: e7 f1 40 00 46 f2 [ ]*vavgq %v15,%v17,%v20
|
||||
+.*: e7 f1 40 00 46 f0 [ ]*vavglq %v15,%v17,%v20
|
||||
+.*: e7 f1 00 00 44 db [ ]*vecq %v15,%v17
|
||||
+.*: e7 f1 00 00 44 d9 [ ]*veclq %v15,%v17
|
||||
+.*: e7 f1 40 00 46 f8 [ ]*vceqq %v15,%v17,%v20
|
||||
+.*: e7 f1 40 10 46 f8 [ ]*vceqqs %v15,%v17,%v20
|
||||
+.*: e7 f1 40 00 46 fb [ ]*vchq %v15,%v17,%v20
|
||||
+.*: e7 f1 40 10 46 fb [ ]*vchqs %v15,%v17,%v20
|
||||
+.*: e7 f1 40 00 46 f9 [ ]*vchlq %v15,%v17,%v20
|
||||
+.*: e7 f1 40 10 46 f9 [ ]*vchlqs %v15,%v17,%v20
|
||||
+.*: e7 f1 00 00 44 53 [ ]*vclzq %v15,%v17
|
||||
+.*: e7 f1 00 00 44 52 [ ]*vctzq %v15,%v17
|
||||
+.*: e7 f1 00 00 44 de [ ]*vlcq %v15,%v17
|
||||
+.*: e7 f1 00 00 44 df [ ]*vlpq %v15,%v17
|
||||
+.*: e7 f1 40 00 46 ff [ ]*vmxq %v15,%v17,%v20
|
||||
+.*: e7 f1 40 00 46 fd [ ]*vmxlq %v15,%v17,%v20
|
||||
+.*: e7 f1 40 00 46 fe [ ]*vmnq %v15,%v17,%v20
|
||||
+.*: e7 f1 40 00 46 fc [ ]*vmnlq %v15,%v17,%v20
|
||||
+.*: e7 f1 43 00 87 aa [ ]*vmalg %v15,%v17,%v20,%v24
|
||||
+.*: e7 f1 44 00 87 aa [ ]*vmalq %v15,%v17,%v20,%v24
|
||||
+.*: e7 f1 43 00 87 ab [ ]*vmahg %v15,%v17,%v20,%v24
|
||||
+.*: e7 f1 44 00 87 ab [ ]*vmahq %v15,%v17,%v20,%v24
|
||||
+.*: e7 f1 43 00 87 a9 [ ]*vmalhg %v15,%v17,%v20,%v24
|
||||
+.*: e7 f1 44 00 87 a9 [ ]*vmalhq %v15,%v17,%v20,%v24
|
||||
+.*: e7 f1 43 00 87 ae [ ]*vmaeg %v15,%v17,%v20,%v24
|
||||
+.*: e7 f1 43 00 87 ac [ ]*vmaleg %v15,%v17,%v20,%v24
|
||||
+.*: e7 f1 43 00 87 af [ ]*vmaog %v15,%v17,%v20,%v24
|
||||
+.*: e7 f1 43 00 87 ad [ ]*vmalog %v15,%v17,%v20,%v24
|
||||
+.*: e7 f1 40 00 36 a3 [ ]*vmhg %v15,%v17,%v20
|
||||
+.*: e7 f1 40 00 46 a3 [ ]*vmhq %v15,%v17,%v20
|
||||
+.*: e7 f1 40 00 36 a1 [ ]*vmlhg %v15,%v17,%v20
|
||||
+.*: e7 f1 40 00 46 a1 [ ]*vmlhq %v15,%v17,%v20
|
||||
+.*: e7 f1 40 00 36 a2 [ ]*vmlg %v15,%v17,%v20
|
||||
+.*: e7 f1 40 00 46 a2 [ ]*vmlq %v15,%v17,%v20
|
||||
+.*: e7 f1 40 00 36 a6 [ ]*vmeg %v15,%v17,%v20
|
||||
+.*: e7 f1 40 00 36 a4 [ ]*vmleg %v15,%v17,%v20
|
||||
+.*: e7 f1 40 00 36 a7 [ ]*vmog %v15,%v17,%v20
|
||||
+.*: e7 f1 40 00 36 a5 [ ]*vmlog %v15,%v17,%v20
|
||||
+.*: e7 f1 40 0c d6 b2 [ ]*vd %v15,%v17,%v20,13,12
|
||||
+.*: e7 f1 40 0d 26 b2 [ ]*vdf %v15,%v17,%v20,13
|
||||
+.*: e7 f1 40 0d 36 b2 [ ]*vdg %v15,%v17,%v20,13
|
||||
+.*: e7 f1 40 0d 46 b2 [ ]*vdq %v15,%v17,%v20,13
|
||||
+.*: e7 f1 40 0c d6 b0 [ ]*vdl %v15,%v17,%v20,13,12
|
||||
+.*: e7 f1 40 0d 26 b0 [ ]*vdlf %v15,%v17,%v20,13
|
||||
+.*: e7 f1 40 0d 36 b0 [ ]*vdlg %v15,%v17,%v20,13
|
||||
+.*: e7 f1 40 0d 46 b0 [ ]*vdlq %v15,%v17,%v20,13
|
||||
+.*: e7 f1 40 0c d6 b3 [ ]*vr %v15,%v17,%v20,13,12
|
||||
+.*: e7 f1 40 0d 26 b3 [ ]*vrf %v15,%v17,%v20,13
|
||||
+.*: e7 f1 40 0d 36 b3 [ ]*vrg %v15,%v17,%v20,13
|
||||
+.*: e7 f1 40 0d 46 b3 [ ]*vrq %v15,%v17,%v20,13
|
||||
+.*: e7 f1 40 0c d6 b1 [ ]*vrl %v15,%v17,%v20,13,12
|
||||
+.*: e7 f1 40 0d 26 b1 [ ]*vrlf %v15,%v17,%v20,13
|
||||
+.*: e7 f1 40 0d 36 b1 [ ]*vrlg %v15,%v17,%v20,13
|
||||
+.*: e7 f1 40 0d 46 b1 [ ]*vrlq %v15,%v17,%v20,13
|
||||
+.*: b9 68 00 69 [ ]*clzg %r6,%r9
|
||||
+.*: b9 69 00 69 [ ]*ctzg %r6,%r9
|
||||
+.*: e3 69 b8 f0 fd 60 [ ]*lxab %r6,-10000\(%r9,%r11\)
|
||||
+.*: e3 69 b8 f0 fd 62 [ ]*lxah %r6,-10000\(%r9,%r11\)
|
||||
+.*: e3 69 b8 f0 fd 64 [ ]*lxaf %r6,-10000\(%r9,%r11\)
|
||||
+.*: e3 69 b8 f0 fd 66 [ ]*lxag %r6,-10000\(%r9,%r11\)
|
||||
+.*: e3 69 b8 f0 fd 68 [ ]*lxaq %r6,-10000\(%r9,%r11\)
|
||||
+.*: e3 69 b8 f0 fd 61 [ ]*llxab %r6,-10000\(%r9,%r11\)
|
||||
+.*: e3 69 b8 f0 fd 63 [ ]*llxah %r6,-10000\(%r9,%r11\)
|
||||
+.*: e3 69 b8 f0 fd 65 [ ]*llxaf %r6,-10000\(%r9,%r11\)
|
||||
+.*: e3 69 b8 f0 fd 67 [ ]*llxag %r6,-10000\(%r9,%r11\)
|
||||
+.*: e3 69 b8 f0 fd 69 [ ]*llxaq %r6,-10000\(%r9,%r11\)
|
||||
+.*: b9 6c b0 69 [ ]*bextg %r6,%r9,%r11
|
||||
+.*: b9 6d b0 69 [ ]*bdepg %r6,%r9,%r11
|
||||
+.*: b9 3e 00 69 [ ]*kimd %r6,%r9
|
||||
+.*: b9 3e d0 69 [ ]*kimd %r6,%r9,13
|
||||
+.*: b9 3f 00 69 [ ]*klmd %r6,%r9
|
||||
+.*: b9 3f d0 69 [ ]*klmd %r6,%r9,13
|
||||
+.*: e6 f1 00 d0 04 4e [ ]*vcvbq %v15,%v17,13
|
||||
+.*: e6 f1 00 cf d4 4a [ ]*vcvdq %v15,%v17,253,12
|
||||
+.*: e6 0f 00 00 00 5f [ ]*vtp %v15
|
||||
+.*: e6 0f 0f ff d0 5f [ ]*vtp %v15,65533
|
||||
+.*: e6 0f 1f ff d2 7f [ ]*vtz %v15,%v17,65533
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-arch15.s b/gas/testsuite/gas/s390/zarch-arch15.s
|
||||
new file mode 100644
|
||||
index 00000000000..43be9d46a48
|
||||
--- /dev/null
|
||||
+++ b/gas/testsuite/gas/s390/zarch-arch15.s
|
||||
@@ -0,0 +1,96 @@
|
||||
+.text
|
||||
+foo:
|
||||
+ vblend %v15,%v17,%v20,%v24,13
|
||||
+ vblendb %v15,%v17,%v20,%v24
|
||||
+ vblendh %v15,%v17,%v20,%v24
|
||||
+ vblendf %v15,%v17,%v20,%v24
|
||||
+ vblendg %v15,%v17,%v20,%v24
|
||||
+ vblendq %v15,%v17,%v20,%v24
|
||||
+ veval %v15,%v17,%v20,%v24,253
|
||||
+ vgem %v15,%v17,13
|
||||
+ vgemb %v15,%v17
|
||||
+ vgemh %v15,%v17
|
||||
+ vgemf %v15,%v17
|
||||
+ vgemg %v15,%v17
|
||||
+ vgemq %v15,%v17
|
||||
+ vuphg %v15,%v17
|
||||
+ vuplhg %v15,%v17
|
||||
+ vuplg %v15,%v17
|
||||
+ vupllg %v15,%v17
|
||||
+ vavgq %v15,%v17,%v20
|
||||
+ vavglq %v15,%v17,%v20
|
||||
+ vecq %v15,%v17
|
||||
+ veclq %v15,%v17
|
||||
+ vceqq %v15,%v17,%v20
|
||||
+ vceqqs %v15,%v17,%v20
|
||||
+ vchq %v15,%v17,%v20
|
||||
+ vchqs %v15,%v17,%v20
|
||||
+ vchlq %v15,%v17,%v20
|
||||
+ vchlqs %v15,%v17,%v20
|
||||
+ vclzq %v15,%v17
|
||||
+ vctzq %v15,%v17
|
||||
+ vlcq %v15,%v17
|
||||
+ vlpq %v15,%v17
|
||||
+ vmxq %v15,%v17,%v20
|
||||
+ vmxlq %v15,%v17,%v20
|
||||
+ vmnq %v15,%v17,%v20
|
||||
+ vmnlq %v15,%v17,%v20
|
||||
+ vmalg %v15,%v17,%v20,%v24
|
||||
+ vmalq %v15,%v17,%v20,%v24
|
||||
+ vmahg %v15,%v17,%v20,%v24
|
||||
+ vmahq %v15,%v17,%v20,%v24
|
||||
+ vmalhg %v15,%v17,%v20,%v24
|
||||
+ vmalhq %v15,%v17,%v20,%v24
|
||||
+ vmaeg %v15,%v17,%v20,%v24
|
||||
+ vmaleg %v15,%v17,%v20,%v24
|
||||
+ vmaog %v15,%v17,%v20,%v24
|
||||
+ vmalog %v15,%v17,%v20,%v24
|
||||
+ vmhg %v15,%v17,%v20
|
||||
+ vmhq %v15,%v17,%v20
|
||||
+ vmlhg %v15,%v17,%v20
|
||||
+ vmlhq %v15,%v17,%v20
|
||||
+ vmlg %v15,%v17,%v20
|
||||
+ vmlq %v15,%v17,%v20
|
||||
+ vmeg %v15,%v17,%v20
|
||||
+ vmleg %v15,%v17,%v20
|
||||
+ vmog %v15,%v17,%v20
|
||||
+ vmlog %v15,%v17,%v20
|
||||
+ vd %v15,%v17,%v20,13,12
|
||||
+ vdf %v15,%v17,%v20,13
|
||||
+ vdg %v15,%v17,%v20,13
|
||||
+ vdq %v15,%v17,%v20,13
|
||||
+ vdl %v15,%v17,%v20,13,12
|
||||
+ vdlf %v15,%v17,%v20,13
|
||||
+ vdlg %v15,%v17,%v20,13
|
||||
+ vdlq %v15,%v17,%v20,13
|
||||
+ vr %v15,%v17,%v20,13,12
|
||||
+ vrf %v15,%v17,%v20,13
|
||||
+ vrg %v15,%v17,%v20,13
|
||||
+ vrq %v15,%v17,%v20,13
|
||||
+ vrl %v15,%v17,%v20,13,12
|
||||
+ vrlf %v15,%v17,%v20,13
|
||||
+ vrlg %v15,%v17,%v20,13
|
||||
+ vrlq %v15,%v17,%v20,13
|
||||
+ clzg %r6,%r9
|
||||
+ ctzg %r6,%r9
|
||||
+ lxab %r6,-10000(%r9,%r11)
|
||||
+ lxah %r6,-10000(%r9,%r11)
|
||||
+ lxaf %r6,-10000(%r9,%r11)
|
||||
+ lxag %r6,-10000(%r9,%r11)
|
||||
+ lxaq %r6,-10000(%r9,%r11)
|
||||
+ llxab %r6,-10000(%r9,%r11)
|
||||
+ llxah %r6,-10000(%r9,%r11)
|
||||
+ llxaf %r6,-10000(%r9,%r11)
|
||||
+ llxag %r6,-10000(%r9,%r11)
|
||||
+ llxaq %r6,-10000(%r9,%r11)
|
||||
+ bextg %r6,%r9,%r11
|
||||
+ bdepg %r6,%r9,%r11
|
||||
+ kimd %r6,%r9
|
||||
+ kimd %r6,%r9,13
|
||||
+ klmd %r6,%r9
|
||||
+ klmd %r6,%r9,13
|
||||
+ vcvbq %v15,%v17,13
|
||||
+ vcvdq %v15,%v17,253,12
|
||||
+ vtp %v15
|
||||
+ vtp %v15,65533
|
||||
+ vtz %v15,%v17,65533
|
||||
diff -rup binutils.orig/include/opcode/s390.h binutils-2.41/include/opcode/s390.h
|
||||
--- binutils.orig/include/opcode/s390.h 2024-11-12 16:46:32.458205701 +0000
|
||||
+++ binutils-2.41/include/opcode/s390.h 2024-11-12 16:46:43.852237253 +0000
|
||||
@@ -45,6 +45,7 @@ enum s390_opcode_cpu_val
|
||||
S390_OPCODE_ARCH12,
|
||||
S390_OPCODE_ARCH13,
|
||||
S390_OPCODE_ARCH14,
|
||||
+ S390_OPCODE_ARCH15,
|
||||
S390_OPCODE_MAXCPU
|
||||
};
|
||||
|
||||
diff -rup binutils.orig/opcodes/s390-mkopc.c binutils-2.41/opcodes/s390-mkopc.c
|
||||
--- binutils.orig/opcodes/s390-mkopc.c 2024-11-12 16:46:33.158207639 +0000
|
||||
+++ binutils-2.41/opcodes/s390-mkopc.c 2024-11-12 16:46:43.852237253 +0000
|
||||
@@ -384,6 +384,8 @@ main (void)
|
||||
else if (strcmp (cpu_string, "z16") == 0
|
||||
|| strcmp (cpu_string, "arch14") == 0)
|
||||
min_cpu = S390_OPCODE_ARCH14;
|
||||
+ else if (strcmp (cpu_string, "arch15") == 0)
|
||||
+ min_cpu = S390_OPCODE_ARCH15;
|
||||
else {
|
||||
fprintf (stderr, "Couldn't parse cpu string %s\n", cpu_string);
|
||||
exit (1);
|
||||
diff -rup binutils.orig/opcodes/s390-opc.c binutils-2.41/opcodes/s390-opc.c
|
||||
--- binutils.orig/opcodes/s390-opc.c 2024-11-12 16:46:33.194207739 +0000
|
||||
+++ binutils-2.41/opcodes/s390-opc.c 2024-11-12 16:46:43.853237256 +0000
|
||||
@@ -228,7 +228,9 @@ const struct s390_operand s390_operands[
|
||||
{ 12, 16, 0 },
|
||||
#define U16_16 (U12_16 + 1) /* 16 bit unsigned value starting at 16 */
|
||||
{ 16, 16, 0 },
|
||||
-#define U16_32 (U16_16 + 1) /* 16 bit unsigned value starting at 32 */
|
||||
+#define U16_20 (U16_16 + 1) /* 16 bit unsigned value starting at 20 */
|
||||
+ { 16, 20, 0 },
|
||||
+#define U16_32 (U16_20 + 1) /* 16 bit unsigned value starting at 32 */
|
||||
{ 16, 32, 0 },
|
||||
#define U32_16 (U16_32 + 1) /* 32 bit unsigned value starting at 16 */
|
||||
{ 32, 16, 0 },
|
||||
@@ -484,6 +486,8 @@ unused_s390_operands_static_asserts (voi
|
||||
#define INSTR_VRI_VVUUU 6, { V_8,V_12,U12_16,U4_32,U4_28,0 } /* e.g. vftci */
|
||||
#define INSTR_VRI_VVUUU2 6, { V_8,V_12,U8_28,U8_16,U4_24,0 } /* e.g. vpsop */
|
||||
#define INSTR_VRI_VR0UU 6, { V_8,R_12,U8_28,U4_24,0,0 } /* e.g. vcvd */
|
||||
+#define INSTR_VRI_VV0UU 6, { V_8,V_12,U8_28,U4_24,0,0 } /* e.g. vcvdq */
|
||||
+#define INSTR_VRI_VVV0UV 6, { V_8,V_12,V_16,V_32,U8_24,0 } /* e.g. veval */
|
||||
#define INSTR_VRX_VRRD 6, { V_8,D_20,X_12,B_16,0,0 } /* e.g. vl */
|
||||
#define INSTR_VRX_VV 6, { V_8,V_12,0,0,0,0 } /* e.g. vlr */
|
||||
#define INSTR_VRX_VRRDU 6, { V_8,D_20,X_12,B_16,U4_32,0 } /* e.g. vlrep */
|
||||
@@ -494,10 +498,10 @@ unused_s390_operands_static_asserts (voi
|
||||
#define INSTR_VRS_VRRDU 6, { V_8,R_12,D_20,B_16,U4_32,0 } /* e.g. vlvg */
|
||||
#define INSTR_VRS_VRRD 6, { V_8,R_12,D_20,B_16,0,0 } /* e.g. vlvgb */
|
||||
#define INSTR_VRS_RRDV 6, { V_32,R_12,D_20,B_16,0,0 } /* e.g. vlrlr */
|
||||
-#define INSTR_VRR_0V 6, { V_12,0,0,0,0,0 } /* e.g. vtp */
|
||||
#define INSTR_VRR_VRR 6, { V_8,R_12,R_16,0,0,0 } /* e.g. vlvgp */
|
||||
#define INSTR_VRR_VVV0U 6, { V_8,V_12,V_16,U4_32,0,0 } /* e.g. vmrh */
|
||||
#define INSTR_VRR_VVV0U0 6, { V_8,V_12,V_16,U4_24,0,0 } /* e.g. vfaeb */
|
||||
+#define INSTR_VRR_VVV0U02 6, { V_8,V_12,V_16,U4_28,0,0 } /* e.g. vd */
|
||||
#define INSTR_VRR_VVV0U1 INSTR_VRR_VVV0U0 /* e.g. vfaebs*/
|
||||
#define INSTR_VRR_VVV0U2 INSTR_VRR_VVV0U0 /* e.g. vfaezb*/
|
||||
#define INSTR_VRR_VVV0U3 INSTR_VRR_VVV0U0 /* e.g. vfaezbs*/
|
||||
@@ -523,6 +527,9 @@ unused_s390_operands_static_asserts (voi
|
||||
#define INSTR_VRR_VV0UUU 6, { V_8,V_12,U4_32,U4_28,U4_24,0 } /* e.g. vcdg */
|
||||
#define INSTR_VRR_VVVU0UV 6, { V_8,V_12,V_16,V_32,U4_28,U4_20 } /* e.g. vfma */
|
||||
#define INSTR_VRR_VV0U0U 6, { V_8,V_12,U4_32,U4_24,0,0 } /* e.g. vistr */
|
||||
+#define INSTR_VRR_0V 6, { V_12,0,0,0,0,0 } /* e.g. vtp */
|
||||
+#define INSTR_VRR_0V0U 6, { V_12,U16_20,0,0,0,0 } /* e.g. vtp */
|
||||
+#define INSTR_VRR_0VVU 6, { V_12,V_16,U16_20,0,0,0 } /* e.g. vtz */
|
||||
#define INSTR_VRR_0VV0U 6, { V_12,V_16,U4_24,0,0,0 } /* e.g. vcp */
|
||||
#define INSTR_VRR_RV0U 6, { R_8,V_12,U4_24,0,0,0 } /* e.g. vcvb */
|
||||
#define INSTR_VRR_RV0UU 6, { R_8,V_12,U4_24,U4_28,0,0 } /* e.g. vcvb */
|
||||
@@ -711,6 +718,8 @@ unused_s390_operands_static_asserts (voi
|
||||
#define MASK_VRI_VVUUU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
|
||||
#define MASK_VRI_VVUUU2 { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
|
||||
#define MASK_VRI_VR0UU { 0xff, 0x00, 0xff, 0x00, 0x00, 0xff }
|
||||
+#define MASK_VRI_VV0UU { 0xff, 0x00, 0xff, 0x00, 0x00, 0xff }
|
||||
+#define MASK_VRI_VVV0UV { 0xff, 0x00, 0x0f, 0x00, 0x00, 0xff }
|
||||
#define MASK_VRX_VRRD { 0xff, 0x00, 0x00, 0x00, 0xf0, 0xff }
|
||||
#define MASK_VRX_VV { 0xff, 0x00, 0xff, 0xff, 0xf0, 0xff }
|
||||
#define MASK_VRX_VRRDU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
|
||||
@@ -721,10 +730,10 @@ unused_s390_operands_static_asserts (voi
|
||||
#define MASK_VRS_VRRDU { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
|
||||
#define MASK_VRS_VRRD { 0xff, 0x00, 0x00, 0x00, 0xf0, 0xff }
|
||||
#define MASK_VRS_RRDV { 0xff, 0xf0, 0x00, 0x00, 0x00, 0xff }
|
||||
-#define MASK_VRR_0V { 0xff, 0xf0, 0xff, 0xff, 0xf0, 0xff }
|
||||
#define MASK_VRR_VRR { 0xff, 0x00, 0x0f, 0xff, 0xf0, 0xff }
|
||||
#define MASK_VRR_VVV0U { 0xff, 0x00, 0x0f, 0xff, 0x00, 0xff }
|
||||
#define MASK_VRR_VVV0U0 { 0xff, 0x00, 0x0f, 0x0f, 0xf0, 0xff }
|
||||
+#define MASK_VRR_VVV0U02 { 0xff, 0x00, 0x0f, 0xf0, 0xf0, 0xff }
|
||||
#define MASK_VRR_VVV0U1 { 0xff, 0x00, 0x0f, 0x1f, 0xf0, 0xff }
|
||||
#define MASK_VRR_VVV0U2 { 0xff, 0x00, 0x0f, 0x2f, 0xf0, 0xff }
|
||||
#define MASK_VRR_VVV0U3 { 0xff, 0x00, 0x0f, 0x3f, 0xf0, 0xff }
|
||||
@@ -750,6 +759,9 @@ unused_s390_operands_static_asserts (voi
|
||||
#define MASK_VRR_VV0UUU { 0xff, 0x00, 0xff, 0x00, 0x00, 0xff }
|
||||
#define MASK_VRR_VVVU0UV { 0xff, 0x00, 0x00, 0xf0, 0x00, 0xff }
|
||||
#define MASK_VRR_VV0U0U { 0xff, 0x00, 0xff, 0x0f, 0x00, 0xff }
|
||||
+#define MASK_VRR_0V { 0xff, 0xf0, 0xff, 0xff, 0xf0, 0xff }
|
||||
+#define MASK_VRR_0V0U { 0xff, 0xf0, 0xf0, 0x00, 0x00, 0xff }
|
||||
+#define MASK_VRR_0VVU { 0xff, 0xf0, 0x00, 0x00, 0x00, 0xff }
|
||||
#define MASK_VRR_0VV0U { 0xff, 0xf0, 0x0f, 0x0f, 0xf0, 0xff }
|
||||
#define MASK_VRR_RV0U { 0xff, 0x00, 0xff, 0x0f, 0xf0, 0xff }
|
||||
#define MASK_VRR_RV0UU { 0xff, 0x00, 0xff, 0x00, 0xf0, 0xff }
|
||||
diff -rup binutils.orig/opcodes/s390-opc.txt binutils-2.41/opcodes/s390-opc.txt
|
||||
--- binutils.orig/opcodes/s390-opc.txt 2024-11-12 16:46:33.194207739 +0000
|
||||
+++ binutils-2.41/opcodes/s390-opc.txt 2024-11-12 16:46:43.854237258 +0000
|
||||
@@ -2072,3 +2072,113 @@ b201 stbear S_RD "store bear" arch14 zar
|
||||
# Processor-Activity-Instrumentation Facility
|
||||
|
||||
b28f qpaci S_RD "query processor activity counter information" arch14 zarch
|
||||
+
|
||||
+
|
||||
+# arch15 instructions
|
||||
+
|
||||
+e70000000089 vblend VRR_VVVU0V " " arch15 zarch
|
||||
+e70000000089 vblendb VRR_VVV0V " " arch15 zarch
|
||||
+e70001000089 vblendh VRR_VVV0V " " arch15 zarch
|
||||
+e70002000089 vblendf VRR_VVV0V " " arch15 zarch
|
||||
+e70003000089 vblendg VRR_VVV0V " " arch15 zarch
|
||||
+e70004000089 vblendq VRR_VVV0V " " arch15 zarch
|
||||
+
|
||||
+e70000000088 veval VRI_VVV0UV " " arch15 zarch
|
||||
+
|
||||
+e70000000054 vgem VRR_VV0U " " arch15 zarch
|
||||
+e70000000054 vgemb VRR_VV " " arch15 zarch
|
||||
+e70000001054 vgemh VRR_VV " " arch15 zarch
|
||||
+e70000002054 vgemf VRR_VV " " arch15 zarch
|
||||
+e70000003054 vgemg VRR_VV " " arch15 zarch
|
||||
+e70000004054 vgemq VRR_VV " " arch15 zarch
|
||||
+
|
||||
+e700000030d7 vuphg VRR_VV " " arch15 zarch
|
||||
+e700000030d5 vuplhg VRR_VV " " arch15 zarch
|
||||
+e700000030d6 vuplg VRR_VV " " arch15 zarch
|
||||
+e700000030d4 vupllg VRR_VV " " arch15 zarch
|
||||
+
|
||||
+e700000040f2 vavgq VRR_VVV " " arch15 zarch
|
||||
+e700000040f0 vavglq VRR_VVV " " arch15 zarch
|
||||
+e700000040db vecq VRR_VV " " arch15 zarch
|
||||
+e700000040d9 veclq VRR_VV " " arch15 zarch
|
||||
+e700000040f8 vceqq VRR_VVV " " arch15 zarch
|
||||
+e700001040f8 vceqqs VRR_VVV " " arch15 zarch
|
||||
+e700000040fb vchq VRR_VVV " " arch15 zarch
|
||||
+e700001040fb vchqs VRR_VVV " " arch15 zarch
|
||||
+e700000040f9 vchlq VRR_VVV " " arch15 zarch
|
||||
+e700001040f9 vchlqs VRR_VVV " " arch15 zarch
|
||||
+e70000004053 vclzq VRR_VV " " arch15 zarch
|
||||
+e70000004052 vctzq VRR_VV " " arch15 zarch
|
||||
+e700000040de vlcq VRR_VV " " arch15 zarch
|
||||
+e700000040df vlpq VRR_VV " " arch15 zarch
|
||||
+e700000040ff vmxq VRR_VVV " " arch15 zarch
|
||||
+e700000040fd vmxlq VRR_VVV " " arch15 zarch
|
||||
+e700000040fe vmnq VRR_VVV " " arch15 zarch
|
||||
+e700000040fc vmnlq VRR_VVV " " arch15 zarch
|
||||
+e700030000aa vmalg VRR_VVV0V " " arch15 zarch
|
||||
+e700040000aa vmalq VRR_VVV0V " " arch15 zarch
|
||||
+e700030000ab vmahg VRR_VVV0V " " arch15 zarch
|
||||
+e700040000ab vmahq VRR_VVV0V " " arch15 zarch
|
||||
+e700030000a9 vmalhg VRR_VVV0V " " arch15 zarch
|
||||
+e700040000a9 vmalhq VRR_VVV0V " " arch15 zarch
|
||||
+e700030000ae vmaeg VRR_VVV0V " " arch15 zarch
|
||||
+e700030000ac vmaleg VRR_VVV0V " " arch15 zarch
|
||||
+e700030000af vmaog VRR_VVV0V " " arch15 zarch
|
||||
+e700030000ad vmalog VRR_VVV0V " " arch15 zarch
|
||||
+e700000030a3 vmhg VRR_VVV " " arch15 zarch
|
||||
+e700000040a3 vmhq VRR_VVV " " arch15 zarch
|
||||
+e700000030a1 vmlhg VRR_VVV " " arch15 zarch
|
||||
+e700000040a1 vmlhq VRR_VVV " " arch15 zarch
|
||||
+e700000030a2 vmlg VRR_VVV " " arch15 zarch
|
||||
+e700000040a2 vmlq VRR_VVV " " arch15 zarch
|
||||
+e700000030a6 vmeg VRR_VVV " " arch15 zarch
|
||||
+e700000030a4 vmleg VRR_VVV " " arch15 zarch
|
||||
+e700000030a7 vmog VRR_VVV " " arch15 zarch
|
||||
+e700000030a5 vmlog VRR_VVV " " arch15 zarch
|
||||
+
|
||||
+e700000000b2 vd VRR_VVV0UU " " arch15 zarch
|
||||
+e700000020b2 vdf VRR_VVV0U02 " " arch15 zarch
|
||||
+e700000030b2 vdg VRR_VVV0U02 " " arch15 zarch
|
||||
+e700000040b2 vdq VRR_VVV0U02 " " arch15 zarch
|
||||
+
|
||||
+e700000000b0 vdl VRR_VVV0UU " " arch15 zarch
|
||||
+e700000020b0 vdlf VRR_VVV0U02 " " arch15 zarch
|
||||
+e700000030b0 vdlg VRR_VVV0U02 " " arch15 zarch
|
||||
+e700000040b0 vdlq VRR_VVV0U02 " " arch15 zarch
|
||||
+
|
||||
+e700000000b3 vr VRR_VVV0UU " " arch15 zarch
|
||||
+e700000020b3 vrf VRR_VVV0U02 " " arch15 zarch
|
||||
+e700000030b3 vrg VRR_VVV0U02 " " arch15 zarch
|
||||
+e700000040b3 vrq VRR_VVV0U02 " " arch15 zarch
|
||||
+
|
||||
+e700000000b1 vrl VRR_VVV0UU " " arch15 zarch
|
||||
+e700000020b1 vrlf VRR_VVV0U02 " " arch15 zarch
|
||||
+e700000030b1 vrlg VRR_VVV0U02 " " arch15 zarch
|
||||
+e700000040b1 vrlq VRR_VVV0U02 " " arch15 zarch
|
||||
+
|
||||
+b968 clzg RRE_RR " " arch15 zarch
|
||||
+b969 ctzg RRE_RR " " arch15 zarch
|
||||
+
|
||||
+e30000000060 lxab RXY_RRRD " " arch15 zarch
|
||||
+e30000000062 lxah RXY_RRRD " " arch15 zarch
|
||||
+e30000000064 lxaf RXY_RRRD " " arch15 zarch
|
||||
+e30000000066 lxag RXY_RRRD " " arch15 zarch
|
||||
+e30000000068 lxaq RXY_RRRD " " arch15 zarch
|
||||
+
|
||||
+e30000000061 llxab RXY_RRRD " " arch15 zarch
|
||||
+e30000000063 llxah RXY_RRRD " " arch15 zarch
|
||||
+e30000000065 llxaf RXY_RRRD " " arch15 zarch
|
||||
+e30000000067 llxag RXY_RRRD " " arch15 zarch
|
||||
+e30000000069 llxaq RXY_RRRD " " arch15 zarch
|
||||
+
|
||||
+b96c bextg RRF_R0RR2 " " arch15 zarch
|
||||
+b96d bdepg RRF_R0RR2 " " arch15 zarch
|
||||
+
|
||||
+b93e kimd RRF_U0RR " " arch15 zarch optparm
|
||||
+b93f klmd RRF_U0RR " " arch15 zarch optparm
|
||||
+
|
||||
+e6000000004e vcvbq VRR_VV0U2 " " arch15 zarch
|
||||
+e6000000004a vcvdq VRI_VV0UU " " arch15 zarch
|
||||
+
|
||||
+e6000000005f vtp VRR_0V0U " " arch15 zarch optparm
|
||||
+e6000000007f vtz VRR_0VVU " " arch15 zarch
|
||||
@ -1,245 +0,0 @@
|
||||
From 76c1ece3a59b26b3744136455eeca0dcf07d8f9d Mon Sep 17 00:00:00 2001
|
||||
From: Jens Remus <jremus@linux.ibm.com>
|
||||
Date: Mon, 18 Nov 2024 10:42:21 +0100
|
||||
Subject: [PATCH] s390: Add arch15 instruction names
|
||||
|
||||
opcodes/
|
||||
* s390-opc.txt: Add arch15 instruction names.
|
||||
|
||||
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
|
||||
(cherry picked from commit b0588b2173bf9aeff9eadc0cc024c4c69e69114d)
|
||||
---
|
||||
opcodes/s390-opc.txt | 220 ++++++++++++++++++++++---------------------
|
||||
1 file changed, 114 insertions(+), 106 deletions(-)
|
||||
|
||||
diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt
|
||||
index 089fd197b0c..c01face4eb6 100644
|
||||
--- a/opcodes/s390-opc.txt
|
||||
+++ b/opcodes/s390-opc.txt
|
||||
@@ -2076,109 +2076,117 @@ b28f qpaci S_RD "query processor activity counter information" arch14 zarch
|
||||
|
||||
# arch15 instructions
|
||||
|
||||
-e70000000089 vblend VRR_VVVU0V " " arch15 zarch
|
||||
-e70000000089 vblendb VRR_VVV0V " " arch15 zarch
|
||||
-e70001000089 vblendh VRR_VVV0V " " arch15 zarch
|
||||
-e70002000089 vblendf VRR_VVV0V " " arch15 zarch
|
||||
-e70003000089 vblendg VRR_VVV0V " " arch15 zarch
|
||||
-e70004000089 vblendq VRR_VVV0V " " arch15 zarch
|
||||
-
|
||||
-e70000000088 veval VRI_VVV0UV " " arch15 zarch
|
||||
-
|
||||
-e70000000054 vgem VRR_VV0U " " arch15 zarch
|
||||
-e70000000054 vgemb VRR_VV " " arch15 zarch
|
||||
-e70000001054 vgemh VRR_VV " " arch15 zarch
|
||||
-e70000002054 vgemf VRR_VV " " arch15 zarch
|
||||
-e70000003054 vgemg VRR_VV " " arch15 zarch
|
||||
-e70000004054 vgemq VRR_VV " " arch15 zarch
|
||||
-
|
||||
-e700000030d7 vuphg VRR_VV " " arch15 zarch
|
||||
-e700000030d5 vuplhg VRR_VV " " arch15 zarch
|
||||
-e700000030d6 vuplg VRR_VV " " arch15 zarch
|
||||
-e700000030d4 vupllg VRR_VV " " arch15 zarch
|
||||
-
|
||||
-e700000040f2 vavgq VRR_VVV " " arch15 zarch
|
||||
-e700000040f0 vavglq VRR_VVV " " arch15 zarch
|
||||
-e700000040db vecq VRR_VV " " arch15 zarch
|
||||
-e700000040d9 veclq VRR_VV " " arch15 zarch
|
||||
-e700000040f8 vceqq VRR_VVV " " arch15 zarch
|
||||
-e700001040f8 vceqqs VRR_VVV " " arch15 zarch
|
||||
-e700000040fb vchq VRR_VVV " " arch15 zarch
|
||||
-e700001040fb vchqs VRR_VVV " " arch15 zarch
|
||||
-e700000040f9 vchlq VRR_VVV " " arch15 zarch
|
||||
-e700001040f9 vchlqs VRR_VVV " " arch15 zarch
|
||||
-e70000004053 vclzq VRR_VV " " arch15 zarch
|
||||
-e70000004052 vctzq VRR_VV " " arch15 zarch
|
||||
-e700000040de vlcq VRR_VV " " arch15 zarch
|
||||
-e700000040df vlpq VRR_VV " " arch15 zarch
|
||||
-e700000040ff vmxq VRR_VVV " " arch15 zarch
|
||||
-e700000040fd vmxlq VRR_VVV " " arch15 zarch
|
||||
-e700000040fe vmnq VRR_VVV " " arch15 zarch
|
||||
-e700000040fc vmnlq VRR_VVV " " arch15 zarch
|
||||
-e700030000aa vmalg VRR_VVV0V " " arch15 zarch
|
||||
-e700040000aa vmalq VRR_VVV0V " " arch15 zarch
|
||||
-e700030000ab vmahg VRR_VVV0V " " arch15 zarch
|
||||
-e700040000ab vmahq VRR_VVV0V " " arch15 zarch
|
||||
-e700030000a9 vmalhg VRR_VVV0V " " arch15 zarch
|
||||
-e700040000a9 vmalhq VRR_VVV0V " " arch15 zarch
|
||||
-e700030000ae vmaeg VRR_VVV0V " " arch15 zarch
|
||||
-e700030000ac vmaleg VRR_VVV0V " " arch15 zarch
|
||||
-e700030000af vmaog VRR_VVV0V " " arch15 zarch
|
||||
-e700030000ad vmalog VRR_VVV0V " " arch15 zarch
|
||||
-e700000030a3 vmhg VRR_VVV " " arch15 zarch
|
||||
-e700000040a3 vmhq VRR_VVV " " arch15 zarch
|
||||
-e700000030a1 vmlhg VRR_VVV " " arch15 zarch
|
||||
-e700000040a1 vmlhq VRR_VVV " " arch15 zarch
|
||||
-e700000030a2 vmlg VRR_VVV " " arch15 zarch
|
||||
-e700000040a2 vmlq VRR_VVV " " arch15 zarch
|
||||
-e700000030a6 vmeg VRR_VVV " " arch15 zarch
|
||||
-e700000030a4 vmleg VRR_VVV " " arch15 zarch
|
||||
-e700000030a7 vmog VRR_VVV " " arch15 zarch
|
||||
-e700000030a5 vmlog VRR_VVV " " arch15 zarch
|
||||
-
|
||||
-e700000000b2 vd VRR_VVV0UU " " arch15 zarch
|
||||
-e700000020b2 vdf VRR_VVV0U02 " " arch15 zarch
|
||||
-e700000030b2 vdg VRR_VVV0U02 " " arch15 zarch
|
||||
-e700000040b2 vdq VRR_VVV0U02 " " arch15 zarch
|
||||
-
|
||||
-e700000000b0 vdl VRR_VVV0UU " " arch15 zarch
|
||||
-e700000020b0 vdlf VRR_VVV0U02 " " arch15 zarch
|
||||
-e700000030b0 vdlg VRR_VVV0U02 " " arch15 zarch
|
||||
-e700000040b0 vdlq VRR_VVV0U02 " " arch15 zarch
|
||||
-
|
||||
-e700000000b3 vr VRR_VVV0UU " " arch15 zarch
|
||||
-e700000020b3 vrf VRR_VVV0U02 " " arch15 zarch
|
||||
-e700000030b3 vrg VRR_VVV0U02 " " arch15 zarch
|
||||
-e700000040b3 vrq VRR_VVV0U02 " " arch15 zarch
|
||||
-
|
||||
-e700000000b1 vrl VRR_VVV0UU " " arch15 zarch
|
||||
-e700000020b1 vrlf VRR_VVV0U02 " " arch15 zarch
|
||||
-e700000030b1 vrlg VRR_VVV0U02 " " arch15 zarch
|
||||
-e700000040b1 vrlq VRR_VVV0U02 " " arch15 zarch
|
||||
-
|
||||
-b968 clzg RRE_RR " " arch15 zarch
|
||||
-b969 ctzg RRE_RR " " arch15 zarch
|
||||
-
|
||||
-e30000000060 lxab RXY_RRRD " " arch15 zarch
|
||||
-e30000000062 lxah RXY_RRRD " " arch15 zarch
|
||||
-e30000000064 lxaf RXY_RRRD " " arch15 zarch
|
||||
-e30000000066 lxag RXY_RRRD " " arch15 zarch
|
||||
-e30000000068 lxaq RXY_RRRD " " arch15 zarch
|
||||
-
|
||||
-e30000000061 llxab RXY_RRRD " " arch15 zarch
|
||||
-e30000000063 llxah RXY_RRRD " " arch15 zarch
|
||||
-e30000000065 llxaf RXY_RRRD " " arch15 zarch
|
||||
-e30000000067 llxag RXY_RRRD " " arch15 zarch
|
||||
-e30000000069 llxaq RXY_RRRD " " arch15 zarch
|
||||
-
|
||||
-b96c bextg RRF_R0RR2 " " arch15 zarch
|
||||
-b96d bdepg RRF_R0RR2 " " arch15 zarch
|
||||
-
|
||||
-b93e kimd RRF_U0RR " " arch15 zarch optparm
|
||||
-b93f klmd RRF_U0RR " " arch15 zarch optparm
|
||||
-
|
||||
-e6000000004e vcvbq VRR_VV0U2 " " arch15 zarch
|
||||
-e6000000004a vcvdq VRI_VV0UU " " arch15 zarch
|
||||
-
|
||||
-e6000000005f vtp VRR_0V0U " " arch15 zarch optparm
|
||||
-e6000000007f vtz VRR_0VVU " " arch15 zarch
|
||||
+# Vector-Enhancements Facility 3
|
||||
+
|
||||
+e70000000089 vblend VRR_VVVU0V "vector blend" arch15 zarch
|
||||
+e70000000089 vblendb VRR_VVV0V "vector blend byte" arch15 zarch
|
||||
+e70001000089 vblendh VRR_VVV0V "vector blend halfword" arch15 zarch
|
||||
+e70002000089 vblendf VRR_VVV0V "vector blend word" arch15 zarch
|
||||
+e70003000089 vblendg VRR_VVV0V "vector blend doubleword" arch15 zarch
|
||||
+e70004000089 vblendq VRR_VVV0V "vector blend quadword" arch15 zarch
|
||||
+
|
||||
+e70000000088 veval VRI_VVV0UV "vector evaluate" arch15 zarch
|
||||
+
|
||||
+e70000000054 vgem VRR_VV0U "vector generate element masks" arch15 zarch
|
||||
+e70000000054 vgemb VRR_VV "vector generate element masks byte" arch15 zarch
|
||||
+e70000001054 vgemh VRR_VV "vector generate element masks halfword" arch15 zarch
|
||||
+e70000002054 vgemf VRR_VV "vector generate element masks word" arch15 zarch
|
||||
+e70000003054 vgemg VRR_VV "vector generate element masks doubleword" arch15 zarch
|
||||
+e70000004054 vgemq VRR_VV "vector generate element masks quadword" arch15 zarch
|
||||
+
|
||||
+e700000030d7 vuphg VRR_VV "vector unpack high doubleword" arch15 zarch
|
||||
+e700000030d5 vuplhg VRR_VV "vector unpack logical high doubleword" arch15 zarch
|
||||
+e700000030d6 vuplg VRR_VV "vector unpack low doubleword" arch15 zarch
|
||||
+e700000030d4 vupllg VRR_VV "vector unpack logical low doubleword" arch15 zarch
|
||||
+
|
||||
+e700000040f2 vavgq VRR_VVV "vector average quadword" arch15 zarch
|
||||
+e700000040f0 vavglq VRR_VVV "vector average logical quadword" arch15 zarch
|
||||
+e700000040db vecq VRR_VV "vector element compare quadword" arch15 zarch
|
||||
+e700000040d9 veclq VRR_VV "vector element compare logical quadword" arch15 zarch
|
||||
+e700000040f8 vceqq VRR_VVV "vector compare equal quadword" arch15 zarch
|
||||
+e700001040f8 vceqqs VRR_VVV "vector compare equal quadword" arch15 zarch
|
||||
+e700000040fb vchq VRR_VVV "vector compare high quadword" arch15 zarch
|
||||
+e700001040fb vchqs VRR_VVV "vector compare high quadword" arch15 zarch
|
||||
+e700000040f9 vchlq VRR_VVV "vector compare high logical quadword" arch15 zarch
|
||||
+e700001040f9 vchlqs VRR_VVV "vector compare high logical quadword" arch15 zarch
|
||||
+e70000004053 vclzq VRR_VV "vector count leading zeros quadword" arch15 zarch
|
||||
+e70000004052 vctzq VRR_VV "vector count trailing zeros quadword" arch15 zarch
|
||||
+e700000040de vlcq VRR_VV "vector load complement quadword" arch15 zarch
|
||||
+e700000040df vlpq VRR_VV "vector load positive quadword" arch15 zarch
|
||||
+e700000040ff vmxq VRR_VVV "vector maximum quadword" arch15 zarch
|
||||
+e700000040fd vmxlq VRR_VVV "vector maximum logical quadword" arch15 zarch
|
||||
+e700000040fe vmnq VRR_VVV "vector minimum quadword" arch15 zarch
|
||||
+e700000040fc vmnlq VRR_VVV "vector minimum logical quadword" arch15 zarch
|
||||
+e700030000aa vmalg VRR_VVV0V "vector multiply and add low doubleword" arch15 zarch
|
||||
+e700040000aa vmalq VRR_VVV0V "vector multiply and add low quadword" arch15 zarch
|
||||
+e700030000ab vmahg VRR_VVV0V "vector multiply and add high doubleword" arch15 zarch
|
||||
+e700040000ab vmahq VRR_VVV0V "vector multiply and add high quadword" arch15 zarch
|
||||
+e700030000a9 vmalhg VRR_VVV0V "vector multiply and add logical high doubleword" arch15 zarch
|
||||
+e700040000a9 vmalhq VRR_VVV0V "vector multiply and add logical high quadword" arch15 zarch
|
||||
+e700030000ae vmaeg VRR_VVV0V "vector multiply and add even doubleword" arch15 zarch
|
||||
+e700030000ac vmaleg VRR_VVV0V "vector multiply and add logical even doubleword" arch15 zarch
|
||||
+e700030000af vmaog VRR_VVV0V "vector multiply and add odd doubleword" arch15 zarch
|
||||
+e700030000ad vmalog VRR_VVV0V "vector multiply and add logical odd doubleword" arch15 zarch
|
||||
+e700000030a3 vmhg VRR_VVV "vector multiply high doubleword" arch15 zarch
|
||||
+e700000040a3 vmhq VRR_VVV "vector multiply high quadword" arch15 zarch
|
||||
+e700000030a1 vmlhg VRR_VVV "vector multiply logical high doubleword" arch15 zarch
|
||||
+e700000040a1 vmlhq VRR_VVV "vector multiply logical high quadword" arch15 zarch
|
||||
+e700000030a2 vmlg VRR_VVV "vector multiply low doubleword" arch15 zarch
|
||||
+e700000040a2 vmlq VRR_VVV "vector multiply low quadword" arch15 zarch
|
||||
+e700000030a6 vmeg VRR_VVV "vector multiply even doubleword" arch15 zarch
|
||||
+e700000030a4 vmleg VRR_VVV "vector multiply logical even doubleword" arch15 zarch
|
||||
+e700000030a7 vmog VRR_VVV "vector multiply odd doubleword" arch15 zarch
|
||||
+e700000030a5 vmlog VRR_VVV "vector multiply logical odd doubleword" arch15 zarch
|
||||
+
|
||||
+e700000000b2 vd VRR_VVV0UU "vector divide" arch15 zarch
|
||||
+e700000020b2 vdf VRR_VVV0U02 "vector divide word" arch15 zarch
|
||||
+e700000030b2 vdg VRR_VVV0U02 "vector divide doubleword" arch15 zarch
|
||||
+e700000040b2 vdq VRR_VVV0U02 "vector divide quadword" arch15 zarch
|
||||
+
|
||||
+e700000000b0 vdl VRR_VVV0UU "vector divide logical" arch15 zarch
|
||||
+e700000020b0 vdlf VRR_VVV0U02 "vector divide logical word" arch15 zarch
|
||||
+e700000030b0 vdlg VRR_VVV0U02 "vector divide logical doubleword" arch15 zarch
|
||||
+e700000040b0 vdlq VRR_VVV0U02 "vector divide logical quadword" arch15 zarch
|
||||
+
|
||||
+e700000000b3 vr VRR_VVV0UU "vector remainder" arch15 zarch
|
||||
+e700000020b3 vrf VRR_VVV0U02 "vector remainder word" arch15 zarch
|
||||
+e700000030b3 vrg VRR_VVV0U02 "vector remainder doubleword" arch15 zarch
|
||||
+e700000040b3 vrq VRR_VVV0U02 "vector remainder quadword" arch15 zarch
|
||||
+
|
||||
+e700000000b1 vrl VRR_VVV0UU "vector remainder logical" arch15 zarch
|
||||
+e700000020b1 vrlf VRR_VVV0U02 "vector remainder logical word" arch15 zarch
|
||||
+e700000030b1 vrlg VRR_VVV0U02 "vector remainder logical doubleword" arch15 zarch
|
||||
+e700000040b1 vrlq VRR_VVV0U02 "vector remainder logical quadword" arch15 zarch
|
||||
+
|
||||
+# Miscellaneous-Instruction-Extensions Facility 4
|
||||
+
|
||||
+b968 clzg RRE_RR "count leading zeros" arch15 zarch
|
||||
+b969 ctzg RRE_RR "count trailing zeros" arch15 zarch
|
||||
+
|
||||
+e30000000060 lxab RXY_RRRD "load indexed address (shift left 0)" arch15 zarch
|
||||
+e30000000062 lxah RXY_RRRD "load indexed address (shift left 1)" arch15 zarch
|
||||
+e30000000064 lxaf RXY_RRRD "load indexed address (shift left 2)" arch15 zarch
|
||||
+e30000000066 lxag RXY_RRRD "load indexed address (shift left 3)" arch15 zarch
|
||||
+e30000000068 lxaq RXY_RRRD "load indexed address (shift left 4)" arch15 zarch
|
||||
+
|
||||
+e30000000061 llxab RXY_RRRD "load logical indexed address (shift left 0)" arch15 zarch
|
||||
+e30000000063 llxah RXY_RRRD "load logical indexed address (shift left 1)" arch15 zarch
|
||||
+e30000000065 llxaf RXY_RRRD "load logical indexed address (shift left 2)" arch15 zarch
|
||||
+e30000000067 llxag RXY_RRRD "load logical indexed address (shift left 3)" arch15 zarch
|
||||
+e30000000069 llxaq RXY_RRRD "load logical indexed address (shift left 4)" arch15 zarch
|
||||
+
|
||||
+b96c bextg RRF_R0RR2 "bit extract" arch15 zarch
|
||||
+b96d bdepg RRF_R0RR2 "bit deposit" arch15 zarch
|
||||
+
|
||||
+# Message-Security-Assist Extension 12
|
||||
+
|
||||
+b93e kimd RRF_U0RR "compute intermediate message digest" arch15 zarch optparm
|
||||
+b93f klmd RRF_U0RR "compute last message digest" arch15 zarch optparm
|
||||
+
|
||||
+# Vector-Packed-Decimal-Enhancement Facility 3
|
||||
+
|
||||
+e6000000004e vcvbq VRR_VV0U2 "vector convert to binary 128 bit" arch15 zarch
|
||||
+e6000000004a vcvdq VRI_VV0UU "vector convert to decimal 128 bit" arch15 zarch
|
||||
+
|
||||
+e6000000005f vtp VRR_0V0U "vector test decimal" arch15 zarch optparm
|
||||
+e6000000007f vtz VRR_0VVU "vector test zoned" arch15 zarch
|
||||
--
|
||||
2.47.0
|
||||
|
||||
@ -1,88 +0,0 @@
|
||||
From 94c65b893a7aea968b06a3e97eef466abc49fbe5 Mon Sep 17 00:00:00 2001
|
||||
From: Jens Remus <jremus@linux.ibm.com>
|
||||
Date: Mon, 18 Nov 2024 10:42:21 +0100
|
||||
Subject: [PATCH] s390: Add arch15 Concurrent-Functions Facility insns
|
||||
|
||||
opcodes/
|
||||
* s390-opc.txt: Add arch15 Concurrent-Functions Facility
|
||||
instructions.
|
||||
* s390-opc.c (INSTR_SSF_RRDRD2, MASK_SSF_RRDRD2): New SSF
|
||||
instruction format variant.
|
||||
|
||||
gas/testsuite/
|
||||
* gas/s390/zarch-arch15.d: Tests for arch15 Concurrent-Functions
|
||||
Facility instructions.
|
||||
* gas/s390/zarch-arch15.s: Likewise.
|
||||
|
||||
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
|
||||
(cherry picked from commit 76445f36a2f9e41b1744d0327e7ec243cb7fac12)
|
||||
---
|
||||
gas/testsuite/gas/s390/zarch-arch15.d | 4 ++++
|
||||
gas/testsuite/gas/s390/zarch-arch15.s | 4 ++++
|
||||
opcodes/s390-opc.c | 2 ++
|
||||
opcodes/s390-opc.txt | 8 ++++++++
|
||||
4 files changed, 18 insertions(+)
|
||||
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-arch15.d b/gas/testsuite/gas/s390/zarch-arch15.d
|
||||
index 955c9706b35..9cd99b7a698 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-arch15.d
|
||||
+++ b/gas/testsuite/gas/s390/zarch-arch15.d
|
||||
@@ -100,3 +100,7 @@ Disassembly of section .text:
|
||||
.*: e6 0f 00 00 00 5f [ ]*vtp %v15
|
||||
.*: e6 0f 0f ff d0 5f [ ]*vtp %v15,65533
|
||||
.*: e6 0f 1f ff d2 7f [ ]*vtz %v15,%v17,65533
|
||||
+.*: c8 36 10 0a 20 14 [ ]*cal %r3,10\(%r1\),20\(%r2\)
|
||||
+.*: c8 37 10 0a 20 14 [ ]*calg %r3,10\(%r1\),20\(%r2\)
|
||||
+.*: c8 3f 10 0a 20 14 [ ]*calgf %r3,10\(%r1\),20\(%r2\)
|
||||
+.*: eb 13 28 f0 fd 16 [ ]*pfcr %r1,%r3,-10000\(%r2\)
|
||||
diff --git a/gas/testsuite/gas/s390/zarch-arch15.s b/gas/testsuite/gas/s390/zarch-arch15.s
|
||||
index 43be9d46a48..d9b89652fcb 100644
|
||||
--- a/gas/testsuite/gas/s390/zarch-arch15.s
|
||||
+++ b/gas/testsuite/gas/s390/zarch-arch15.s
|
||||
@@ -94,3 +94,7 @@ foo:
|
||||
vtp %v15
|
||||
vtp %v15,65533
|
||||
vtz %v15,%v17,65533
|
||||
+ cal %r3,10(%r1),20(%r2)
|
||||
+ calg %r3,10(%r1),20(%r2)
|
||||
+ calgf %r3,10(%r1),20(%r2)
|
||||
+ pfcr %r1,%r3,-10000(%r2)
|
||||
diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c
|
||||
index 1964feb639d..1e26fda8a31 100644
|
||||
--- a/opcodes/s390-opc.c
|
||||
+++ b/opcodes/s390-opc.c
|
||||
@@ -466,6 +466,7 @@ unused_s390_operands_static_asserts (void)
|
||||
#define INSTR_SS_RRRDRD2 6, { R_8,D_20,B_16,R_12,D_36,B_32 } /* e.g. plo */
|
||||
#define INSTR_SS_RRRDRD3 6, { R_8,R_12,D_20,B_16,D_36,B_32 } /* e.g. lmd */
|
||||
#define INSTR_SSF_RRDRD 6, { D_20,B_16,D_36,B_32,R_8,0 } /* e.g. mvcos */
|
||||
+#define INSTR_SSF_RRDRD2 6, { R_8,D_20,B_16,D_36,B_32,0 } /* e.g. cal */
|
||||
#define INSTR_SSF_RERDRD2 6, { RE_8,D_20,B_16,D_36,B_32,0 } /* e.g. lpd */
|
||||
#define INSTR_S_00 4, { 0,0,0,0,0,0 } /* e.g. hsch */
|
||||
#define INSTR_S_RD 4, { D_20,B_16,0,0,0,0 } /* e.g. stck */
|
||||
@@ -698,6 +699,7 @@ unused_s390_operands_static_asserts (void)
|
||||
#define MASK_SS_RRRDRD2 { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
|
||||
#define MASK_SS_RRRDRD3 { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
|
||||
#define MASK_SSF_RRDRD { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
|
||||
+#define MASK_SSF_RRDRD2 { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
|
||||
#define MASK_SSF_RERDRD2 { 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00 }
|
||||
#define MASK_S_00 { 0xff, 0xff, 0xff, 0xff, 0x00, 0x00 }
|
||||
#define MASK_S_RD { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
|
||||
diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt
|
||||
index c01face4eb6..ab00a8cd408 100644
|
||||
--- a/opcodes/s390-opc.txt
|
||||
+++ b/opcodes/s390-opc.txt
|
||||
@@ -2190,3 +2190,11 @@ e6000000004a vcvdq VRI_VV0UU "vector convert to decimal 128 bit" arch15 zarch
|
||||
|
||||
e6000000005f vtp VRR_0V0U "vector test decimal" arch15 zarch optparm
|
||||
e6000000007f vtz VRR_0VVU "vector test zoned" arch15 zarch
|
||||
+
|
||||
+# Concurrent-Functions Facility
|
||||
+
|
||||
+c806 cal SSF_RRDRD2 "compare and load 32" arch15 zarch
|
||||
+c807 calg SSF_RRDRD2 "compare and load 64" arch15 zarch
|
||||
+c80f calgf SSF_RRDRD2 "compare and load 64<32" arch15 zarch
|
||||
+
|
||||
+eb0000000016 pfcr RSY_RRRD "perform functions with concurrent results" arch15 zarch
|
||||
--
|
||||
2.47.0
|
||||
|
||||
@ -0,0 +1,772 @@
|
||||
diff -rup binutils.orig/libctf/ctf-create.c binutils-2.34.0/libctf/ctf-create.c
|
||||
--- binutils.orig/libctf/ctf-create.c 2020-06-16 12:06:28.466468753 +0100
|
||||
+++ binutils-2.34.0/libctf/ctf-create.c 2020-06-16 12:16:19.744482839 +0100
|
||||
@@ -871,7 +871,8 @@ ctf_add_encoded (ctf_file_t *fp, uint32_
|
||||
|
||||
if ((type = ctf_add_generic (fp, flag, name, kind, &dtd)) == CTF_ERR)
|
||||
return CTF_ERR; /* errno is set for us. */
|
||||
-
|
||||
+ if (dtd == NULL)
|
||||
+ return CTF_ERR;
|
||||
dtd->dtd_data.ctt_info = CTF_TYPE_INFO (kind, flag, 0);
|
||||
dtd->dtd_data.ctt_size = clp2 (P2ROUNDUP (ep->cte_bits, CHAR_BIT)
|
||||
/ CHAR_BIT);
|
||||
@@ -896,6 +897,8 @@ ctf_add_reftype (ctf_file_t *fp, uint32_
|
||||
|
||||
if ((type = ctf_add_generic (fp, flag, NULL, kind, &dtd)) == CTF_ERR)
|
||||
return CTF_ERR; /* errno is set for us. */
|
||||
+ if (dtd == NULL)
|
||||
+ return CTF_ERR;
|
||||
|
||||
dtd->dtd_data.ctt_info = CTF_TYPE_INFO (kind, flag, 0);
|
||||
dtd->dtd_data.ctt_type = (uint32_t) ref;
|
||||
@@ -958,6 +961,8 @@ ctf_add_slice (ctf_file_t *fp, uint32_t
|
||||
|
||||
if ((type = ctf_add_generic (fp, flag, NULL, CTF_K_SLICE, &dtd)) == CTF_ERR)
|
||||
return CTF_ERR; /* errno is set for us. */
|
||||
+ if (dtd == NULL)
|
||||
+ return CTF_ERR;
|
||||
|
||||
dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_SLICE, flag, 0);
|
||||
dtd->dtd_data.ctt_size = clp2 (P2ROUNDUP (ep->cte_bits, CHAR_BIT)
|
||||
@@ -1008,6 +1013,8 @@ ctf_add_array (ctf_file_t *fp, uint32_t
|
||||
|
||||
if ((type = ctf_add_generic (fp, flag, NULL, CTF_K_ARRAY, &dtd)) == CTF_ERR)
|
||||
return CTF_ERR; /* errno is set for us. */
|
||||
+ if (dtd == NULL)
|
||||
+ return CTF_ERR;
|
||||
|
||||
dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_ARRAY, flag, 0);
|
||||
dtd->dtd_data.ctt_size = 0;
|
||||
@@ -1075,6 +1082,8 @@ ctf_add_function (ctf_file_t *fp, uint32
|
||||
free (vdat);
|
||||
return CTF_ERR; /* errno is set for us. */
|
||||
}
|
||||
+ if (dtd == NULL)
|
||||
+ return CTF_ERR;
|
||||
|
||||
dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_FUNCTION, flag, vlen);
|
||||
dtd->dtd_data.ctt_type = (uint32_t) ctc->ctc_return;
|
||||
@@ -1104,6 +1113,8 @@ ctf_add_struct_sized (ctf_file_t *fp, ui
|
||||
else if ((type = ctf_add_generic (fp, flag, name, CTF_K_STRUCT,
|
||||
&dtd)) == CTF_ERR)
|
||||
return CTF_ERR; /* errno is set for us. */
|
||||
+ if (dtd == NULL)
|
||||
+ return CTF_ERR;
|
||||
|
||||
dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_STRUCT, flag, 0);
|
||||
|
||||
@@ -1141,6 +1152,8 @@ ctf_add_union_sized (ctf_file_t *fp, uin
|
||||
else if ((type = ctf_add_generic (fp, flag, name, CTF_K_UNION,
|
||||
&dtd)) == CTF_ERR)
|
||||
return CTF_ERR; /* errno is set for us */
|
||||
+ if (dtd == NULL)
|
||||
+ return CTF_ERR;
|
||||
|
||||
dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_UNION, flag, 0);
|
||||
|
||||
@@ -1177,6 +1190,8 @@ ctf_add_enum (ctf_file_t *fp, uint32_t f
|
||||
else if ((type = ctf_add_generic (fp, flag, name, CTF_K_ENUM,
|
||||
&dtd)) == CTF_ERR)
|
||||
return CTF_ERR; /* errno is set for us. */
|
||||
+ if (dtd == NULL)
|
||||
+ return CTF_ERR;
|
||||
|
||||
dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_ENUM, flag, 0);
|
||||
dtd->dtd_data.ctt_size = fp->ctf_dmodel->ctd_int;
|
||||
diff -rup binutils.orig/libctf/ctf-types.c binutils-2.34.0/libctf/ctf-types.c
|
||||
--- binutils.orig/libctf/ctf-types.c 2020-06-16 12:06:28.466468753 +0100
|
||||
+++ binutils-2.34.0/libctf/ctf-types.c 2020-06-16 12:10:58.033563365 +0100
|
||||
@@ -748,7 +748,7 @@ ctf_type_encoding (ctf_file_t *fp, ctf_i
|
||||
case CTF_K_SLICE:
|
||||
{
|
||||
const ctf_slice_t *slice;
|
||||
- ctf_encoding_t underlying_en;
|
||||
+ ctf_encoding_t underlying_en = {0};
|
||||
slice = &dtd->dtd_u.dtu_slice;
|
||||
|
||||
data = ctf_type_encoding (fp, slice->cts_type, &underlying_en);
|
||||
diff -rup binutils.orig/opcodes/s390-mkopc.c binutils-2.34.0/opcodes/s390-mkopc.c
|
||||
--- binutils.orig/opcodes/s390-mkopc.c 2020-06-16 12:06:28.447468816 +0100
|
||||
+++ binutils-2.34.0/opcodes/s390-mkopc.c 2020-06-16 12:17:10.783311417 +0100
|
||||
@@ -168,7 +168,7 @@ insertExpandedMnemonic (char *opcode, ch
|
||||
int mask_start, i = 0, tag_found = 0, reading_number = 0;
|
||||
int number_p = 0, suffix_p = 0, prefix_p = 0;
|
||||
const struct s390_cond_ext_format *ext_table;
|
||||
- int ext_table_length;
|
||||
+ int ext_table_length = 0;
|
||||
|
||||
if (!(tag = strpbrk (mnemonic, "*$")))
|
||||
{
|
||||
Only in binutils.orig/libctf: .#ctf-create.c
|
||||
diff -rup binutils.orig/libctf/ctf-create.c binutils-2.34.0/libctf/ctf-create.c
|
||||
--- binutils.orig/libctf/ctf-create.c 2020-06-16 14:49:06.080801319 +0100
|
||||
+++ binutils-2.34.0/libctf/ctf-create.c 2020-06-16 14:49:08.046794113 +0100
|
||||
@@ -798,6 +798,7 @@ ctf_add_generic (ctf_file_t *fp, uint32_
|
||||
{
|
||||
ctf_dtdef_t *dtd;
|
||||
ctf_id_t type;
|
||||
+ *rp = NULL;
|
||||
|
||||
if (flag != CTF_ADD_NONROOT && flag != CTF_ADD_ROOT)
|
||||
return (ctf_set_errno (fp, EINVAL));
|
||||
diff -rup binutils.orig/opcodes/fr30-ibld.c binutils-2.34.0/opcodes/fr30-ibld.c
|
||||
--- binutils.orig/opcodes/fr30-ibld.c 2020-06-16 14:49:06.074801341 +0100
|
||||
+++ binutils-2.34.0/opcodes/fr30-ibld.c 2020-06-16 16:43:31.428324833 +0100
|
||||
@@ -810,7 +810,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case FR30_OPERAND_DIR10 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value);
|
||||
value = ((value) << (2));
|
||||
fields->f_dir10 = value;
|
||||
@@ -821,7 +821,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case FR30_OPERAND_DIR9 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value);
|
||||
value = ((value) << (1));
|
||||
fields->f_dir9 = value;
|
||||
@@ -829,7 +829,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case FR30_OPERAND_DISP10 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & value);
|
||||
value = ((value) * (4));
|
||||
fields->f_disp10 = value;
|
||||
@@ -840,7 +840,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case FR30_OPERAND_DISP9 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, pc, & value);
|
||||
value = ((value) * (2));
|
||||
fields->f_disp9 = value;
|
||||
@@ -865,7 +865,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case FR30_OPERAND_LABEL12 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 11, 16, total_length, pc, & value);
|
||||
value = ((((value) * (2))) + (((pc) + (2))));
|
||||
fields->f_rel12 = value;
|
||||
@@ -873,7 +873,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case FR30_OPERAND_LABEL9 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 16, total_length, pc, & value);
|
||||
value = ((((value) * (2))) + (((pc) + (2))));
|
||||
fields->f_rel9 = value;
|
||||
@@ -881,7 +881,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case FR30_OPERAND_M4 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & value);
|
||||
value = ((value) | (-16));
|
||||
fields->f_m4 = value;
|
||||
@@ -911,7 +911,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case FR30_OPERAND_U10 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 16, total_length, pc, & value);
|
||||
value = ((value) << (2));
|
||||
fields->f_u10 = value;
|
||||
@@ -928,7 +928,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case FR30_OPERAND_UDISP6 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & value);
|
||||
value = ((value) << (2));
|
||||
fields->f_udisp6 = value;
|
||||
|
||||
diff -rup binutils.orig/opcodes/fr30-ibld.c binutils-2.34.0/opcodes/fr30-ibld.c
|
||||
--- binutils.orig/opcodes/fr30-ibld.c 2020-06-16 17:10:22.540563440 +0100
|
||||
+++ binutils-2.34.0/opcodes/fr30-ibld.c 2020-06-16 17:10:48.966468906 +0100
|
||||
@@ -903,7 +903,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case FR30_OPERAND_S10 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 16, total_length, pc, & value);
|
||||
value = ((value) * (4));
|
||||
fields->f_s10 = value;
|
||||
Only in binutils-2.34.0/opcodes: fr30-ibld.c~
|
||||
--- binutils.orig/opcodes/m32c-ibld.c 2020-06-16 17:10:22.531563472 +0100
|
||||
+++ binutils-2.34.0/opcodes/m32c-ibld.c 2020-06-16 17:25:48.612258094 +0100
|
||||
@@ -1805,7 +1805,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_BIT32RNPREFIXED :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
|
||||
value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
|
||||
fields->f_dst32_rn_prefixed_QI = value;
|
||||
@@ -1813,7 +1813,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_BIT32RNUNPREFIXED :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
|
||||
value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
|
||||
fields->f_dst32_rn_unprefixed_QI = value;
|
||||
@@ -1824,7 +1824,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_BITBASE16_16_U16 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
|
||||
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
|
||||
fields->f_dsp_16_u16 = value;
|
||||
@@ -1860,7 +1860,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
|
||||
if (length <= 0) break;
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
|
||||
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
|
||||
fields->f_dsp_16_s16 = value;
|
||||
@@ -1887,7 +1887,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
|
||||
if (length <= 0) break;
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
|
||||
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
|
||||
fields->f_dsp_16_u16 = value;
|
||||
@@ -1903,7 +1903,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
|
||||
if (length <= 0) break;
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
|
||||
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
|
||||
fields->f_dsp_16_u16 = value;
|
||||
@@ -1971,7 +1971,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
|
||||
if (length <= 0) break;
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
|
||||
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
|
||||
fields->f_dsp_32_u16 = value;
|
||||
@@ -1996,7 +1996,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DSP_16_S16 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
|
||||
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
|
||||
fields->f_dsp_16_s16 = value;
|
||||
@@ -2007,7 +2007,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DSP_16_U16 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
|
||||
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
|
||||
fields->f_dsp_16_u16 = value;
|
||||
@@ -2016,7 +2016,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
case M32C_OPERAND_DSP_16_U20 :
|
||||
{
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
|
||||
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
|
||||
fields->f_dsp_16_u16 = value;
|
||||
@@ -2032,7 +2032,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
case M32C_OPERAND_DSP_16_U24 :
|
||||
{
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
|
||||
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
|
||||
fields->f_dsp_16_u16 = value;
|
||||
@@ -2078,7 +2078,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
|
||||
if (length <= 0) break;
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
|
||||
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
|
||||
fields->f_dsp_32_u16 = value;
|
||||
@@ -2094,7 +2094,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
|
||||
if (length <= 0) break;
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
|
||||
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
|
||||
fields->f_dsp_32_u16 = value;
|
||||
@@ -2110,7 +2110,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DSP_32_S16 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
|
||||
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
|
||||
fields->f_dsp_32_s16 = value;
|
||||
@@ -2121,7 +2121,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DSP_32_U16 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
|
||||
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
|
||||
fields->f_dsp_32_u16 = value;
|
||||
@@ -2129,7 +2129,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DSP_32_U20 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
|
||||
value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
|
||||
fields->f_dsp_32_u24 = value;
|
||||
@@ -2137,7 +2137,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DSP_32_U24 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
|
||||
value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
|
||||
fields->f_dsp_32_u24 = value;
|
||||
@@ -2148,7 +2148,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DSP_40_S16 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
|
||||
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
|
||||
fields->f_dsp_40_s16 = value;
|
||||
@@ -2159,7 +2159,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DSP_40_U16 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value);
|
||||
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
|
||||
fields->f_dsp_40_u16 = value;
|
||||
@@ -2167,7 +2167,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DSP_40_U20 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 20, 32, total_length, pc, & value);
|
||||
value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
|
||||
fields->f_dsp_40_u20 = value;
|
||||
@@ -2175,7 +2175,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DSP_40_U24 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
|
||||
value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
|
||||
fields->f_dsp_40_u24 = value;
|
||||
@@ -2186,7 +2186,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DSP_48_S16 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
|
||||
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
|
||||
fields->f_dsp_48_s16 = value;
|
||||
@@ -2197,7 +2197,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DSP_48_U16 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
|
||||
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
|
||||
fields->f_dsp_48_u16 = value;
|
||||
@@ -2206,7 +2206,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
case M32C_OPERAND_DSP_48_U20 :
|
||||
{
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
|
||||
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
|
||||
fields->f_dsp_48_u16 = value;
|
||||
@@ -2222,7 +2222,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
case M32C_OPERAND_DSP_48_U24 :
|
||||
{
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
|
||||
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
|
||||
fields->f_dsp_48_u16 = value;
|
||||
@@ -2240,7 +2240,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DSP_8_S24 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, pc, & value);
|
||||
value = ((((((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) & (255))) << (16))))) ^ (8388608))) - (8388608));
|
||||
fields->f_dsp_8_s24 = value;
|
||||
@@ -2251,7 +2251,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DSP_8_U16 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value);
|
||||
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
|
||||
fields->f_dsp_8_u16 = value;
|
||||
@@ -2259,7 +2259,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DSP_8_U24 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value);
|
||||
value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
|
||||
fields->f_dsp_8_u24 = value;
|
||||
@@ -2343,7 +2343,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DST32RNPREFIXEDHI :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
|
||||
value = ((((value) + (2))) % (4));
|
||||
fields->f_dst32_rn_prefixed_HI = value;
|
||||
@@ -2351,7 +2351,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DST32RNPREFIXEDQI :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
|
||||
value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
|
||||
fields->f_dst32_rn_prefixed_QI = value;
|
||||
@@ -2359,7 +2359,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DST32RNPREFIXEDSI :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
|
||||
value = ((value) - (2));
|
||||
fields->f_dst32_rn_prefixed_SI = value;
|
||||
@@ -2367,7 +2367,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DST32RNUNPREFIXEDHI :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
|
||||
value = ((((value) + (2))) % (4));
|
||||
fields->f_dst32_rn_unprefixed_HI = value;
|
||||
@@ -2375,7 +2375,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DST32RNUNPREFIXEDQI :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
|
||||
value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
|
||||
fields->f_dst32_rn_unprefixed_QI = value;
|
||||
@@ -2383,7 +2383,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_DST32RNUNPREFIXEDSI :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
|
||||
value = ((value) - (2));
|
||||
fields->f_dst32_rn_unprefixed_SI = value;
|
||||
@@ -2402,7 +2402,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_IMM_16_HI :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
|
||||
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
|
||||
fields->f_dsp_16_s16 = value;
|
||||
@@ -2414,14 +2414,14 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
case M32C_OPERAND_IMM_16_SI :
|
||||
{
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
|
||||
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
|
||||
fields->f_dsp_16_u16 = value;
|
||||
}
|
||||
if (length <= 0) break;
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
|
||||
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
|
||||
fields->f_dsp_32_u16 = value;
|
||||
@@ -2454,7 +2454,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
|
||||
if (length <= 0) break;
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
|
||||
value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
|
||||
fields->f_dsp_32_u24 = value;
|
||||
@@ -2467,7 +2467,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_IMM_32_HI :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
|
||||
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
|
||||
fields->f_dsp_32_s16 = value;
|
||||
@@ -2486,7 +2486,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_IMM_40_HI :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
|
||||
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
|
||||
fields->f_dsp_40_s16 = value;
|
||||
@@ -2498,7 +2498,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
case M32C_OPERAND_IMM_40_SI :
|
||||
{
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
|
||||
value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
|
||||
fields->f_dsp_40_u24 = value;
|
||||
@@ -2513,7 +2513,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_IMM_48_HI :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
|
||||
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
|
||||
fields->f_dsp_48_s16 = value;
|
||||
@@ -2525,14 +2525,14 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
case M32C_OPERAND_IMM_48_SI :
|
||||
{
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
|
||||
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
|
||||
fields->f_dsp_48_u16 = value;
|
||||
}
|
||||
if (length <= 0) break;
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value);
|
||||
value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) & (255))) << (8))));
|
||||
fields->f_dsp_64_u16 = value;
|
||||
@@ -2567,7 +2567,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_IMM_8_HI :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value);
|
||||
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
|
||||
fields->f_dsp_8_s16 = value;
|
||||
@@ -2593,7 +2593,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_IMM1_S :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value);
|
||||
value = ((value) + (1));
|
||||
fields->f_imm1_S = value;
|
||||
@@ -2612,7 +2612,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_LAB_16_8 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value);
|
||||
value = ((value) + (((pc) + (2))));
|
||||
fields->f_lab_16_8 = value;
|
||||
@@ -2620,7 +2620,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_LAB_24_8 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value);
|
||||
value = ((value) + (((pc) + (2))));
|
||||
fields->f_lab_24_8 = value;
|
||||
@@ -2628,7 +2628,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_LAB_32_8 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value);
|
||||
value = ((value) + (((pc) + (2))));
|
||||
fields->f_lab_32_8 = value;
|
||||
@@ -2636,7 +2636,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_LAB_40_8 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value);
|
||||
value = ((value) + (((pc) + (2))));
|
||||
fields->f_lab_40_8 = value;
|
||||
@@ -2644,7 +2644,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_LAB_5_3 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value);
|
||||
value = ((value) + (((pc) + (2))));
|
||||
fields->f_lab_5_3 = value;
|
||||
@@ -2652,7 +2652,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_LAB_8_16 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value);
|
||||
value = ((((((((((USI) (((value) & (65280))) >> (8))) | (((((value) & (255))) << (8))))) ^ (32768))) - (32768))) + (((pc) + (1))));
|
||||
fields->f_lab_8_16 = value;
|
||||
@@ -2660,7 +2660,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_LAB_8_24 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value);
|
||||
value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
|
||||
fields->f_lab_8_24 = value;
|
||||
@@ -2668,7 +2668,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_LAB_8_8 :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
|
||||
value = ((value) + (((pc) + (1))));
|
||||
fields->f_lab_8_8 = value;
|
||||
@@ -2757,7 +2757,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_SRC32RNPREFIXEDHI :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
|
||||
value = ((((value) + (2))) % (4));
|
||||
fields->f_src32_rn_prefixed_HI = value;
|
||||
@@ -2765,7 +2765,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_SRC32RNPREFIXEDQI :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
|
||||
value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
|
||||
fields->f_src32_rn_prefixed_QI = value;
|
||||
@@ -2773,7 +2773,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_SRC32RNPREFIXEDSI :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
|
||||
value = ((value) - (2));
|
||||
fields->f_src32_rn_prefixed_SI = value;
|
||||
@@ -2781,7 +2781,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
|
||||
value = ((((value) + (2))) % (4));
|
||||
fields->f_src32_rn_unprefixed_HI = value;
|
||||
@@ -2789,7 +2789,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
|
||||
value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
|
||||
fields->f_src32_rn_unprefixed_QI = value;
|
||||
@@ -2797,7 +2797,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC
|
||||
break;
|
||||
case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
|
||||
{
|
||||
- long value;
|
||||
+ long value = 0;
|
||||
length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
|
||||
value = ((value) - (2));
|
||||
fields->f_src32_rn_unprefixed_SI = value;
|
||||
--- binutils.orig/binutils/srconv.c 2020-06-16 17:10:22.251564474 +0100
|
||||
+++ binutils-2.34.0/binutils/srconv.c 2020-06-16 20:07:51.670025912 +0100
|
||||
@@ -492,6 +492,8 @@ wr_rl (struct coff_ofile *ptr ATTRIBUTE_
|
||||
rl.addr = r->offset;
|
||||
rl.bitloc = 0;
|
||||
rl.flen = 32; /* SH Specific. */
|
||||
+ rl.dunno = 0;
|
||||
+ rl.symn = 0;
|
||||
|
||||
/* What sort of reloc ? Look in the section to find out. */
|
||||
ref = r->symbol;
|
||||
--- binutils.orig/libctf/ctf-create.c 2020-07-24 15:33:26.100996335 +0100
|
||||
+++ binutils-2.35/libctf/ctf-create.c 2020-07-24 15:33:29.042977475 +0100
|
||||
@@ -1257,6 +1257,8 @@ ctf_add_forward (ctf_file_t *fp, uint32_
|
||||
|
||||
if ((type = ctf_add_generic (fp, flag, name, kind, &dtd)) == CTF_ERR)
|
||||
return CTF_ERR; /* errno is set for us. */
|
||||
+ if (dtd == NULL)
|
||||
+ return CTF_ERR;
|
||||
|
||||
dtd->dtd_data.ctt_info = CTF_TYPE_INFO (CTF_K_FORWARD, flag, 0);
|
||||
dtd->dtd_data.ctt_type = kind;
|
||||
@ -0,0 +1,51 @@
|
||||
diff -rup binutils-2.35.2/gas/config/tc-s390.c fred/gas/config/tc-s390.c
|
||||
--- binutils-2.35.2/gas/config/tc-s390.c 2022-04-11 08:54:46.529179603 +0100
|
||||
+++ fred/gas/config/tc-s390.c 2022-04-11 08:51:08.030832065 +0100
|
||||
@@ -293,7 +293,7 @@ s390_parse_cpu (const char * arg
|
||||
S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX },
|
||||
{ STRING_COMMA_LEN ("z15"), STRING_COMMA_LEN ("arch13"),
|
||||
S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX },
|
||||
- { STRING_COMMA_LEN (""), STRING_COMMA_LEN ("arch14"),
|
||||
+ { STRING_COMMA_LEN ("z16"), STRING_COMMA_LEN ("arch14"),
|
||||
S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX }
|
||||
};
|
||||
static struct
|
||||
diff -rup binutils-2.35.2/gas/doc/as.texi fred/gas/doc/as.texi
|
||||
--- binutils-2.35.2/gas/doc/as.texi 2022-04-11 08:54:46.099182880 +0100
|
||||
+++ fred/gas/doc/as.texi 2022-04-11 08:52:33.088196625 +0100
|
||||
@@ -1872,8 +1872,8 @@ Specify which s390 processor variant is
|
||||
@samp{arch3}), @samp{g6}, @samp{z900} (or @samp{arch5}), @samp{z990} (or
|
||||
@samp{arch6}), @samp{z9-109}, @samp{z9-ec} (or @samp{arch7}), @samp{z10} (or
|
||||
@samp{arch8}), @samp{z196} (or @samp{arch9}), @samp{zEC12} (or @samp{arch10}),
|
||||
-@samp{z13} (or @samp{arch11}), @samp{z14} (or @samp{arch12}), or @samp{z15}
|
||||
-(or @samp{arch13}).
|
||||
+@samp{z13} (or @samp{arch11}), @samp{z14} (or @samp{arch12}), @samp{z15}
|
||||
+(or @samp{arch13}), or @samp{z16} (or @samp{arch14}).
|
||||
@item -mregnames
|
||||
@itemx -mno-regnames
|
||||
Allow or disallow symbolic names for registers.
|
||||
diff -rup binutils-2.35.2/gas/doc/c-s390.texi fred/gas/doc/c-s390.texi
|
||||
--- binutils-2.35.2/gas/doc/c-s390.texi 2022-04-11 08:54:46.551179435 +0100
|
||||
+++ fred/gas/doc/c-s390.texi 2022-04-11 08:51:50.623520271 +0100
|
||||
@@ -18,7 +18,7 @@ and eleven chip levels. The architecture
|
||||
Architecture (ESA) and the newer z/Architecture mode. The chip levels
|
||||
are g5 (or arch3), g6, z900 (or arch5), z990 (or arch6), z9-109, z9-ec
|
||||
(or arch7), z10 (or arch8), z196 (or arch9), zEC12 (or arch10), z13
|
||||
-(or arch11), z14 (or arch12), z15 (or arch13), or arch14.
|
||||
+(or arch11), z14 (or arch12), z15 (or arch13), or z16 (or arch14).
|
||||
|
||||
@menu
|
||||
* s390 Options:: Command-line Options.
|
||||
diff -rup binutils-2.35.2/opcodes/s390-mkopc.c fred/opcodes/s390-mkopc.c
|
||||
--- binutils-2.35.2/opcodes/s390-mkopc.c 2022-04-11 08:54:46.530179595 +0100
|
||||
+++ fred/opcodes/s390-mkopc.c 2022-04-11 08:53:04.701955680 +0100
|
||||
@@ -380,7 +380,8 @@ main (void)
|
||||
else if (strcmp (cpu_string, "z15") == 0
|
||||
|| strcmp (cpu_string, "arch13") == 0)
|
||||
min_cpu = S390_OPCODE_ARCH13;
|
||||
- else if (strcmp (cpu_string, "arch14") == 0)
|
||||
+ else if (strcmp (cpu_string, "z16") == 0
|
||||
+ || strcmp (cpu_string, "arch14") == 0)
|
||||
min_cpu = S390_OPCODE_ARCH14;
|
||||
else {
|
||||
fprintf (stderr, "Couldn't parse cpu string %s\n", cpu_string);
|
||||
@ -0,0 +1,143 @@
|
||||
diff -rup binutils.orig/bfd/elf64-s390.c binutils-2.35.2/bfd/elf64-s390.c
|
||||
--- binutils.orig/bfd/elf64-s390.c 2022-05-03 12:03:39.004203905 +0100
|
||||
+++ binutils-2.35.2/bfd/elf64-s390.c 2022-05-03 12:06:19.884715801 +0100
|
||||
@@ -773,7 +773,7 @@ elf_s390_tls_transition (struct bfd_link
|
||||
int r_type,
|
||||
int is_local)
|
||||
{
|
||||
- if (bfd_link_pic (info))
|
||||
+ if (bfd_link_dll (info))
|
||||
return r_type;
|
||||
|
||||
switch (r_type)
|
||||
@@ -1025,7 +1025,7 @@ elf_s390_check_relocs (bfd *abfd,
|
||||
case R_390_TLS_GOTIE20:
|
||||
case R_390_TLS_GOTIE64:
|
||||
case R_390_TLS_IEENT:
|
||||
- if (bfd_link_pic (info))
|
||||
+ if (bfd_link_dll (info))
|
||||
info->flags |= DF_STATIC_TLS;
|
||||
/* Fall through */
|
||||
|
||||
@@ -1106,7 +1106,7 @@ elf_s390_check_relocs (bfd *abfd,
|
||||
if (r_type == R_390_TLS_LE64 && bfd_link_pie (info))
|
||||
break;
|
||||
|
||||
- if (!bfd_link_pic (info))
|
||||
+ if (!bfd_link_dll (info))
|
||||
break;
|
||||
info->flags |= DF_STATIC_TLS;
|
||||
/* Fall through */
|
||||
@@ -1570,7 +1570,7 @@ allocate_dynrelocs (struct elf_link_hash
|
||||
to R_390_TLS_LE64 requiring no TLS entry. For GOTIE12 and IEENT
|
||||
we can save the dynamic TLS relocation. */
|
||||
if (h->got.refcount > 0
|
||||
- && !bfd_link_pic (info)
|
||||
+ && !bfd_link_dll (info)
|
||||
&& h->dynindx == -1
|
||||
&& elf_s390_hash_entry(h)->tls_type >= GOT_TLS_IE)
|
||||
{
|
||||
@@ -1875,7 +1875,20 @@ elf_s390_size_dynamic_sections (bfd *out
|
||||
else if (CONST_STRNEQ (bfd_section_name (s), ".rela"))
|
||||
{
|
||||
if (s->size != 0 && s != htab->elf.srelplt)
|
||||
- relocs = TRUE;
|
||||
+ {
|
||||
+ relocs = TRUE;
|
||||
+ if (s == htab->elf.irelplt)
|
||||
+ {
|
||||
+ /* In static-pie case, there are IRELATIVE-relocs in
|
||||
+ .rela.iplt (htab->irelplt), which will later be grouped
|
||||
+ to .rela.plt. On s390, the IRELATIVE relocations are
|
||||
+ always located in .rela.iplt - even for non-static case.
|
||||
+ Ensure that DT_JMPREL, DT_PLTRELA, DT_PLTRELASZ is added
|
||||
+ to the dynamic section even if htab->srelplt->size == 0.
|
||||
+ See _bfd_elf_add_dynamic_tags in bfd/elflink.c. */
|
||||
+ htab->elf.dt_jmprel_required = TRUE;
|
||||
+ }
|
||||
+ }
|
||||
|
||||
/* We use the reloc_count field as a counter if we need
|
||||
to copy relocs into the output file. */
|
||||
@@ -2661,7 +2674,7 @@ elf_s390_relocate_section (bfd *output_b
|
||||
|
||||
/* Relocations for tls literal pool entries. */
|
||||
case R_390_TLS_IE64:
|
||||
- if (bfd_link_pic (info))
|
||||
+ if (bfd_link_dll (info))
|
||||
{
|
||||
Elf_Internal_Rela outrel;
|
||||
asection *sreloc;
|
||||
@@ -2689,7 +2702,7 @@ elf_s390_relocate_section (bfd *output_b
|
||||
else if (h != NULL)
|
||||
{
|
||||
tls_type = elf_s390_hash_entry(h)->tls_type;
|
||||
- if (!bfd_link_pic (info) && h->dynindx == -1 && tls_type >= GOT_TLS_IE)
|
||||
+ if (!bfd_link_dll (info) && h->dynindx == -1 && tls_type >= GOT_TLS_IE)
|
||||
r_type = R_390_TLS_LE64;
|
||||
}
|
||||
if (r_type == R_390_TLS_GD64 && tls_type >= GOT_TLS_IE)
|
||||
@@ -2800,14 +2813,14 @@ elf_s390_relocate_section (bfd *output_b
|
||||
if (local_got_offsets == NULL)
|
||||
abort();
|
||||
off = local_got_offsets[r_symndx];
|
||||
- if (bfd_link_pic (info))
|
||||
+ if (bfd_link_dll (info))
|
||||
goto emit_tls_relocs;
|
||||
}
|
||||
else
|
||||
{
|
||||
off = h->got.offset;
|
||||
tls_type = elf_s390_hash_entry(h)->tls_type;
|
||||
- if (bfd_link_pic (info) || h->dynindx != -1 || tls_type < GOT_TLS_IE)
|
||||
+ if (bfd_link_dll (info) || h->dynindx != -1 || tls_type < GOT_TLS_IE)
|
||||
goto emit_tls_relocs;
|
||||
}
|
||||
|
||||
@@ -2824,7 +2837,7 @@ elf_s390_relocate_section (bfd *output_b
|
||||
break;
|
||||
|
||||
case R_390_TLS_LDM64:
|
||||
- if (! bfd_link_pic (info))
|
||||
+ if (! bfd_link_dll (info))
|
||||
/* The literal pool entry this relocation refers to gets ignored
|
||||
by the optimized code of the local exec model. Do nothing
|
||||
and the value will turn out zero. */
|
||||
@@ -2899,7 +2912,7 @@ elf_s390_relocate_section (bfd *output_b
|
||||
continue;
|
||||
|
||||
case R_390_TLS_LDO64:
|
||||
- if (bfd_link_pic (info) || (input_section->flags & SEC_DEBUGGING))
|
||||
+ if (bfd_link_dll (info) || (input_section->flags & SEC_DEBUGGING))
|
||||
relocation -= dtpoff_base (info);
|
||||
else
|
||||
/* When converting LDO to LE, we must negate. */
|
||||
@@ -2921,7 +2934,7 @@ elf_s390_relocate_section (bfd *output_b
|
||||
|
||||
if (r_type == R_390_TLS_LOAD)
|
||||
{
|
||||
- if (!bfd_link_pic (info) && (h == NULL || h->dynindx == -1))
|
||||
+ if (!bfd_link_dll (info) && (h == NULL || h->dynindx == -1))
|
||||
{
|
||||
/* IE->LE transition. Four valid cases:
|
||||
lg %rx,(0,%ry) -> sllg %rx,%ry,0
|
||||
@@ -2971,7 +2984,7 @@ elf_s390_relocate_section (bfd *output_b
|
||||
invalid_tls_insn (input_bfd, input_section, rel);
|
||||
return FALSE;
|
||||
}
|
||||
- if (!bfd_link_pic (info) && (h == NULL || h->dynindx == -1))
|
||||
+ if (!bfd_link_dll (info) && (h == NULL || h->dynindx == -1))
|
||||
{
|
||||
/* GD->LE transition.
|
||||
brasl %r14,__tls_get_addr@plt -> brcl 0,. */
|
||||
@@ -2990,7 +3003,7 @@ elf_s390_relocate_section (bfd *output_b
|
||||
}
|
||||
else if (r_type == R_390_TLS_LDCALL)
|
||||
{
|
||||
- if (!bfd_link_pic (info))
|
||||
+ if (!bfd_link_dll (info))
|
||||
{
|
||||
unsigned int insn0, insn1;
|
||||
|
||||
Only in binutils-2.35.2/bfd: elf64-s390.c.orig
|
||||
Only in binutils-2.35.2/bfd: elf64-s390.c.rej
|
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,19 @@
|
||||
--- binutils.orig/binutils/objcopy.c 2020-10-06 14:53:19.264943750 +0100
|
||||
+++ binutils-2.35.1/binutils/objcopy.c 2020-10-06 14:53:47.002761889 +0100
|
||||
@@ -3313,14 +3313,12 @@ copy_object (bfd *ibfd, bfd *obfd, const
|
||||
/* It is likely that output sections are in the same order
|
||||
as the input sections, but do not assume that this is
|
||||
the case. */
|
||||
- if (strcmp (bfd_section_name (merged->sec),
|
||||
- bfd_section_name (osec)) != 0)
|
||||
+ if (merged->sec->output_section != osec)
|
||||
{
|
||||
for (merged = merged_note_sections;
|
||||
merged != NULL;
|
||||
merged = merged->next)
|
||||
- if (strcmp (bfd_section_name (merged->sec),
|
||||
- bfd_section_name (osec)) == 0)
|
||||
+ if (merged->sec->output_section == osec)
|
||||
break;
|
||||
|
||||
if (merged == NULL)
|
||||
@ -1,13 +0,0 @@
|
||||
--- binutils.orig/ld/testsuite/ld-elf/linux-x86.exp 2024-01-24 11:52:35.288014542 +0000
|
||||
+++ binutils-2.41/ld/testsuite/ld-elf/linux-x86.exp 2024-01-24 17:31:39.356167357 +0000
|
||||
@@ -225,6 +225,10 @@ if { [check_ifunc_attribute_available] }
|
||||
# Old gcc silently ignores __attribute__ ((aligned())) with too big alignment.
|
||||
proc compiler_honours_aligned { } {
|
||||
global CC_FOR_TARGET READELF srcdir subdir
|
||||
+
|
||||
+ # Temporary fix for CentOS-10 kernel issue. (RHEL-22466)
|
||||
+ return 0
|
||||
+
|
||||
ld_compile $CC_FOR_TARGET $srcdir/$subdir/p_align-1.c tmpdir/p_align-1.o
|
||||
set output [run_host_cmd "$READELF" "-SW tmpdir/p_align-1.o"]
|
||||
if { [regexp { [.]data *PROGBITS .* 8388608[\n]} $output] } {
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,15 @@
|
||||
--- binutils.orig/bfd/elflink.c 2022-06-13 14:22:15.071831986 +0100
|
||||
+++ binutils-2.35.2/bfd/elflink.c 2022-06-13 14:26:37.386163819 +0100
|
||||
@@ -5226,10 +5226,12 @@ elf_link_add_object_symbols (bfd *abfd,
|
||||
if (!add_needed
|
||||
&& matched
|
||||
&& definition
|
||||
+ && h->root.type != bfd_link_hash_indirect
|
||||
&& ((dynsym
|
||||
&& h->ref_regular_nonweak)
|
||||
|| (old_bfd != NULL
|
||||
&& (old_bfd->flags & BFD_PLUGIN) != 0
|
||||
+ && !info->lto_all_symbols_read
|
||||
&& bind != STB_WEAK)
|
||||
|| (h->ref_dynamic_nonweak
|
||||
&& (elf_dyn_lib_class (abfd) & DYN_AS_NEEDED) != 0
|
||||
@ -0,0 +1,10 @@
|
||||
--- binutils.orig/binutils/dwarf.c 2021-03-05 09:25:43.850258361 +0000
|
||||
+++ binutils-2.35.1/binutils/dwarf.c 2021-03-05 09:26:35.861895776 +0000
|
||||
@@ -2115,6 +2115,7 @@ get_type_abbrev_from_form (unsigned long
|
||||
switch (form)
|
||||
{
|
||||
case DW_FORM_GNU_ref_alt:
|
||||
+ case DW_FORM_ref_sig8:
|
||||
/* FIXME: We are unable to handle this form at the moment. */
|
||||
return NULL;
|
||||
|
||||
@ -0,0 +1,38 @@
|
||||
diff -up binutils-2.25.orig/bfd/configure.ac binutils-2.25/bfd/configure.ac
|
||||
--- binutils-2.25.orig/bfd/configure.ac 2014-12-24 10:34:45.590491143 +0000
|
||||
+++ binutils-2.25/bfd/configure.ac 2014-12-24 10:36:12.997981992 +0000
|
||||
@@ -183,11 +183,13 @@ if test "x${ac_cv_sizeof_long}" = "x8";
|
||||
BFD_HOST_64BIT_LONG=1
|
||||
test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long"
|
||||
test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long"
|
||||
-elif test "x${ac_cv_sizeof_long_long}" = "x8"; then
|
||||
+fi
|
||||
+if test "x${ac_cv_sizeof_long_long}" = "x8"; then
|
||||
BFD_HOST_64BIT_LONG_LONG=1
|
||||
test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long long"
|
||||
test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long long"
|
||||
- if test "x${ac_cv_sizeof_void_p}" = "x8"; then
|
||||
+ if test "x${ac_cv_sizeof_void_p}" = "x8" \
|
||||
+ -a "x${ac_cv_sizeof_long}" != "x8"; then
|
||||
BFD_HOSTPTR_T="unsigned long long"
|
||||
fi
|
||||
fi
|
||||
diff -up ../binutils-2.20.51.0.7.original/bfd/configure ./bfd/configure
|
||||
--- a/bfd/configure 2010-04-08 15:23:58.000000000 +0100
|
||||
+++ b/bfd/configure 2010-04-08 15:24:06.000000000 +0100
|
||||
@@ -12819,11 +12819,13 @@
|
||||
BFD_HOST_64BIT_LONG=1
|
||||
test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long"
|
||||
test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long"
|
||||
-elif test "x${ac_cv_sizeof_long_long}" = "x8"; then
|
||||
+fi
|
||||
+if test "x${ac_cv_sizeof_long_long}" = "x8"; then
|
||||
BFD_HOST_64BIT_LONG_LONG=1
|
||||
test -n "${HOST_64BIT_TYPE}" || HOST_64BIT_TYPE="long long"
|
||||
test -n "${HOST_U_64BIT_TYPE}" || HOST_U_64BIT_TYPE="unsigned long long"
|
||||
- if test "x${ac_cv_sizeof_void_p}" = "x8"; then
|
||||
+ if test "x${ac_cv_sizeof_void_p}" = "x8" \
|
||||
+ -a "x${ac_cv_sizeof_long}" != "x8"; then
|
||||
BFD_HOSTPTR_T="unsigned long long"
|
||||
fi
|
||||
fi
|
||||
@ -0,0 +1,12 @@
|
||||
--- binutils.orig/bfd/elflink.c 2024-01-25 11:04:09.991925976 +0000
|
||||
+++ binutils-2.35.2/bfd/elflink.c 2024-01-25 11:04:18.164921403 +0000
|
||||
@@ -4913,7 +4913,8 @@ elf_link_add_object_symbols (bfd *abfd,
|
||||
|| h->root.type == bfd_link_hash_warning)
|
||||
h = (struct elf_link_hash_entry *) h->root.u.i.link;
|
||||
|
||||
- if (elf_tdata (abfd)->verdef != NULL
|
||||
+ if (h->versioned != unversioned
|
||||
+ && elf_tdata (abfd)->verdef != NULL
|
||||
&& vernum > 1
|
||||
&& definition)
|
||||
h->verinfo.verdef = &elf_tdata (abfd)->verdef[vernum - 1];
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in new issue