rpms
/
binutils
20
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

import binutils-2.41-48.el10

Browse Source
cs10 imports/cs10/binutils-2.41-48.el10
MSVSphere Packaging Team 4 months ago
commit 5ece9a6563
Signed by: sys_gitsync
GPG Key ID: B2B0B9F29E528FE8
47 changed files with 203697 additions and 0 deletions
Show Stats Download Patch File Download Diff File

1
.binutils.metadata
Unescape View File

@ -0,0 +1 @@
0e008260a958bbd10182ee3384672ae0a310eece SOURCES/binutils-2.41.tar.xz

1
.gitignore vendored
Unescape View File

@ -0,0 +1 @@
SOURCES/binutils-2.41.tar.xz

22
SOURCES/bin.ppc64.gcc.patch
Unescape View File

@ -0,0 +1,22 @@
--- binutils.orig/ld/ldlang.c 2024-07-30 16:10:24.931862075 +0100
+++ binutils-2.41/ld/ldlang.c 2024-07-30 19:11:58.741929934 +0100
@@ -7940,6 +7940,19 @@ lang_list_remove_tail (lang_statement_li
{
union lang_statement_union **savetail;
/* Check that ORIGLIST really is an earlier state of DESTLIST. */
+
+ if (getenv ("LD_DEBUG_NEVER") != NULL)
+ {
+ /* FIXME: RHEL-49348: For some reason building this function for the
+ PowerPC architecture on RHEL-10 is resulting in a linker that
+ triggers the ASSERT below - because the origlist pointer is
+ corrupt. These fprintf statements, even if they will never be
+ used, are enough to cause the compiler to build the function
+ correctly, thus avoiding the problem. */
+ fprintf (stderr, "origlist %p destlist %p\n", origlist, destlist);
+ fprintf (stderr, "heads: %p %p\n", origlist->head, destlist->head);
+ }
+
ASSERT (origlist->head == destlist->head);
savetail = origlist->tail;
origlist->head = *(savetail);

38
SOURCES/binutils-2.19.50.0.1-output-format.sed
Unescape View File

@ -0,0 +1,38 @@
# Generate OUTPUT_FORMAT line for .so files from the system linker output.
# Imported from glibc/Makerules.
/ld.*[ ]-E[BL]/b f
/collect.*[ ]-E[BL]/b f
/OUTPUT_FORMAT[^)]*$/{N
s/\n[ ]*/ /
}
t o
: o
s/^.*OUTPUT_FORMAT(\([^,]*\), \1, \1).*$/OUTPUT_FORMAT(\1)/
t q
s/^.*OUTPUT_FORMAT(\([^,]*\), \([^,]*\), \([^,]*\)).*$/\1,\2,\3/
t s
s/^.*OUTPUT_FORMAT(\([^,)]*\).*$)/OUTPUT_FORMAT(\1)/
t q
d
: s
s/"//g
G
s/\n//
s/^\([^,]*\),\([^,]*\),\([^,]*\),B/OUTPUT_FORMAT(\2)/p
s/^\([^,]*\),\([^,]*\),\([^,]*\),L/OUTPUT_FORMAT(\3)/p
s/^\([^,]*\),\([^,]*\),\([^,]*\)/OUTPUT_FORMAT(\1)/p
/,/s|^|*** BUG in libc/scripts/output-format.sed *** |p
q
: q
s/"//g
p
q
: f
s/^.*[ ]-E\([BL]\)[ ].*$/,\1/
t h
s/^.*[ ]-E\([BL]\)$/,\1/
t h
d
: h
h

11
SOURCES/binutils-2.27-aarch64-ifunc.patch
Unescape View File

@ -0,0 +1,11 @@
diff -rup binutils.orig/bfd/elfnn-aarch64.c binutils-2.27/bfd/elfnn-aarch64.c
--- binutils.orig/bfd/elfnn-aarch64.c 2017-02-21 10:45:19.311956006 +0000
+++ binutils-2.27/bfd/elfnn-aarch64.c 2017-02-21 11:55:07.517922655 +0000
@@ -4947,6 +4947,7 @@ elfNN_aarch64_final_link_relocate (reloc
it here if it is defined in a non-shared object. */
if (h != NULL
&& h->type == STT_GNU_IFUNC
+ && (input_section->flags & SEC_ALLOC)
&& h->def_regular)
{
asection *plt;

38
SOURCES/binutils-BPF-reloc-4.patch
Unescape View File

@ -0,0 +1,38 @@
diff -rup binutils.orig/bfd/bpf-reloc.def binutils-2.41/bfd/bpf-reloc.def
--- binutils.orig/bfd/bpf-reloc.def 2023-10-30 10:41:59.114273359 +0000
+++ binutils-2.41/bfd/bpf-reloc.def 2023-10-30 11:09:41.316109162 +0000
@@ -72,3 +72,20 @@
0xffffffff, /* src_mask */
0xffffffff, /* dst_mask */
true) /* pcrel_offset */
+
+ /* R_BPF_64_NODYLD32 is not used by GNU tools - but it is generated by LLVM.
+ We provide an entry here so that tools like strip can safely handle BPF
+ binaries generated by other tools. */
+ BPF_HOWTO (R_BPF_64_NODYLD32, /* type */
+ 0, /* rightshift */
+ 0, /* size */
+ 0, /* bitsize */
+ false, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont, /* complain_on_overflow */
+ bpf_elf_generic_reloc, /* special_function */
+ "R_BPF_64_NODYLD32", /* name */
+ false, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ false) /* pcrel_offset */
diff -rup binutils.orig/include/elf/bpf.h binutils-2.41/include/elf/bpf.h
--- binutils.orig/include/elf/bpf.h 2023-10-30 10:41:59.332273599 +0000
+++ binutils-2.41/include/elf/bpf.h 2023-10-30 10:59:44.475368448 +0000
@@ -30,8 +30,8 @@ START_RELOC_NUMBERS (elf_bpf_reloc_type)
RELOC_NUMBER (R_BPF_64_64, 1)
RELOC_NUMBER (R_BPF_64_ABS64, 2)
RELOC_NUMBER (R_BPF_64_ABS32, 3)
-/* R_BPF_64_NODYLD32 is not used by GNU tools.
- * It is kept in this file to remind that the value is already taken. */
+/* R_BPF_64_NODYLD32 is not used by GNU tools - but it is generated by LLVM.
+ It is kept in this file to remind that the value is already taken. */
RELOC_NUMBER (R_BPF_64_NODYLD32, 4)
RELOC_NUMBER (R_BPF_64_32, 10)
END_RELOC_NUMBERS (R_BPF_max)

871
SOURCES/binutils-Intel-APX-part-1-fixes.patch
Unescape View File

@ -0,0 +1,871 @@
diff -rupN binutils.orig/opcodes/i386-dis.c binutils-2.41/opcodes/i386-dis.c
--- binutils.orig/opcodes/i386-dis.c 2024-02-12 15:55:21.578572835 +0000
+++ binutils-2.41/opcodes/i386-dis.c 2024-02-12 15:56:38.828623964 +0000
@@ -8824,6 +8824,8 @@ get_valid_dis386 (const struct dis386 *d
break;
case USE_3BYTE_TABLE:
+ if (ins->last_rex2_prefix >= 0)
+ return &err_opcode;
if (!fetch_code (ins->info, ins->codep + 2))
return &err_opcode;
vindex = *ins->codep++;
@@ -9540,8 +9542,6 @@ print_insn (bfd_vma pc, disassemble_info
/* REX2.M in rex2 prefix represents map0 or map1. */
if (ins.last_rex2_prefix < 0 ? *ins.codep == 0x0f : (ins.rex2 & REX2_M))
{
- unsigned char threebyte;
-
if (!ins.rex2)
{
ins.codep++;
@@ -9549,17 +9549,15 @@ print_insn (bfd_vma pc, disassemble_info
goto fetch_error_out;
}
- threebyte = *ins.codep;
- dp = &dis386_twobyte[threebyte];
- ins.need_modrm = twobyte_has_modrm[threebyte];
- ins.codep++;
+ dp = &dis386_twobyte[*ins.codep];
+ ins.need_modrm = twobyte_has_modrm[*ins.codep];
}
else
{
dp = &dis386[*ins.codep];
ins.need_modrm = onebyte_has_modrm[*ins.codep];
- ins.codep++;
}
+ ins.codep++;
/* Save sizeflag for printing the extra ins.prefixes later before updating
it for mnemonic and operand processing. The prefix names depend
diff -rupN binutils.orig/opcodes/i386-opc.tbl binutils-2.41/opcodes/i386-opc.tbl
--- binutils.orig/opcodes/i386-opc.tbl 2024-02-12 15:55:21.578572835 +0000
+++ binutils-2.41/opcodes/i386-opc.tbl 2024-02-12 15:56:28.955616704 +0000
@@ -1586,7 +1586,9 @@ vandnp<sd>, 0x<sd:ppfx>55, AVX, Modrm|Ve
vandp<sd>, 0x<sd:ppfx>54, AVX, Modrm|C|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
vblendp<sd>, 0x660c | <sd:opc>, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
vblendvp<sd>, 0x664a | <sd:opc>, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vbroadcastf128, 0x661a, AVX, Modrm|Vex=2|Space0F38|VexW=1|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
+vbroadcastf128, 0x661a, AVX, Modrm|Vex256|Space0F38|VexW0|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
+// vbroadcastf32x4 in disguise (see vround{p,s}{s,d} comment)
+vbroadcastf128, 0x661a, APX_F&AVX512VL, Modrm|EVex256|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
vbroadcastsd, 0x6619, AVX, Modrm|Vex256|Space0F38|VexW0|NoSuf, { Qword|Unspecified|BaseIndex, RegYMM }
vbroadcastss, 0x6618, AVX, Modrm|Vex128|Space0F38|VexW0|NoSuf, { Dword|Unspecified|BaseIndex, RegXMM|RegYMM }
vcmp<frel>p<sd>, 0x<sd:ppfx>c2/0x<frel:imm>, AVX, Modrm|<frel:comm>|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf|ImmExt, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
@@ -1614,7 +1616,9 @@ vdivp<sd>, 0x<sd:ppfx>5e, AVX, Modrm|Vex
vdivs<sd>, 0x<sd:spfx>5e, AVX, Modrm|VexLIG|Space0F|VexVVVV|VexWIG|NoSuf, { <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
vdppd, 0x6641, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
vdpps, 0x6640, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
-vextractf128, 0x6619, AVX, Modrm|Vex=2|Space0F3A|VexW=1|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
+vextractf128, 0x6619, AVX, Modrm|Vex256|Space0F3A|VexW0|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
+// vextractf32x4 in disguise (see vround{p,s}{s,d} comment)
+vextractf128, 0x6619, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexW0|Disp8MemShift=4|NoSuf, { Imm8, RegYMM, Xmmword|Unspecified|BaseIndex }
vextractps, 0x6617, AVX|AVX512F, Modrm|Vex128|EVex128|Space0F3A|VexWIG|Disp8MemShift=2|NoSuf, { Imm8, RegXMM, Reg32|Unspecified|BaseIndex }
vextractps, 0x6617, x64&(AVX|AVX512F), RegMem|Vex128|EVex128|Space0F3A|VexWIG|NoSuf, { Imm8, RegXMM, Reg64 }
vhaddpd, 0x667c, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
@@ -1622,6 +1626,8 @@ vhaddps, 0xf27c, AVX, Modrm|Vex|Space0F|
vhsubpd, 0x667d, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
vhsubps, 0xf27d, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
vinsertf128, 0x6618, AVX, Modrm|Vex256|Space0F3A|VexVVVV|VexW0|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegYMM, RegYMM }
+// vinsertf32x4 in disguise (see vround{p,s}{s,d} comment)
+vinsertf128, 0x6618, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexVVVV|VexW0|Disp8MemShift=4|NoSuf, { Imm8, Xmmword|Unspecified|BaseIndex, RegYMM, RegYMM }
vinsertps, 0x6621, AVX, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8, Dword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
vlddqu, 0xf2f0, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM }
vldmxcsr, 0xae/2, AVX, Modrm|Vex128|Space0F|VexWIG|NoSuf, { Dword|Unspecified|BaseIndex }
@@ -1792,8 +1798,8 @@ vroundp<sd>, 0x6608 | <sd:opc>, AVX, Mod
vrounds<sd>, 0x660a | <sd:opc>, AVX, Modrm|VexLIG|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8, <sd:elem>|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
// These are really clones of VRNDSCALE{P,S}{S,D}, with broadcast, masking, SAE,
// 512-bit operand size, and register sources dropped.
-vroundp<sd>, 0x6608 | <sd:opc>, APX_F, Modrm|Space0F3A|<sd:vexw>|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM }
-vrounds<sd>, 0x660a | <sd:opc>, APX_F, Modrm|EVexLIG|Space0F3A|VexVVVV|<sd:vexw>|Disp8MemShift|NoSuf, { Imm8, <sd:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
+vroundp<sd>, 0x6608 | <sd:opc>, APX_F&AVX512VL, Modrm|Space0F3A|<sd:vexw>|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM }
+vrounds<sd>, 0x660a | <sd:opc>, APX_F&AVX512F, Modrm|EVexLIG|Space0F3A|VexVVVV|<sd:vexw>|Disp8MemShift|NoSuf, { Imm8, <sd:elem>|Unspecified|BaseIndex, RegXMM, RegXMM }
vrsqrtps, 0x52, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM }
vrsqrtss, 0xf352, AVX, Modrm|Vex=3|Space0F|VexVVVV|VexWIG|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
vshufp<sd>, 0x<sd:ppfx>c6, AVX, Modrm|Vex|Space0F|VexVVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
@@ -1828,7 +1834,9 @@ vpmovzxwq, 0x6634, AVX2|AVX512VL, Modrm|
// New AVX2 instructions.
-vbroadcasti128, 0x665A, AVX2, Modrm|Vex=2|Space0F38|VexW=1|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
+vbroadcasti128, 0x665A, AVX2, Modrm|Vex256|Space0F38|VexW0|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
+// vbroadcasti32x4 in disguise (see vround{p,s}{s,d} comment)
+vbroadcasti128, 0x665a, APX_F&AVX512VL, Modrm|EVex256|Space0F38|VexW0|Disp8MemShift=4|NoSuf, { Xmmword|Unspecified|BaseIndex, RegYMM }
vbroadcastsd, 0x6619, AVX2, Modrm|Vex=2|Space0F38|VexW=1|NoSuf, { RegXMM, RegYMM }
vbroadcastss, 0x6618, AVX2|AVX512F, Modrm|Vex|EVexDYN|Masking|Space0F38|VexW0|Disp8MemShift=2|NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
vpblendd, 0x6602, AVX2, Modrm|Vex|Space0F3A|VexVVVV|VexW0|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM }
@@ -1840,8 +1848,12 @@ vpermd, 0x6636, AVX2|AVX512F, Modrm|Vex2
vpermpd, 0x6601, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F3A|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegYMM|RegZMM }
vpermps, 0x6616, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F38|VexVVVV|VexW0|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegYMM|RegZMM|Dword|Unspecified|BaseIndex, RegYMM|RegZMM, RegYMM|RegZMM }
vpermq, 0x6600, AVX2|AVX512F, Modrm|Vex256|EVexDYN|Masking|Space0F3A|VexW1|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8|Imm8S, RegYMM|RegZMM|Qword|Unspecified|BaseIndex, RegYMM|RegZMM }
-vextracti128, 0x6639, AVX2, Modrm|Vex=2|Space0F3A|VexW=1|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
+vextracti128, 0x6639, AVX2, Modrm|Vex256|Space0F3A|VexW0|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM }
+// vextracti32x4 in disguise (see vround{p,s}{s,d} comment)
+vextracti128, 0x6639, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexW0|Disp8MemShift=4|NoSuf, { Imm8, RegYMM, Xmmword|Unspecified|BaseIndex }
vinserti128, 0x6638, AVX2, Modrm|Vex256|Space0F3A|VexVVVV|VexW0|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegYMM, RegYMM }
+// vinserti32x4 in disguise (see vround{p,s}{s,d} comment)
+vinserti128, 0x6638, APX_F&AVX512VL, Modrm|EVex256|Space0F3A|VexVVVV|VexW0|Disp8MemShift=4|NoSuf, { Imm8, Xmmword|Unspecified|BaseIndex, RegYMM, RegYMM }
vpmaskmov<dq>, 0x668e, AVX2, Modrm|Vex|Space0F38|VexVVVV|<dq:vexw>|CheckOperandSize|NoSuf, { RegXMM|RegYMM, RegXMM|RegYMM, Xmmword|Ymmword|Unspecified|BaseIndex }
vpmaskmov<dq>, 0x668c, AVX2, Modrm|Vex|Space0F38|VexVVVV|<dq:vexw>|CheckOperandSize|NoSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM }
vpsllv<dq>, 0x6647, AVX2|AVX512F, Modrm|Vex|EVexDYN|Masking|Space0F38|VexVVVV|<dq:vexw>|Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|<dq:elem>|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM }
@@ -2115,12 +2127,12 @@ xcryptofb, 0xf30fa7e8, PadLock, NoSuf|Re
xstore, 0xfa7c0, PadLock, NoSuf|RepPrefixOk, {}
// Multy-precision Add Carry, rdseed instructions.
-adcx, 0x6666, ADX&APX_F, C|Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|DstVVVV|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
+adcx, 0x6666, ADX&APX_F, C|Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|DstVVVV|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
adcx, 0x660f38f6, ADX, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-adcx, 0x6666, ADX&APX_F, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-adox, 0xf366, ADX&APX_F, C|Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|DstVVVV|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
+adcx, 0x6666, ADX&APX_F, Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
+adox, 0xf366, ADX&APX_F, C|Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|DstVVVV|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64, Reg32|Reg64 }
adox, 0xf30f38f6, ADX, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
-adox, 0xf366, ADX&APX_F, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
+adox, 0xf366, ADX&APX_F, Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64|Unspecified|BaseIndex, Reg32|Reg64 }
rdseed, 0xfc7/7, RdSeed, Modrm|NoSuf, { Reg16|Reg32|Reg64 }
// SMAP instructions.
@@ -3098,11 +3110,11 @@ rdsspq, 0xf30f1e/1, SHSTK&x64, Modrm|NoS
saveprevssp, 0xf30f01ea, SHSTK, NoSuf, {}
rstorssp, 0xf30f01/5, SHSTK, Modrm|NoSuf, { Qword|Unspecified|BaseIndex }
wrssd, 0x0f38f6, SHSTK, Modrm|IgnoreSize|NoSuf, { Reg32, Dword|Unspecified|BaseIndex }
-wrssd, 0x66, SHSTK&APX_F, Modrm|IgnoreSize|NoSuf|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex }
+wrssd, 0x66, SHSTK&APX_F, Modrm|NoSuf|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex }
wrssq, 0x0f38f6, SHSTK&x64, Modrm|NoSuf|Size64, { Reg64, Qword|Unspecified|BaseIndex }
wrssq, 0x66, SHSTK&APX_F, Modrm|NoSuf|Size64|EVexMap4, { Reg64, Qword|Unspecified|BaseIndex }
wrussd, 0x660f38f5, SHSTK, Modrm|IgnoreSize|NoSuf, { Reg32, Dword|Unspecified|BaseIndex }
-wrussd, 0x6665, SHSTK&APX_F, Modrm|IgnoreSize|NoSuf|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex }
+wrussd, 0x6665, SHSTK&APX_F, Modrm|NoSuf|EVexMap4, { Reg32, Dword|Unspecified|BaseIndex }
wrussq, 0x660f38f5, SHSTK&x64, Modrm|NoSuf, { Reg64, Qword|Unspecified|BaseIndex }
wrussq, 0x6665, SHSTK&APX_F, Modrm|NoSuf|EVexMap4, { Reg64, Qword|Unspecified|BaseIndex }
setssbsy, 0xf30f01e8, SHSTK, NoSuf, {}
@@ -3152,7 +3164,7 @@ cldemote, 0x0f1c/0, CLDEMOTE, Modrm|Anys
// MOVDIR[I,64B] instructions.
movdiri, 0xf38f9, MOVDIRI, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-movdiri, 0xf9, MOVDIRI&APX_F, Modrm|CheckOperandSize|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
+movdiri, 0xf9, MOVDIRI&APX_F, Modrm|CheckOperandSize|No_bSuf|No_wSuf|No_sSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
movdir64b, 0x660f38f8, MOVDIR64B, Modrm|AddrPrefixOpReg|NoSuf, { Unspecified|BaseIndex, Reg16|Reg32|Reg64 }
movdir64b, 0x66f8, MOVDIR64B&APX_F, Modrm|AddrPrefixOpReg|NoSuf|EVexMap4, { Unspecified|BaseIndex, Reg32|Reg64 }
@@ -3459,13 +3471,13 @@ wrmsrlist, 0xf30f01c6, MSRLIST, NoSuf, {
// RAO-INT instructions.
aadd, 0xf38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-aadd, 0xfc, RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
+aadd, 0xfc, RAO_INT&APX_F, Modrm|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
aand, 0x660f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-aand, 0x66fc, RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
+aand, 0x66fc, RAO_INT&APX_F, Modrm|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
aor, 0xf20f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-aor, 0xf2fc, RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
+aor, 0xf2fc, RAO_INT&APX_F, Modrm|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
axor, 0xf30f38fc, RAO_INT, Modrm|IgnoreSize|CheckOperandSize|NoSuf, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
-axor, 0xf3fc, RAO_INT&APX_F, Modrm|IgnoreSize|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
+axor, 0xf3fc, RAO_INT&APX_F, Modrm|CheckOperandSize|NoSuf|EVexMap4, { Reg32|Reg64, Dword|Qword|Unspecified|BaseIndex }
// RAO-INT instructions end.
diff -rupN binutils.orig/opcodes/i386-tbl.h binutils-2.41/opcodes/i386-tbl.h
--- binutils.orig/opcodes/i386-tbl.h 2024-02-12 15:55:21.578572835 +0000
+++ binutils-2.41/opcodes/i386-tbl.h 2024-02-12 16:42:52.494835094 +0000
@@ -15372,6 +15372,16 @@ static const insn_template i386_optab[]
1, 0, 0, 0, 1, 0 } },
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 1, 0, 0, 0, 0 } } } },
+ { MN_vbroadcastf128, 0x1a, 2, SPACE_0F38, None,
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+ 0 },
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+ { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+ 1, 0, 0, 0, 1, 0 } },
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 1, 0, 0, 0, 0 } } } },
{ MN_vbroadcastsd, 0x19, 2, SPACE_0F38, None,
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 2, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
@@ -20804,6 +20814,18 @@ static const insn_template i386_optab[]
0, 1, 0, 0, 0, 0 } },
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
1, 0, 0, 0, 1, 0 } } } },
+ { MN_vextractf128, 0x19, 3, SPACE_0F3A, None,
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+ 0 },
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+ { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0 } },
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 1, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+ 1, 0, 0, 0, 1, 0 } } } },
{ MN_vextractps, 0x17, 3, SPACE_0F3A, None,
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 1, 0, 3, 1, 0, 0, 2, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
@@ -20890,6 +20912,20 @@ static const insn_template i386_optab[]
0, 1, 0, 0, 0, 0 } },
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 1, 0, 0, 0, 0 } } } },
+ { MN_vinsertf128, 0x18, 4, SPACE_0F3A, None,
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 1, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+ 0 },
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+ { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+ 1, 0, 0, 0, 1, 0 } },
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 1, 0, 0, 0, 0 } },
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 1, 0, 0, 0, 0 } } } },
{ MN_vinsertps, 0x21, 4, SPACE_0F3A, None,
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 1, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
@@ -25296,7 +25332,7 @@ static const insn_template i386_optab[]
{ 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 1, 1, 0, 0, 5, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0,
0 },
- { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
{ { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } },
@@ -25320,7 +25356,7 @@ static const insn_template i386_optab[]
{ 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 2, 1, 0, 0, 5, 0, 0, 0, 0, 7, 0, 0, 0, 0, 0,
0 },
- { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
{ { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } },
@@ -25346,7 +25382,7 @@ static const insn_template i386_optab[]
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 1, 1, 1, 0, 0, 4, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0,
0 },
- { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
{ { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } },
@@ -25374,7 +25410,7 @@ static const insn_template i386_optab[]
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 1, 2, 1, 0, 0, 4, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0,
0 },
- { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
{ { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } },
@@ -25884,6 +25920,16 @@ static const insn_template i386_optab[]
1, 0, 0, 0, 1, 0 } },
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 1, 0, 0, 0, 0 } } } },
+ { MN_vbroadcasti128, 0x5a, 2, SPACE_0F38, None,
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+ 0 },
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+ { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+ 1, 0, 0, 0, 1, 0 } },
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 1, 0, 0, 0, 0 } } } },
{ MN_vpblendd, 0x02, 4, SPACE_0F3A, None,
{ 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
@@ -26106,6 +26152,18 @@ static const insn_template i386_optab[]
0, 1, 0, 0, 0, 0 } },
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
1, 0, 0, 0, 1, 0 } } } },
+ { MN_vextracti128, 0x39, 3, SPACE_0F3A, None,
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+ 0 },
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+ { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0 } },
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 1, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+ 1, 0, 0, 0, 1, 0 } } } },
{ MN_vinserti128, 0x38, 4, SPACE_0F3A, None,
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
@@ -26120,6 +26178,20 @@ static const insn_template i386_optab[]
0, 1, 0, 0, 0, 0 } },
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 1, 0, 0, 0, 0 } } } },
+ { MN_vinserti128, 0x38, 4, SPACE_0F3A, None,
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 1, 1, 1, 0, 0, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0, 0,
+ 0 },
+ { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 1, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+ { { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+ 1, 0, 0, 0, 1, 0 } },
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 1, 0, 0, 0, 0 } },
+ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 1, 0, 0, 0, 0 } } } },
{ MN_vpmaskmovd, 0x8e, 3, SPACE_0F38, None,
{ 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
@@ -30933,7 +31005,7 @@ static const insn_template i386_optab[]
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ MN_adcx, 0x66, 3, SPACE_EVEXMAP4, None,
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 2, 0, 1, 0, 0, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
0 },
{ { 61, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -30955,7 +31027,7 @@ static const insn_template i386_optab[]
{ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
0, 0, 0, 0, 0, 0 } } } },
{ MN_adcx, 0x66, 2, SPACE_EVEXMAP4, None,
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0 },
{ { 61, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -30965,7 +31037,7 @@ static const insn_template i386_optab[]
{ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
0, 0, 0, 0, 0, 0 } } } },
{ MN_adox, 0x66, 3, SPACE_EVEXMAP4, None,
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 2, 0, 2, 0, 0, 2, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
0 },
{ { 61, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -30987,7 +31059,7 @@ static const insn_template i386_optab[]
{ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0,
0, 0, 0, 0, 0, 0 } } } },
{ MN_adox, 0x66, 2, SPACE_EVEXMAP4, None,
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 2, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0 },
{ { 61, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -37497,7 +37569,7 @@ static const insn_template i386_optab[]
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
0, 0, 0, 0, 1, 0 } } } },
{ MN_wrssd, 0x66, 2, SPACE_EVEXMAP4, None,
- { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0 },
{ { 105, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -37537,7 +37609,7 @@ static const insn_template i386_optab[]
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0,
0, 0, 0, 0, 1, 0 } } } },
{ MN_wrussd, 0x65, 2, SPACE_EVEXMAP4, None,
- { 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0 },
{ { 105, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -37697,7 +37769,7 @@ static const insn_template i386_optab[]
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
0, 0, 0, 0, 1, 0 } } } },
{ MN_movdiri, 0xf9, 2, SPACE_EVEXMAP4, None,
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0 },
{ { 120, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -41093,7 +41165,7 @@ static const insn_template i386_optab[]
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
0, 0, 0, 0, 1, 0 } } } },
{ MN_aadd, 0xfc, 2, SPACE_EVEXMAP4, None,
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0 },
{ { 95, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -41113,7 +41185,7 @@ static const insn_template i386_optab[]
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
0, 0, 0, 0, 1, 0 } } } },
{ MN_aand, 0xfc, 2, SPACE_EVEXMAP4, None,
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 1, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0 },
{ { 95, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -41133,7 +41205,7 @@ static const insn_template i386_optab[]
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
0, 0, 0, 0, 1, 0 } } } },
{ MN_aor, 0xfc, 2, SPACE_EVEXMAP4, None,
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 3, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0 },
{ { 95, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -41153,7 +41225,7 @@ static const insn_template i386_optab[]
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 0, 1, 0,
0, 0, 0, 0, 1, 0 } } } },
{ MN_axor, 0xfc, 2, SPACE_EVEXMAP4, None,
- { 0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
+ { 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 2, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0 },
{ { 95, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0 } },
@@ -41398,203 +41470,203 @@ static const i386_op_off_t i386_op_sets[
1540, 1541, 1542, 1544, 1546, 1548, 1550, 1552,
1554, 1556, 1558, 1560, 1562, 1564, 1566, 1568,
1570, 1572, 1574, 1576, 1578, 1579, 1580, 1582,
- 1584, 1586, 1588, 1589, 1590, 1591, 1592, 1593,
- 1596, 1598, 1600, 1602, 1604, 1606, 1608, 1610,
- 1612, 1614, 1616, 1618, 1620, 1622, 1624, 1626,
- 1628, 1630, 1632, 1634, 1636, 1638, 1640, 1642,
- 1644, 1646, 1648, 1650, 1652, 1654, 1656, 1658,
- 1660, 1662, 1664, 1666, 1668, 1670, 1672, 1674,
- 1676, 1678, 1680, 1682, 1684, 1686, 1688, 1690,
- 1692, 1694, 1696, 1698, 1700, 1702, 1704, 1706,
- 1708, 1710, 1712, 1714, 1716, 1718, 1720, 1722,
- 1724, 1726, 1728, 1730, 1732, 1734, 1736, 1738,
- 1740, 1742, 1744, 1746, 1748, 1750, 1752, 1754,
- 1756, 1758, 1760, 1762, 1764, 1766, 1768, 1770,
- 1772, 1774, 1776, 1778, 1780, 1782, 1784, 1786,
- 1788, 1790, 1792, 1794, 1796, 1798, 1800, 1802,
- 1804, 1806, 1808, 1810, 1812, 1814, 1816, 1818,
- 1820, 1822, 1824, 1826, 1828, 1830, 1832, 1834,
- 1836, 1838, 1840, 1842, 1844, 1846, 1848, 1850,
- 1852, 1854, 1856, 1858, 1860, 1862, 1864, 1866,
- 1868, 1870, 1872, 1874, 1876, 1878, 1880, 1882,
- 1884, 1886, 1888, 1890, 1892, 1894, 1896, 1898,
- 1900, 1902, 1904, 1906, 1908, 1910, 1912, 1914,
- 1916, 1918, 1920, 1922, 1924, 1926, 1928, 1930,
- 1932, 1934, 1936, 1938, 1940, 1942, 1944, 1946,
- 1948, 1950, 1952, 1954, 1956, 1958, 1960, 1962,
- 1964, 1966, 1968, 1970, 1972, 1974, 1976, 1978,
- 1983, 1985, 1990, 1992, 1994, 1999, 2001, 2003,
- 2005, 2010, 2012, 2014, 2016, 2020, 2026, 2028,
- 2033, 2035, 2037, 2039, 2041, 2043, 2045, 2047,
- 2049, 2051, 2052, 2053, 2054, 2056, 2057, 2058,
- 2059, 2060, 2061, 2063, 2064, 2065, 2066, 2068,
- 2070, 2072, 2074, 2076, 2078, 2080, 2082, 2084,
- 2086, 2088, 2090, 2092, 2096, 2097, 2098, 2100,
- 2104, 2108, 2110, 2114, 2118, 2119, 2120, 2122,
- 2124, 2126, 2128, 2133, 2137, 2141, 2143, 2145,
- 2147, 2149, 2150, 2152, 2154, 2156, 2158, 2160,
- 2162, 2164, 2166, 2168, 2170, 2172, 2174, 2176,
- 2178, 2180, 2182, 2184, 2186, 2188, 2190, 2192,
- 2194, 2195, 2196, 2198, 2200, 2201, 2202, 2205,
- 2208, 2211, 2214, 2216, 2218, 2220, 2222, 2224,
- 2226, 2227, 2228, 2229, 2231, 2235, 2237, 2239,
- 2245, 2249, 2250, 2251, 2252, 2253, 2254, 2255,
- 2256, 2260, 2262, 2264, 2268, 2270, 2272, 2274,
- 2276, 2278, 2280, 2282, 2284, 2286, 2288, 2290,
- 2292, 2294, 2296, 2297, 2300, 2303, 2308, 2313,
- 2316, 2319, 2322, 2325, 2330, 2335, 2338, 2341,
- 2343, 2345, 2347, 2349, 2351, 2353, 2355, 2356,
- 2358, 2360, 2362, 2364, 2366, 2367, 2368, 2369,
- 2373, 2377, 2379, 2383, 2387, 2391, 2395, 2399,
- 2401, 2405, 2407, 2409, 2411, 2413, 2415, 2417,
- 2419, 2421, 2422, 2424, 2426, 2428, 2430, 2432,
- 2434, 2436, 2438, 2439, 2440, 2441, 2443, 2445,
- 2447, 2449, 2450, 2451, 2453, 2455, 2457, 2459,
- 2461, 2463, 2464, 2466, 2468, 2470, 2472, 2473,
- 2474, 2476, 2478, 2480, 2482, 2484, 2486, 2488,
- 2490, 2491, 2492, 2493, 2494, 2497, 2500, 2502,
- 2505, 2506, 2507, 2509, 2510, 2512, 2513, 2514,
- 2516, 2518, 2519, 2520, 2521, 2522, 2523, 2526,
- 2531, 2536, 2541, 2546, 2549, 2554, 2559, 2561,
- 2563, 2565, 2567, 2568, 2569, 2571, 2573, 2575,
- 2577, 2579, 2581, 2583, 2584, 2585, 2586, 2587,
- 2588, 2589, 2594, 2599, 2600, 2601, 2602, 2603,
- 2604, 2605, 2606, 2607, 2608, 2609, 2610, 2611,
- 2612, 2613, 2614, 2615, 2616, 2617, 2618, 2619,
- 2620, 2621, 2622, 2623, 2624, 2625, 2626, 2627,
- 2628, 2629, 2630, 2631, 2632, 2633, 2634, 2635,
- 2636, 2637, 2638, 2639, 2640, 2641, 2642, 2643,
- 2644, 2645, 2646, 2647, 2648, 2649, 2650, 2651,
- 2652, 2653, 2654, 2655, 2656, 2657, 2658, 2659,
- 2660, 2661, 2662, 2663, 2664, 2665, 2666, 2667,
- 2668, 2669, 2670, 2671, 2672, 2673, 2674, 2675,
- 2676, 2677, 2678, 2679, 2680, 2681, 2682, 2683,
- 2684, 2685, 2686, 2687, 2688, 2689, 2690, 2691,
- 2692, 2693, 2694, 2695, 2696, 2697, 2698, 2699,
- 2700, 2701, 2702, 2703, 2704, 2705, 2706, 2707,
- 2708, 2709, 2710, 2711, 2712, 2713, 2714, 2715,
- 2716, 2717, 2718, 2719, 2720, 2721, 2722, 2723,
- 2724, 2725, 2726, 2727, 2728, 2729, 2730, 2731,
- 2732, 2733, 2734, 2735, 2736, 2737, 2738, 2739,
- 2740, 2741, 2742, 2743, 2744, 2745, 2746, 2747,
- 2748, 2749, 2750, 2751, 2752, 2753, 2754, 2755,
- 2756, 2757, 2758, 2759, 2760, 2761, 2762, 2763,
- 2764, 2765, 2766, 2767, 2768, 2769, 2770, 2771,
- 2772, 2773, 2774, 2775, 2776, 2777, 2778, 2779,
- 2780, 2781, 2782, 2783, 2784, 2785, 2786, 2787,
- 2788, 2789, 2790, 2791, 2792, 2793, 2794, 2795,
- 2796, 2797, 2798, 2799, 2800, 2802, 2804, 2805,
- 2806, 2807, 2808, 2809, 2810, 2811, 2812, 2813,
- 2814, 2815, 2816, 2817, 2818, 2819, 2820, 2821,
- 2822, 2823, 2824, 2825, 2826, 2827, 2828, 2829,
- 2830, 2831, 2832, 2834, 2836, 2838, 2840, 2841,
- 2842, 2843, 2844, 2845, 2846, 2847, 2848, 2849,
- 2850, 2851, 2852, 2853, 2855, 2856, 2857, 2858,
- 2859, 2860, 2861, 2862, 2863, 2864, 2865, 2866,
- 2867, 2868, 2869, 2870, 2871, 2872, 2873, 2874,
- 2875, 2876, 2877, 2878, 2879, 2880, 2881, 2882,
- 2883, 2884, 2885, 2886, 2887, 2888, 2889, 2890,
- 2891, 2892, 2893, 2894, 2895, 2896, 2897, 2898,
- 2899, 2900, 2902, 2904, 2905, 2906, 2908, 2909,
- 2911, 2913, 2914, 2915, 2917, 2919, 2920, 2921,
- 2922, 2923, 2924, 2925, 2926, 2927, 2928, 2929,
- 2930, 2931, 2932, 2933, 2934, 2935, 2936, 2937,
- 2940, 2943, 2944, 2945, 2946, 2947, 2948, 2949,
- 2951, 2953, 2955, 2956, 2957, 2959, 2961, 2963,
- 2965, 2969, 2971, 2973, 2974, 2975, 2976, 2977,
- 2978, 2979, 2980, 2981, 2982, 2983, 2984, 2985,
- 2986, 2987, 2988, 2989, 2990, 2991, 2994, 2997,
- 2998, 2999, 3000, 3001, 3002, 3003, 3004, 3005,
- 3006, 3007, 3008, 3009, 3010, 3011, 3012, 3013,
- 3014, 3015, 3016, 3017, 3018, 3019, 3020, 3021,
- 3022, 3023, 3024, 3025, 3026, 3027, 3028, 3029,
- 3030, 3031, 3032, 3033, 3034, 3035, 3036, 3037,
- 3038, 3039, 3040, 3041, 3042, 3043, 3044, 3045,
- 3046, 3047, 3048, 3049, 3050, 3051, 3054, 3056,
- 3059, 3062, 3064, 3067, 3070, 3073, 3076, 3077,
- 3080, 3081, 3082, 3083, 3084, 3085, 3089, 3091,
- 3094, 3095, 3096, 3097, 3098, 3099, 3100, 3101,
- 3102, 3103, 3104, 3105, 3106, 3107, 3108, 3109,
- 3110, 3111, 3112, 3113, 3114, 3115, 3116, 3117,
- 3118, 3119, 3120, 3121, 3122, 3123, 3124, 3125,
- 3126, 3127, 3128, 3129, 3130, 3131, 3132, 3133,
- 3134, 3135, 3136, 3137, 3138, 3139, 3140, 3141,
- 3142, 3143, 3144, 3145, 3146, 3147, 3148, 3149,
- 3151, 3152, 3153, 3154, 3155, 3156, 3157, 3158,
- 3159, 3160, 3161, 3162, 3163, 3164, 3165, 3166,
- 3167, 3168, 3169, 3170, 3171, 3172, 3173, 3174,
- 3175, 3176, 3177, 3178, 3179, 3180, 3181, 3182,
- 3183, 3184, 3185, 3186, 3187, 3188, 3189, 3190,
- 3193, 3196, 3199, 3202, 3205, 3208, 3211, 3214,
- 3217, 3220, 3223, 3226, 3229, 3232, 3235, 3236,
- 3237, 3238, 3239, 3241, 3242, 3243, 3244, 3245,
- 3246, 3247, 3248, 3249, 3250, 3251, 3252, 3253,
- 3254, 3255, 3256, 3257, 3258, 3259, 3260, 3261,
- 3262, 3263, 3264, 3265, 3266, 3267, 3268, 3269,
- 3270, 3271, 3272, 3273, 3274, 3275, 3276, 3277,
- 3278, 3279, 3280, 3281, 3282, 3283, 3284, 3285,
- 3286, 3287, 3288, 3289, 3290, 3291, 3292, 3293,
- 3294, 3295, 3296, 3297, 3298, 3299, 3300, 3301,
- 3302, 3305, 3308, 3309, 3310, 3311, 3312, 3313,
- 3314, 3315, 3316, 3317, 3318, 3319, 3320, 3321,
- 3322, 3323, 3324, 3325, 3326, 3327, 3328, 3329,
- 3330, 3331, 3332, 3333, 3334, 3335, 3336, 3337,
- 3338, 3339, 3340, 3341, 3342, 3343, 3344, 3345,
- 3346, 3347, 3348, 3349, 3350, 3351, 3352, 3353,
- 3354, 3355, 3356, 3357, 3358, 3359, 3360, 3361,
- 3362, 3363, 3364, 3365, 3366, 3367, 3368, 3369,
- 3370, 3373, 3376, 3379, 3380, 3381, 3382, 3383,
- 3384, 3385, 3386, 3387, 3388, 3389, 3390, 3391,
- 3392, 3393, 3394, 3395, 3398, 3401, 3402, 3403,
- 3406, 3407, 3408, 3409, 3410, 3413, 3416, 3419,
- 3420, 3421, 3422, 3423, 3424, 3425, 3426, 3427,
- 3428, 3429, 3431, 3433, 3434, 3435, 3436, 3437,
- 3438, 3439, 3440, 3441, 3442, 3443, 3444, 3445,
- 3446, 3447, 3448, 3449, 3450, 3451, 3452, 3453,
- 3454, 3455, 3456, 3457, 3458, 3460, 3462, 3463,
- 3464, 3465, 3466, 3467, 3468, 3469, 3470, 3471,
- 3472, 3473, 3474, 3475, 3476, 3477, 3478, 3479,
- 3480, 3481, 3482, 3483, 3484, 3485, 3486, 3487,
- 3489, 3491, 3493, 3495, 3496, 3497, 3498, 3499,
- 3500, 3501, 3502, 3503, 3504, 3505, 3506, 3507,
- 3508, 3509, 3510, 3512, 3513, 3515, 3518, 3520,
- 3521, 3522, 3524, 3526, 3527, 3528, 3529, 3530,
- 3531, 3532, 3534, 3536, 3538, 3540, 3541, 3542,
- 3543, 3544, 3545, 3546, 3547, 3548, 3549, 3551,
- 3553, 3554, 3556, 3558, 3559, 3564, 3566, 3568,
- 3569, 3570, 3571, 3572, 3573, 3574, 3575, 3577,
- 3579, 3580, 3581, 3582, 3584, 3587, 3590, 3593,
- 3595, 3596, 3597, 3598, 3599, 3600, 3601, 3602,
- 3603, 3604, 3605, 3606, 3607, 3608, 3609, 3610,
- 3611, 3612, 3613, 3614, 3615, 3617, 3619, 3621,
- 3623, 3625, 3627, 3629, 3631, 3633, 3635, 3636,
- 3637, 3638, 3639, 3640, 3641, 3642, 3643, 3644,
- 3645, 3646, 3647, 3648, 3649, 3650, 3651, 3652,
- 3653, 3654, 3655, 3656, 3657, 3658, 3659, 3660,
- 3661, 3662, 3663, 3664, 3665, 3666, 3667, 3668,
- 3669, 3670, 3671, 3672, 3673, 3674, 3675, 3676,
- 3677, 3678, 3679, 3680, 3681, 3682, 3683, 3684,
- 3685, 3686, 3687, 3688, 3689, 3690, 3691, 3692,
- 3693, 3694, 3695, 3696, 3697, 3698, 3699, 3700,
- 3701, 3702, 3703, 3704, 3705, 3706, 3707, 3708,
- 3709, 3710, 3711, 3712, 3713, 3714, 3715, 3716,
- 3717, 3718, 3719, 3720, 3721, 3722, 3723, 3724,
- 3725, 3726, 3727, 3728, 3729, 3730, 3731, 3732,
- 3733, 3734, 3735, 3736, 3737, 3738, 3739, 3740,
- 3741, 3742, 3743, 3744, 3745, 3746, 3747, 3750,
- 3751, 3752, 3755, 3756, 3757, 3759, 3760, 3761,
- 3762, 3764, 3765, 3766, 3767, 3769, 3770, 3771,
- 3772, 3775, 3776, 3777, 3778, 3779, 3782, 3785,
- 3788, 3791, 3794, 3795, 3796, 3797, 3798, 3800,
- 3802, 3803, 3804, 3805, 3808, 3811, 3814, 3817,
- 3820, 3821, 3822, 3823, 3825, 3826, 3827, 3828,
- 3830, 3831, 3832, 3833, 3834, 3835, 3836, 3837,
- 3838, 3839, 3840, 3841, 3842, 3843, 3844, 3845,
- 3846, 3847, 3848, 3849, 3850, 3851, 3852, 3853,
- 3854, 3855, 3856, 3857, 3858, 3859, 3860, 3861,
- 3862, 3863, 3864, 3865, 3866, 3867, 3868, 3869,
- 3871, 3873, 3875, 3877, 3879, 3880, 3881, 3884,
- 3887, 3888, 3889, 3890, 3891
+ 1584, 1586, 1588, 1589, 1590, 1591, 1592, 1594,
+ 1597, 1599, 1601, 1603, 1605, 1607, 1609, 1611,
+ 1613, 1615, 1617, 1619, 1621, 1623, 1625, 1627,
+ 1629, 1631, 1633, 1635, 1637, 1639, 1641, 1643,
+ 1645, 1647, 1649, 1651, 1653, 1655, 1657, 1659,
+ 1661, 1663, 1665, 1667, 1669, 1671, 1673, 1675,
+ 1677, 1679, 1681, 1683, 1685, 1687, 1689, 1691,
+ 1693, 1695, 1697, 1699, 1701, 1703, 1705, 1707,
+ 1709, 1711, 1713, 1715, 1717, 1719, 1721, 1723,
+ 1725, 1727, 1729, 1731, 1733, 1735, 1737, 1739,
+ 1741, 1743, 1745, 1747, 1749, 1751, 1753, 1755,
+ 1757, 1759, 1761, 1763, 1765, 1767, 1769, 1771,
+ 1773, 1775, 1777, 1779, 1781, 1783, 1785, 1787,
+ 1789, 1791, 1793, 1795, 1797, 1799, 1801, 1803,
+ 1805, 1807, 1809, 1811, 1813, 1815, 1817, 1819,
+ 1821, 1823, 1825, 1827, 1829, 1831, 1833, 1835,
+ 1837, 1839, 1841, 1843, 1845, 1847, 1849, 1851,
+ 1853, 1855, 1857, 1859, 1861, 1863, 1865, 1867,
+ 1869, 1871, 1873, 1875, 1877, 1879, 1881, 1883,
+ 1885, 1887, 1889, 1891, 1893, 1895, 1897, 1899,
+ 1901, 1903, 1905, 1907, 1909, 1911, 1913, 1915,
+ 1917, 1919, 1921, 1923, 1925, 1927, 1929, 1931,
+ 1933, 1935, 1937, 1939, 1941, 1943, 1945, 1947,
+ 1949, 1951, 1953, 1955, 1957, 1959, 1961, 1963,
+ 1965, 1967, 1969, 1971, 1973, 1975, 1977, 1979,
+ 1984, 1986, 1991, 1993, 1995, 2000, 2002, 2004,
+ 2006, 2011, 2013, 2015, 2017, 2021, 2027, 2029,
+ 2034, 2036, 2038, 2040, 2042, 2044, 2046, 2048,
+ 2050, 2052, 2053, 2054, 2056, 2058, 2059, 2060,
+ 2061, 2062, 2064, 2066, 2067, 2068, 2069, 2071,
+ 2073, 2075, 2077, 2079, 2081, 2083, 2085, 2087,
+ 2089, 2091, 2093, 2095, 2099, 2100, 2101, 2103,
+ 2107, 2111, 2113, 2117, 2121, 2122, 2123, 2125,
+ 2127, 2129, 2131, 2136, 2140, 2144, 2146, 2148,
+ 2150, 2152, 2153, 2155, 2157, 2159, 2161, 2163,
+ 2165, 2167, 2169, 2171, 2173, 2175, 2177, 2179,
+ 2181, 2183, 2185, 2187, 2189, 2191, 2193, 2195,
+ 2197, 2198, 2199, 2201, 2203, 2204, 2205, 2208,
+ 2211, 2214, 2217, 2219, 2221, 2223, 2225, 2227,
+ 2229, 2230, 2231, 2232, 2234, 2238, 2240, 2242,
+ 2248, 2252, 2253, 2254, 2255, 2256, 2257, 2258,
+ 2259, 2263, 2265, 2267, 2271, 2273, 2275, 2277,
+ 2279, 2281, 2283, 2285, 2287, 2289, 2291, 2293,
+ 2295, 2297, 2299, 2300, 2303, 2306, 2311, 2316,
+ 2319, 2322, 2325, 2328, 2333, 2338, 2341, 2344,
+ 2346, 2348, 2350, 2352, 2354, 2356, 2358, 2359,
+ 2361, 2363, 2365, 2367, 2369, 2370, 2371, 2372,
+ 2376, 2380, 2382, 2386, 2390, 2394, 2398, 2402,
+ 2404, 2408, 2410, 2412, 2414, 2416, 2418, 2420,
+ 2422, 2424, 2425, 2427, 2429, 2431, 2433, 2435,
+ 2437, 2439, 2441, 2442, 2443, 2444, 2446, 2448,
+ 2450, 2452, 2453, 2454, 2456, 2458, 2460, 2462,
+ 2464, 2466, 2467, 2469, 2471, 2473, 2475, 2476,
+ 2477, 2479, 2481, 2483, 2485, 2487, 2489, 2491,
+ 2493, 2494, 2495, 2497, 2498, 2501, 2504, 2506,
+ 2509, 2510, 2511, 2513, 2514, 2516, 2518, 2520,
+ 2522, 2524, 2525, 2526, 2527, 2528, 2529, 2532,
+ 2537, 2542, 2547, 2552, 2555, 2560, 2565, 2567,
+ 2569, 2571, 2573, 2574, 2575, 2577, 2579, 2581,
+ 2583, 2585, 2587, 2589, 2590, 2591, 2592, 2593,
+ 2594, 2595, 2600, 2605, 2606, 2607, 2608, 2609,
+ 2610, 2611, 2612, 2613, 2614, 2615, 2616, 2617,
+ 2618, 2619, 2620, 2621, 2622, 2623, 2624, 2625,
+ 2626, 2627, 2628, 2629, 2630, 2631, 2632, 2633,
+ 2634, 2635, 2636, 2637, 2638, 2639, 2640, 2641,
+ 2642, 2643, 2644, 2645, 2646, 2647, 2648, 2649,
+ 2650, 2651, 2652, 2653, 2654, 2655, 2656, 2657,
+ 2658, 2659, 2660, 2661, 2662, 2663, 2664, 2665,
+ 2666, 2667, 2668, 2669, 2670, 2671, 2672, 2673,
+ 2674, 2675, 2676, 2677, 2678, 2679, 2680, 2681,
+ 2682, 2683, 2684, 2685, 2686, 2687, 2688, 2689,
+ 2690, 2691, 2692, 2693, 2694, 2695, 2696, 2697,
+ 2698, 2699, 2700, 2701, 2702, 2703, 2704, 2705,
+ 2706, 2707, 2708, 2709, 2710, 2711, 2712, 2713,
+ 2714, 2715, 2716, 2717, 2718, 2719, 2720, 2721,
+ 2722, 2723, 2724, 2725, 2726, 2727, 2728, 2729,
+ 2730, 2731, 2732, 2733, 2734, 2735, 2736, 2737,
+ 2738, 2739, 2740, 2741, 2742, 2743, 2744, 2745,
+ 2746, 2747, 2748, 2749, 2750, 2751, 2752, 2753,
+ 2754, 2755, 2756, 2757, 2758, 2759, 2760, 2761,
+ 2762, 2763, 2764, 2765, 2766, 2767, 2768, 2769,
+ 2770, 2771, 2772, 2773, 2774, 2775, 2776, 2777,
+ 2778, 2779, 2780, 2781, 2782, 2783, 2784, 2785,
+ 2786, 2787, 2788, 2789, 2790, 2791, 2792, 2793,
+ 2794, 2795, 2796, 2797, 2798, 2799, 2800, 2801,
+ 2802, 2803, 2804, 2805, 2806, 2808, 2810, 2811,
+ 2812, 2813, 2814, 2815, 2816, 2817, 2818, 2819,
+ 2820, 2821, 2822, 2823, 2824, 2825, 2826, 2827,
+ 2828, 2829, 2830, 2831, 2832, 2833, 2834, 2835,
+ 2836, 2837, 2838, 2840, 2842, 2844, 2846, 2847,
+ 2848, 2849, 2850, 2851, 2852, 2853, 2854, 2855,
+ 2856, 2857, 2858, 2859, 2861, 2862, 2863, 2864,
+ 2865, 2866, 2867, 2868, 2869, 2870, 2871, 2872,
+ 2873, 2874, 2875, 2876, 2877, 2878, 2879, 2880,
+ 2881, 2882, 2883, 2884, 2885, 2886, 2887, 2888,
+ 2889, 2890, 2891, 2892, 2893, 2894, 2895, 2896,
+ 2897, 2898, 2899, 2900, 2901, 2902, 2903, 2904,
+ 2905, 2906, 2908, 2910, 2911, 2912, 2914, 2915,
+ 2917, 2919, 2920, 2921, 2923, 2925, 2926, 2927,
+ 2928, 2929, 2930, 2931, 2932, 2933, 2934, 2935,
+ 2936, 2937, 2938, 2939, 2940, 2941, 2942, 2943,
+ 2946, 2949, 2950, 2951, 2952, 2953, 2954, 2955,
+ 2957, 2959, 2961, 2962, 2963, 2965, 2967, 2969,
+ 2971, 2975, 2977, 2979, 2980, 2981, 2982, 2983,
+ 2984, 2985, 2986, 2987, 2988, 2989, 2990, 2991,
+ 2992, 2993, 2994, 2995, 2996, 2997, 3000, 3003,
+ 3004, 3005, 3006, 3007, 3008, 3009, 3010, 3011,
+ 3012, 3013, 3014, 3015, 3016, 3017, 3018, 3019,
+ 3020, 3021, 3022, 3023, 3024, 3025, 3026, 3027,
+ 3028, 3029, 3030, 3031, 3032, 3033, 3034, 3035,
+ 3036, 3037, 3038, 3039, 3040, 3041, 3042, 3043,
+ 3044, 3045, 3046, 3047, 3048, 3049, 3050, 3051,
+ 3052, 3053, 3054, 3055, 3056, 3057, 3060, 3062,
+ 3065, 3068, 3070, 3073, 3076, 3079, 3082, 3083,
+ 3086, 3087, 3088, 3089, 3090, 3091, 3095, 3097,
+ 3100, 3101, 3102, 3103, 3104, 3105, 3106, 3107,
+ 3108, 3109, 3110, 3111, 3112, 3113, 3114, 3115,
+ 3116, 3117, 3118, 3119, 3120, 3121, 3122, 3123,
+ 3124, 3125, 3126, 3127, 3128, 3129, 3130, 3131,
+ 3132, 3133, 3134, 3135, 3136, 3137, 3138, 3139,
+ 3140, 3141, 3142, 3143, 3144, 3145, 3146, 3147,
+ 3148, 3149, 3150, 3151, 3152, 3153, 3154, 3155,
+ 3157, 3158, 3159, 3160, 3161, 3162, 3163, 3164,
+ 3165, 3166, 3167, 3168, 3169, 3170, 3171, 3172,
+ 3173, 3174, 3175, 3176, 3177, 3178, 3179, 3180,
+ 3181, 3182, 3183, 3184, 3185, 3186, 3187, 3188,
+ 3189, 3190, 3191, 3192, 3193, 3194, 3195, 3196,
+ 3199, 3202, 3205, 3208, 3211, 3214, 3217, 3220,
+ 3223, 3226, 3229, 3232, 3235, 3238, 3241, 3242,
+ 3243, 3244, 3245, 3247, 3248, 3249, 3250, 3251,
+ 3252, 3253, 3254, 3255, 3256, 3257, 3258, 3259,
+ 3260, 3261, 3262, 3263, 3264, 3265, 3266, 3267,
+ 3268, 3269, 3270, 3271, 3272, 3273, 3274, 3275,
+ 3276, 3277, 3278, 3279, 3280, 3281, 3282, 3283,
+ 3284, 3285, 3286, 3287, 3288, 3289, 3290, 3291,
+ 3292, 3293, 3294, 3295, 3296, 3297, 3298, 3299,
+ 3300, 3301, 3302, 3303, 3304, 3305, 3306, 3307,
+ 3308, 3311, 3314, 3315, 3316, 3317, 3318, 3319,
+ 3320, 3321, 3322, 3323, 3324, 3325, 3326, 3327,
+ 3328, 3329, 3330, 3331, 3332, 3333, 3334, 3335,
+ 3336, 3337, 3338, 3339, 3340, 3341, 3342, 3343,
+ 3344, 3345, 3346, 3347, 3348, 3349, 3350, 3351,
+ 3352, 3353, 3354, 3355, 3356, 3357, 3358, 3359,
+ 3360, 3361, 3362, 3363, 3364, 3365, 3366, 3367,
+ 3368, 3369, 3370, 3371, 3372, 3373, 3374, 3375,
+ 3376, 3379, 3382, 3385, 3386, 3387, 3388, 3389,
+ 3390, 3391, 3392, 3393, 3394, 3395, 3396, 3397,
+ 3398, 3399, 3400, 3401, 3404, 3407, 3408, 3409,
+ 3412, 3413, 3414, 3415, 3416, 3419, 3422, 3425,
+ 3426, 3427, 3428, 3429, 3430, 3431, 3432, 3433,
+ 3434, 3435, 3437, 3439, 3440, 3441, 3442, 3443,
+ 3444, 3445, 3446, 3447, 3448, 3449, 3450, 3451,
+ 3452, 3453, 3454, 3455, 3456, 3457, 3458, 3459,
+ 3460, 3461, 3462, 3463, 3464, 3466, 3468, 3469,
+ 3470, 3471, 3472, 3473, 3474, 3475, 3476, 3477,
+ 3478, 3479, 3480, 3481, 3482, 3483, 3484, 3485,
+ 3486, 3487, 3488, 3489, 3490, 3491, 3492, 3493,
+ 3495, 3497, 3499, 3501, 3502, 3503, 3504, 3505,
+ 3506, 3507, 3508, 3509, 3510, 3511, 3512, 3513,
+ 3514, 3515, 3516, 3518, 3519, 3521, 3524, 3526,
+ 3527, 3528, 3530, 3532, 3533, 3534, 3535, 3536,
+ 3537, 3538, 3540, 3542, 3544, 3546, 3547, 3548,
+ 3549, 3550, 3551, 3552, 3553, 3554, 3555, 3557,
+ 3559, 3560, 3562, 3564, 3565, 3570, 3572, 3574,
+ 3575, 3576, 3577, 3578, 3579, 3580, 3581, 3583,
+ 3585, 3586, 3587, 3588, 3590, 3593, 3596, 3599,
+ 3601, 3602, 3603, 3604, 3605, 3606, 3607, 3608,
+ 3609, 3610, 3611, 3612, 3613, 3614, 3615, 3616,
+ 3617, 3618, 3619, 3620, 3621, 3623, 3625, 3627,
+ 3629, 3631, 3633, 3635, 3637, 3639, 3641, 3642,
+ 3643, 3644, 3645, 3646, 3647, 3648, 3649, 3650,
+ 3651, 3652, 3653, 3654, 3655, 3656, 3657, 3658,
+ 3659, 3660, 3661, 3662, 3663, 3664, 3665, 3666,
+ 3667, 3668, 3669, 3670, 3671, 3672, 3673, 3674,
+ 3675, 3676, 3677, 3678, 3679, 3680, 3681, 3682,
+ 3683, 3684, 3685, 3686, 3687, 3688, 3689, 3690,
+ 3691, 3692, 3693, 3694, 3695, 3696, 3697, 3698,
+ 3699, 3700, 3701, 3702, 3703, 3704, 3705, 3706,
+ 3707, 3708, 3709, 3710, 3711, 3712, 3713, 3714,
+ 3715, 3716, 3717, 3718, 3719, 3720, 3721, 3722,
+ 3723, 3724, 3725, 3726, 3727, 3728, 3729, 3730,
+ 3731, 3732, 3733, 3734, 3735, 3736, 3737, 3738,
+ 3739, 3740, 3741, 3742, 3743, 3744, 3745, 3746,
+ 3747, 3748, 3749, 3750, 3751, 3752, 3753, 3756,
+ 3757, 3758, 3761, 3762, 3763, 3765, 3766, 3767,
+ 3768, 3770, 3771, 3772, 3773, 3775, 3776, 3777,
+ 3778, 3781, 3782, 3783, 3784, 3785, 3788, 3791,
+ 3794, 3797, 3800, 3801, 3802, 3803, 3804, 3806,
+ 3808, 3809, 3810, 3811, 3814, 3817, 3820, 3823,
+ 3826, 3827, 3828, 3829, 3831, 3832, 3833, 3834,
+ 3836, 3837, 3838, 3839, 3840, 3841, 3842, 3843,
+ 3844, 3845, 3846, 3847, 3848, 3849, 3850, 3851,
+ 3852, 3853, 3854, 3855, 3856, 3857, 3858, 3859,
+ 3860, 3861, 3862, 3863, 3864, 3865, 3866, 3867,
+ 3868, 3869, 3870, 3871, 3872, 3873, 3874, 3875,
+ 3877, 3879, 3881, 3883, 3885, 3886, 3887, 3890,
+ 3893, 3894, 3895, 3896, 3897
};
/* i386 mnemonics table. */
diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d
--- binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d 2024-02-12 15:55:20.792572349 +0000
+++ binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d 2024-02-12 15:56:07.355601128 +0000
@@ -158,6 +158,12 @@ Disassembly of section \.text:
[ ]*[a-f0-9]+:[ ]*62 da 7f 08 4b b4 87 23 01 00 00[ ]+tileloadd tmm6,\[r31\+rax\*4\+0x123\]
[ ]*[a-f0-9]+:[ ]*62 da 7d 08 4b b4 87 23 01 00 00[ ]+tileloaddt1 tmm6,\[r31\+rax\*4\+0x123\]
[ ]*[a-f0-9]+:[ ]*62 da 7e 08 4b b4 87 23 01 00 00[ ]+tilestored[ ]+\[r31\+rax\*4\+0x123\],tmm6
+[ ]*[a-f0-9]+:[ ]*62 fa 7d 28 1a 18[ ]+vbroadcastf32x4 ymm3,XMMWORD PTR \[r16\]
+[ ]*[a-f0-9]+:[ ]*62 fa 7d 28 5a 18[ ]+vbroadcasti32x4 ymm3,XMMWORD PTR \[r16\]
+[ ]*[a-f0-9]+:[ ]*62 fb 7d 28 19 18 01[ ]+vextractf32x4 XMMWORD PTR \[r16\],ymm3,(0x)?1
+[ ]*[a-f0-9]+:[ ]*62 fb 7d 28 39 18 01[ ]+vextracti32x4 XMMWORD PTR \[r16\],ymm3,(0x)?1
+[ ]*[a-f0-9]+:[ ]*62 7b 65 28 18 00 01[ ]+vinsertf32x4 ymm8,ymm3,XMMWORD PTR \[r16\],(0x)?1
+[ ]*[a-f0-9]+:[ ]*62 7b 65 28 38 00 01[ ]+vinserti32x4 ymm8,ymm3,XMMWORD PTR \[r16\],(0x)?1
[ ]*[a-f0-9]+:[ ]*62 db fd 08 09 30 01[ ]+vrndscalepd xmm6,XMMWORD PTR \[r24\],(0x)?1
[ ]*[a-f0-9]+:[ ]*62 db 7d 08 08 30 02[ ]+vrndscaleps xmm6,XMMWORD PTR \[r24\],(0x)?2
[ ]*[a-f0-9]+:[ ]*62 db cd 08 0b 18 03[ ]+vrndscalesd xmm3,xmm6,QWORD PTR \[r24\],(0x)?3
diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d
--- binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d 2024-02-12 15:55:20.792572349 +0000
+++ binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d 2024-02-12 15:56:07.355601128 +0000
@@ -158,6 +158,12 @@ Disassembly of section \.text:
[ ]*[a-f0-9]+:[ ]*62 da 7f 08 4b b4 87 23 01 00 00[ ]+tileloadd[ ]+0x123\(%r31,%rax,4\),%tmm6
[ ]*[a-f0-9]+:[ ]*62 da 7d 08 4b b4 87 23 01 00 00[ ]+tileloaddt1[ ]+0x123\(%r31,%rax,4\),%tmm6
[ ]*[a-f0-9]+:[ ]*62 da 7e 08 4b b4 87 23 01 00 00[ ]+tilestored[ ]+%tmm6,0x123\(%r31,%rax,4\)
+[ ]*[a-f0-9]+:[ ]*62 fa 7d 28 1a 18[ ]+vbroadcastf32x4 \(%r16\),%ymm3
+[ ]*[a-f0-9]+:[ ]*62 fa 7d 28 5a 18[ ]+vbroadcasti32x4 \(%r16\),%ymm3
+[ ]*[a-f0-9]+:[ ]*62 fb 7d 28 19 18 01[ ]+vextractf32x4 \$(0x)?1,%ymm3,\(%r16\)
+[ ]*[a-f0-9]+:[ ]*62 fb 7d 28 39 18 01[ ]+vextracti32x4 \$(0x)?1,%ymm3,\(%r16\)
+[ ]*[a-f0-9]+:[ ]*62 7b 65 28 18 00 01[ ]+vinsertf32x4 \$(0x)?1,\(%r16\),%ymm3,%ymm8
+[ ]*[a-f0-9]+:[ ]*62 7b 65 28 38 00 01[ ]+vinserti32x4 \$(0x)?1,\(%r16\),%ymm3,%ymm8
[ ]*[a-f0-9]+:[ ]*62 db fd 08 09 30 01[ ]+vrndscalepd \$0x1,\(%r24\),%xmm6
[ ]*[a-f0-9]+:[ ]*62 db 7d 08 08 30 02[ ]+vrndscaleps \$0x2,\(%r24\),%xmm6
[ ]*[a-f0-9]+:[ ]*62 db cd 08 0b 18 03[ ]+vrndscalesd \$0x3,\(%r24\),%xmm6,%xmm3
diff -rupN binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s
--- binutils.orig/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s 2024-02-12 15:55:20.792572349 +0000
+++ binutils-2.41/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s 2024-02-12 15:56:07.356601129 +0000
@@ -152,6 +152,12 @@ _start:
tileloadd 0x123(%r31,%rax,4),%tmm6
tileloaddt1 0x123(%r31,%rax,4),%tmm6
tilestored %tmm6,0x123(%r31,%rax,4)
+ vbroadcastf128 (%r16),%ymm3
+ vbroadcasti128 (%r16),%ymm3
+ vextractf128 $1,%ymm3,(%r16)
+ vextracti128 $1,%ymm3,(%r16)
+ vinsertf128 $1,(%r16),%ymm3,%ymm8
+ vinserti128 $1,(%r16),%ymm3,%ymm8
vroundpd $1,(%r24),%xmm6
vroundps $2,(%r24),%xmm6
vroundsd $3,(%r24),%xmm6,%xmm3

540
SOURCES/binutils-Intel-APX-part-1-supplimental.patch
Unescape View File

@ -0,0 +1,540 @@
diff -rupN binutils.orig/gold/testsuite/x86_64_ie_to_le.s binutils-2.41/gold/testsuite/x86_64_ie_to_le.s
--- binutils.orig/gold/testsuite/x86_64_ie_to_le.s 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.41/gold/testsuite/x86_64_ie_to_le.s 2024-07-01 15:47:30.204856624 +0100
@@ -0,0 +1,17 @@
+ .text
+ .p2align 4
+ .globl _start
+ .type _start, @function
+_start:
+ addq foo@gottpoff(%rip), %r12
+ movq foo@gottpoff(%rip), %rax
+ addq foo@gottpoff(%rip), %r16
+ movq foo@gottpoff(%rip), %r20
+ .size _start, .-_start
+ .section .tdata,"awT",@progbits
+ .align 4
+ .type foo, @object
+ .size foo, 4
+foo:
+ .long 30
+ .section .note.GNU-stack,"",@progbits
diff -rupN binutils.orig/gold/testsuite/x86_64_ie_to_le.sh binutils-2.41/gold/testsuite/x86_64_ie_to_le.sh
--- binutils.orig/gold/testsuite/x86_64_ie_to_le.sh 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.41/gold/testsuite/x86_64_ie_to_le.sh 2024-07-01 15:47:30.204856624 +0100
@@ -0,0 +1,29 @@
+#!/bin/sh
+
+# x86_64_ie_to_le.sh -- a test for IE -> LE conversion.
+
+# Copyright (C) 2023 Free Software Foundation, Inc.
+
+# This file is part of gold.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+# MA 02110-1301, USA.
+
+set -e
+
+grep -q "add[ \t]\+\$0x[a-f0-9]\+,%r12" x86_64_ie_to_le.stdout
+grep -q "mov[ \t]\+\$0x[a-f0-9]\+,%rax" x86_64_ie_to_le.stdout
+grep -q "add[ \t]\+\$0x[a-f0-9]\+,%r16" x86_64_ie_to_le.stdout
+grep -q "mov[ \t]\+\$0x[a-f0-9]\+,%r20" x86_64_ie_to_le.stdout
diff -rupN binutils.orig/ld/NEWS binutils-2.41/ld/NEWS
--- binutils.orig/ld/NEWS 2024-07-01 15:14:02.065309252 +0100
+++ binutils-2.41/ld/NEWS 2024-07-01 15:57:53.858506649 +0100
@@ -3,6 +3,8 @@
* Add --section-ordering-file <FILE> option to add extra mapping of input
sections to output sections.
+* Support Intel APX relocations.
+
* On RISC-V, add ld target option --[no-]check-uleb128. Should rebuild the
objects by binutils 2.42 and up if enabling the option and get warnings,
since the non-zero addend of SUB_ULEB128 shouldn't be generated from .uleb128
diff -rupN binutils.orig/ld/testsuite/ld-x86-64/apx-load1.s binutils-2.41/ld/testsuite/ld-x86-64/apx-load1.s
--- binutils.orig/ld/testsuite/ld-x86-64/apx-load1.s 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.41/ld/testsuite/ld-x86-64/apx-load1.s 2024-07-01 15:45:59.396610481 +0100
@@ -0,0 +1,51 @@
+ .data
+ .type bar, @object
+bar:
+ .byte 1
+ .size bar, .-bar
+ .globl foo
+ .type foo, @object
+foo:
+ .byte 1
+ .size foo, .-foo
+ .text
+ .globl _start
+ .type _start, @function
+_start:
+ adcl bar@GOTPCREL(%rip), %r16d
+ addl bar@GOTPCREL(%rip), %r17d
+ andl bar@GOTPCREL(%rip), %r18d
+ cmpl bar@GOTPCREL(%rip), %r19d
+ orl bar@GOTPCREL(%rip), %r20d
+ sbbl bar@GOTPCREL(%rip), %r21d
+ subl bar@GOTPCREL(%rip), %r22d
+ xorl bar@GOTPCREL(%rip), %r23d
+ testl %r24d, bar@GOTPCREL(%rip)
+ adcq bar@GOTPCREL(%rip), %r16
+ addq bar@GOTPCREL(%rip), %r17
+ andq bar@GOTPCREL(%rip), %r18
+ cmpq bar@GOTPCREL(%rip), %r19
+ orq bar@GOTPCREL(%rip), %r20
+ sbbq bar@GOTPCREL(%rip), %r21
+ subq bar@GOTPCREL(%rip), %r22
+ xorq bar@GOTPCREL(%rip), %r23
+ testq %r24, bar@GOTPCREL(%rip)
+ adcl foo@GOTPCREL(%rip), %r16d
+ addl foo@GOTPCREL(%rip), %r17d
+ andl foo@GOTPCREL(%rip), %r18d
+ cmpl foo@GOTPCREL(%rip), %r19d
+ orl foo@GOTPCREL(%rip), %r20d
+ sbbl foo@GOTPCREL(%rip), %r21d
+ subl foo@GOTPCREL(%rip), %r22d
+ xorl foo@GOTPCREL(%rip), %r23d
+ testl %r24d, foo@GOTPCREL(%rip)
+ adcq foo@GOTPCREL(%rip), %r16
+ addq foo@GOTPCREL(%rip), %r17
+ andq foo@GOTPCREL(%rip), %r18
+ cmpq foo@GOTPCREL(%rip), %r19
+ orq foo@GOTPCREL(%rip), %r20
+ sbbq foo@GOTPCREL(%rip), %r21
+ subq foo@GOTPCREL(%rip), %r22
+ xorq foo@GOTPCREL(%rip), %r23
+ testq %r24, foo@GOTPCREL(%rip)
+ .size _start, .-_start
diff -rupN binutils.orig/ld/testsuite/ld-x86-64/apx-load1a.d binutils-2.41/ld/testsuite/ld-x86-64/apx-load1a.d
--- binutils.orig/ld/testsuite/ld-x86-64/apx-load1a.d 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.41/ld/testsuite/ld-x86-64/apx-load1a.d 2024-07-01 15:45:59.396610481 +0100
@@ -0,0 +1,54 @@
+#source: apx-load1.s
+#as: --64 -mrelax-relocations=yes
+#ld: -melf_x86_64 -z max-page-size=0x200000 -z noseparate-code
+#objdump: -dw --sym
+
+.*: +file format .*
+
+SYMBOL TABLE:
+#...
+0+6001d0 l O .data 0+1 bar
+#...
+0+6001d1 g O .data 0+1 foo
+#...
+
+Disassembly of section .text:
+
+0+4000b0 <_start>:
+ +[a-f0-9]+: d5 10 81 d0 d0 01 60 00 adc \$0x6001d0,%r16d
+ +[a-f0-9]+: d5 10 81 c1 d0 01 60 00 add \$0x6001d0,%r17d
+ +[a-f0-9]+: d5 10 81 e2 d0 01 60 00 and \$0x6001d0,%r18d
+ +[a-f0-9]+: d5 10 81 fb d0 01 60 00 cmp \$0x6001d0,%r19d
+ +[a-f0-9]+: d5 10 81 cc d0 01 60 00 or \$0x6001d0,%r20d
+ +[a-f0-9]+: d5 10 81 dd d0 01 60 00 sbb \$0x6001d0,%r21d
+ +[a-f0-9]+: d5 10 81 ee d0 01 60 00 sub \$0x6001d0,%r22d
+ +[a-f0-9]+: d5 10 81 f7 d0 01 60 00 xor \$0x6001d0,%r23d
+ +[a-f0-9]+: d5 11 f7 c0 d0 01 60 00 test \$0x6001d0,%r24d
+ +[a-f0-9]+: d5 18 81 d0 d0 01 60 00 adc \$0x6001d0,%r16
+ +[a-f0-9]+: d5 18 81 c1 d0 01 60 00 add \$0x6001d0,%r17
+ +[a-f0-9]+: d5 18 81 e2 d0 01 60 00 and \$0x6001d0,%r18
+ +[a-f0-9]+: d5 18 81 fb d0 01 60 00 cmp \$0x6001d0,%r19
+ +[a-f0-9]+: d5 18 81 cc d0 01 60 00 or \$0x6001d0,%r20
+ +[a-f0-9]+: d5 18 81 dd d0 01 60 00 sbb \$0x6001d0,%r21
+ +[a-f0-9]+: d5 18 81 ee d0 01 60 00 sub \$0x6001d0,%r22
+ +[a-f0-9]+: d5 18 81 f7 d0 01 60 00 xor \$0x6001d0,%r23
+ +[a-f0-9]+: d5 19 f7 c0 d0 01 60 00 test \$0x6001d0,%r24
+ +[a-f0-9]+: d5 10 81 d0 d1 01 60 00 adc \$0x6001d1,%r16d
+ +[a-f0-9]+: d5 10 81 c1 d1 01 60 00 add \$0x6001d1,%r17d
+ +[a-f0-9]+: d5 10 81 e2 d1 01 60 00 and \$0x6001d1,%r18d
+ +[a-f0-9]+: d5 10 81 fb d1 01 60 00 cmp \$0x6001d1,%r19d
+ +[a-f0-9]+: d5 10 81 cc d1 01 60 00 or \$0x6001d1,%r20d
+ +[a-f0-9]+: d5 10 81 dd d1 01 60 00 sbb \$0x6001d1,%r21d
+ +[a-f0-9]+: d5 10 81 ee d1 01 60 00 sub \$0x6001d1,%r22d
+ +[a-f0-9]+: d5 10 81 f7 d1 01 60 00 xor \$0x6001d1,%r23d
+ +[a-f0-9]+: d5 11 f7 c0 d1 01 60 00 test \$0x6001d1,%r24d
+ +[a-f0-9]+: d5 18 81 d0 d1 01 60 00 adc \$0x6001d1,%r16
+ +[a-f0-9]+: d5 18 81 c1 d1 01 60 00 add \$0x6001d1,%r17
+ +[a-f0-9]+: d5 18 81 e2 d1 01 60 00 and \$0x6001d1,%r18
+ +[a-f0-9]+: d5 18 81 fb d1 01 60 00 cmp \$0x6001d1,%r19
+ +[a-f0-9]+: d5 18 81 cc d1 01 60 00 or \$0x6001d1,%r20
+ +[a-f0-9]+: d5 18 81 dd d1 01 60 00 sbb \$0x6001d1,%r21
+ +[a-f0-9]+: d5 18 81 ee d1 01 60 00 sub \$0x6001d1,%r22
+ +[a-f0-9]+: d5 18 81 f7 d1 01 60 00 xor \$0x6001d1,%r23
+ +[a-f0-9]+: d5 19 f7 c0 d1 01 60 00 test \$0x6001d1,%r24
+#pass
diff -rupN binutils.orig/ld/testsuite/ld-x86-64/apx-load1b.d binutils-2.41/ld/testsuite/ld-x86-64/apx-load1b.d
--- binutils.orig/ld/testsuite/ld-x86-64/apx-load1b.d 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.41/ld/testsuite/ld-x86-64/apx-load1b.d 2024-07-01 15:45:59.396610481 +0100
@@ -0,0 +1,55 @@
+#source: apx-load1.s
+#as: --x32 -mrelax-relocations=yes
+#ld: -melf32_x86_64 -z max-page-size=0x200000 -z noseparate-code
+#objdump: -dw --sym
+
+.*: +file format .*
+
+SYMBOL TABLE:
+#...
+0+600194 l O .data 0+1 bar
+#...
+0+600195 g O .data 0+1 foo
+#...
+
+
+Disassembly of section .text:
+
+0+400074 <_start>:
+ +[a-f0-9]+: d5 10 81 d0 94 01 60 00 adc \$0x600194,%r16d
+ +[a-f0-9]+: d5 10 81 c1 94 01 60 00 add \$0x600194,%r17d
+ +[a-f0-9]+: d5 10 81 e2 94 01 60 00 and \$0x600194,%r18d
+ +[a-f0-9]+: d5 10 81 fb 94 01 60 00 cmp \$0x600194,%r19d
+ +[a-f0-9]+: d5 10 81 cc 94 01 60 00 or \$0x600194,%r20d
+ +[a-f0-9]+: d5 10 81 dd 94 01 60 00 sbb \$0x600194,%r21d
+ +[a-f0-9]+: d5 10 81 ee 94 01 60 00 sub \$0x600194,%r22d
+ +[a-f0-9]+: d5 10 81 f7 94 01 60 00 xor \$0x600194,%r23d
+ +[a-f0-9]+: d5 11 f7 c0 94 01 60 00 test \$0x600194,%r24d
+ +[a-f0-9]+: d5 18 81 d0 94 01 60 00 adc \$0x600194,%r16
+ +[a-f0-9]+: d5 18 81 c1 94 01 60 00 add \$0x600194,%r17
+ +[a-f0-9]+: d5 18 81 e2 94 01 60 00 and \$0x600194,%r18
+ +[a-f0-9]+: d5 18 81 fb 94 01 60 00 cmp \$0x600194,%r19
+ +[a-f0-9]+: d5 18 81 cc 94 01 60 00 or \$0x600194,%r20
+ +[a-f0-9]+: d5 18 81 dd 94 01 60 00 sbb \$0x600194,%r21
+ +[a-f0-9]+: d5 18 81 ee 94 01 60 00 sub \$0x600194,%r22
+ +[a-f0-9]+: d5 18 81 f7 94 01 60 00 xor \$0x600194,%r23
+ +[a-f0-9]+: d5 19 f7 c0 94 01 60 00 test \$0x600194,%r24
+ +[a-f0-9]+: d5 10 81 d0 95 01 60 00 adc \$0x600195,%r16d
+ +[a-f0-9]+: d5 10 81 c1 95 01 60 00 add \$0x600195,%r17d
+ +[a-f0-9]+: d5 10 81 e2 95 01 60 00 and \$0x600195,%r18d
+ +[a-f0-9]+: d5 10 81 fb 95 01 60 00 cmp \$0x600195,%r19d
+ +[a-f0-9]+: d5 10 81 cc 95 01 60 00 or \$0x600195,%r20d
+ +[a-f0-9]+: d5 10 81 dd 95 01 60 00 sbb \$0x600195,%r21d
+ +[a-f0-9]+: d5 10 81 ee 95 01 60 00 sub \$0x600195,%r22d
+ +[a-f0-9]+: d5 10 81 f7 95 01 60 00 xor \$0x600195,%r23d
+ +[a-f0-9]+: d5 11 f7 c0 95 01 60 00 test \$0x600195,%r24d
+ +[a-f0-9]+: d5 18 81 d0 95 01 60 00 adc \$0x600195,%r16
+ +[a-f0-9]+: d5 18 81 c1 95 01 60 00 add \$0x600195,%r17
+ +[a-f0-9]+: d5 18 81 e2 95 01 60 00 and \$0x600195,%r18
+ +[a-f0-9]+: d5 18 81 fb 95 01 60 00 cmp \$0x600195,%r19
+ +[a-f0-9]+: d5 18 81 cc 95 01 60 00 or \$0x600195,%r20
+ +[a-f0-9]+: d5 18 81 dd 95 01 60 00 sbb \$0x600195,%r21
+ +[a-f0-9]+: d5 18 81 ee 95 01 60 00 sub \$0x600195,%r22
+ +[a-f0-9]+: d5 18 81 f7 95 01 60 00 xor \$0x600195,%r23
+ +[a-f0-9]+: d5 19 f7 c0 95 01 60 00 test \$0x600195,%r24
+#pass
diff -rupN binutils.orig/ld/testsuite/ld-x86-64/apx-load1c.d binutils-2.41/ld/testsuite/ld-x86-64/apx-load1c.d
--- binutils.orig/ld/testsuite/ld-x86-64/apx-load1c.d 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.41/ld/testsuite/ld-x86-64/apx-load1c.d 2024-07-01 15:45:59.397610484 +0100
@@ -0,0 +1,47 @@
+#source: apx-load1.s
+#as: --64
+#ld: -shared -melf_x86_64 --hash-style=sysv -z max-page-size=0x200000 -z noseparate-code $NO_DT_RELR_LDFLAGS
+#objdump: -dw
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+188 <_start>:
+ +[a-f0-9]+: d5 40 13 05 f8 01 20 00 adc 0x2001f8\(%rip\),%r16d # 200388 <.*>
+ +[a-f0-9]+: d5 40 03 0d f0 01 20 00 add 0x2001f0\(%rip\),%r17d # 200388 <.*>
+ +[a-f0-9]+: d5 40 23 15 e8 01 20 00 and 0x2001e8\(%rip\),%r18d # 200388 <.*>
+ +[a-f0-9]+: d5 40 3b 1d e0 01 20 00 cmp 0x2001e0\(%rip\),%r19d # 200388 <.*>
+ +[a-f0-9]+: d5 40 0b 25 d8 01 20 00 or 0x2001d8\(%rip\),%r20d # 200388 <.*>
+ +[a-f0-9]+: d5 40 1b 2d d0 01 20 00 sbb 0x2001d0\(%rip\),%r21d # 200388 <.*>
+ +[a-f0-9]+: d5 40 2b 35 c8 01 20 00 sub 0x2001c8\(%rip\),%r22d # 200388 <.*>
+ +[a-f0-9]+: d5 40 33 3d c0 01 20 00 xor 0x2001c0\(%rip\),%r23d # 200388 <.*>
+ +[a-f0-9]+: d5 44 85 05 b8 01 20 00 test %r24d,0x2001b8\(%rip\) # 200388 <.*>
+ +[a-f0-9]+: d5 48 13 05 b0 01 20 00 adc 0x2001b0\(%rip\),%r16 # 200388 <.*>
+ +[a-f0-9]+: d5 48 03 0d a8 01 20 00 add 0x2001a8\(%rip\),%r17 # 200388 <.*>
+ +[a-f0-9]+: d5 48 23 15 a0 01 20 00 and 0x2001a0\(%rip\),%r18 # 200388 <.*>
+ +[a-f0-9]+: d5 48 3b 1d 98 01 20 00 cmp 0x200198\(%rip\),%r19 # 200388 <.*>
+ +[a-f0-9]+: d5 48 0b 25 90 01 20 00 or 0x200190\(%rip\),%r20 # 200388 <.*>
+ +[a-f0-9]+: d5 48 1b 2d 88 01 20 00 sbb 0x200188\(%rip\),%r21 # 200388 <.*>
+ +[a-f0-9]+: d5 48 2b 35 80 01 20 00 sub 0x200180\(%rip\),%r22 # 200388 <.*>
+ +[a-f0-9]+: d5 48 33 3d 78 01 20 00 xor 0x200178\(%rip\),%r23 # 200388 <.*>
+ +[a-f0-9]+: d5 4c 85 05 70 01 20 00 test %r24,0x200170\(%rip\) # 200388 <.*>
+ +[a-f0-9]+: d5 40 13 05 70 01 20 00 adc 0x200170\(%rip\),%r16d # 200390 <.*>
+ +[a-f0-9]+: d5 40 03 0d 68 01 20 00 add 0x200168\(%rip\),%r17d # 200390 <.*>
+ +[a-f0-9]+: d5 40 23 15 60 01 20 00 and 0x200160\(%rip\),%r18d # 200390 <.*>
+ +[a-f0-9]+: d5 40 3b 1d 58 01 20 00 cmp 0x200158\(%rip\),%r19d # 200390 <.*>
+ +[a-f0-9]+: d5 40 0b 25 50 01 20 00 or 0x200150\(%rip\),%r20d # 200390 <.*>
+ +[a-f0-9]+: d5 40 1b 2d 48 01 20 00 sbb 0x200148\(%rip\),%r21d # 200390 <.*>
+ +[a-f0-9]+: d5 40 2b 35 40 01 20 00 sub 0x200140\(%rip\),%r22d # 200390 <.*>
+ +[a-f0-9]+: d5 40 33 3d 38 01 20 00 xor 0x200138\(%rip\),%r23d # 200390 <.*>
+ +[a-f0-9]+: d5 44 85 05 30 01 20 00 test %r24d,0x200130\(%rip\) # 200390 <.*>
+ +[a-f0-9]+: d5 48 13 05 28 01 20 00 adc 0x200128\(%rip\),%r16 # 200390 <.*>
+ +[a-f0-9]+: d5 48 03 0d 20 01 20 00 add 0x200120\(%rip\),%r17 # 200390 <.*>
+ +[a-f0-9]+: d5 48 23 15 18 01 20 00 and 0x200118\(%rip\),%r18 # 200390 <.*>
+ +[a-f0-9]+: d5 48 3b 1d 10 01 20 00 cmp 0x200110\(%rip\),%r19 # 200390 <.*>
+ +[a-f0-9]+: d5 48 0b 25 08 01 20 00 or 0x200108\(%rip\),%r20 # 200390 <.*>
+ +[a-f0-9]+: d5 48 1b 2d 00 01 20 00 sbb 0x200100\(%rip\),%r21 # 200390 <.*>
+ +[a-f0-9]+: d5 48 2b 35 f8 00 20 00 sub 0x2000f8\(%rip\),%r22 # 200390 <.*>
+ +[a-f0-9]+: d5 48 33 3d f0 00 20 00 xor 0x2000f0\(%rip\),%r23 # 200390 <.*>
+ +[a-f0-9]+: d5 4c 85 05 e8 00 20 00 test %r24,0x2000e8\(%rip\) # 200390 <.*>
+#pass
diff -rupN binutils.orig/ld/testsuite/ld-x86-64/apx-load1d.d binutils-2.41/ld/testsuite/ld-x86-64/apx-load1d.d
--- binutils.orig/ld/testsuite/ld-x86-64/apx-load1d.d 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.41/ld/testsuite/ld-x86-64/apx-load1d.d 2024-07-01 15:45:59.397610484 +0100
@@ -0,0 +1,47 @@
+#source: apx-load1.s
+#as: --x32
+#ld: -shared -melf32_x86_64 --hash-style=sysv -z max-page-size=0x200000 -z noseparate-code $NO_DT_RELR_LDFLAGS
+#objdump: -dw
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+100 <_start>:
+ +[a-f0-9]+: d5 40 13 05 88 01 20 00 adc 0x200188\(%rip\),%r16d # 200290 <.*>
+ +[a-f0-9]+: d5 40 03 0d 80 01 20 00 add 0x200180\(%rip\),%r17d # 200290 <.*>
+ +[a-f0-9]+: d5 40 23 15 78 01 20 00 and 0x200178\(%rip\),%r18d # 200290 <.*>
+ +[a-f0-9]+: d5 40 3b 1d 70 01 20 00 cmp 0x200170\(%rip\),%r19d # 200290 <.*>
+ +[a-f0-9]+: d5 40 0b 25 68 01 20 00 or 0x200168\(%rip\),%r20d # 200290 <.*>
+ +[a-f0-9]+: d5 40 1b 2d 60 01 20 00 sbb 0x200160\(%rip\),%r21d # 200290 <.*>
+ +[a-f0-9]+: d5 40 2b 35 58 01 20 00 sub 0x200158\(%rip\),%r22d # 200290 <.*>
+ +[a-f0-9]+: d5 40 33 3d 50 01 20 00 xor 0x200150\(%rip\),%r23d # 200290 <.*>
+ +[a-f0-9]+: d5 44 85 05 48 01 20 00 test %r24d,0x200148\(%rip\) # 200290 <.*>
+ +[a-f0-9]+: d5 48 13 05 40 01 20 00 adc 0x200140\(%rip\),%r16 # 200290 <.*>
+ +[a-f0-9]+: d5 48 03 0d 38 01 20 00 add 0x200138\(%rip\),%r17 # 200290 <.*>
+ +[a-f0-9]+: d5 48 23 15 30 01 20 00 and 0x200130\(%rip\),%r18 # 200290 <.*>
+ +[a-f0-9]+: d5 48 3b 1d 28 01 20 00 cmp 0x200128\(%rip\),%r19 # 200290 <.*>
+ +[a-f0-9]+: d5 48 0b 25 20 01 20 00 or 0x200120\(%rip\),%r20 # 200290 <.*>
+ +[a-f0-9]+: d5 48 1b 2d 18 01 20 00 sbb 0x200118\(%rip\),%r21 # 200290 <.*>
+ +[a-f0-9]+: d5 48 2b 35 10 01 20 00 sub 0x200110\(%rip\),%r22 # 200290 <.*>
+ +[a-f0-9]+: d5 48 33 3d 08 01 20 00 xor 0x200108\(%rip\),%r23 # 200290 <.*>
+ +[a-f0-9]+: d5 4c 85 05 00 01 20 00 test %r24,0x200100\(%rip\) # 200290 <.*>
+ +[a-f0-9]+: d5 40 13 05 00 01 20 00 adc 0x200100\(%rip\),%r16d # 200298 <.*>
+ +[a-f0-9]+: d5 40 03 0d f8 00 20 00 add 0x2000f8\(%rip\),%r17d # 200298 <.*>
+ +[a-f0-9]+: d5 40 23 15 f0 00 20 00 and 0x2000f0\(%rip\),%r18d # 200298 <.*>
+ +[a-f0-9]+: d5 40 3b 1d e8 00 20 00 cmp 0x2000e8\(%rip\),%r19d # 200298 <.*>
+ +[a-f0-9]+: d5 40 0b 25 e0 00 20 00 or 0x2000e0\(%rip\),%r20d # 200298 <.*>
+ +[a-f0-9]+: d5 40 1b 2d d8 00 20 00 sbb 0x2000d8\(%rip\),%r21d # 200298 <.*>
+ +[a-f0-9]+: d5 40 2b 35 d0 00 20 00 sub 0x2000d0\(%rip\),%r22d # 200298 <.*>
+ +[a-f0-9]+: d5 40 33 3d c8 00 20 00 xor 0x2000c8\(%rip\),%r23d # 200298 <.*>
+ +[a-f0-9]+: d5 44 85 05 c0 00 20 00 test %r24d,0x2000c0\(%rip\) # 200298 <.*>
+ +[a-f0-9]+: d5 48 13 05 b8 00 20 00 adc 0x2000b8\(%rip\),%r16 # 200298 <.*>
+ +[a-f0-9]+: d5 48 03 0d b0 00 20 00 add 0x2000b0\(%rip\),%r17 # 200298 <.*>
+ +[a-f0-9]+: d5 48 23 15 a8 00 20 00 and 0x2000a8\(%rip\),%r18 # 200298 <.*>
+ +[a-f0-9]+: d5 48 3b 1d a0 00 20 00 cmp 0x2000a0\(%rip\),%r19 # 200298 <.*>
+ +[a-f0-9]+: d5 48 0b 25 98 00 20 00 or 0x200098\(%rip\),%r20 # 200298 <.*>
+ +[a-f0-9]+: d5 48 1b 2d 90 00 20 00 sbb 0x200090\(%rip\),%r21 # 200298 <.*>
+ +[a-f0-9]+: d5 48 2b 35 88 00 20 00 sub 0x200088\(%rip\),%r22 # 200298 <.*>
+ +[a-f0-9]+: d5 48 33 3d 80 00 20 00 xor 0x200080\(%rip\),%r23 # 200298 <.*>
+ +[a-f0-9]+: d5 4c 85 05 78 00 20 00 test %r24,0x200078\(%rip\) # 200298 <.*>
+#pass
diff -rupN binutils.orig/ld/testsuite/ld-x86-64/tlsbindesc.dd binutils-2.41/ld/testsuite/ld-x86-64/tlsbindesc.dd
--- binutils.orig/ld/testsuite/ld-x86-64/tlsbindesc.dd 2024-07-01 15:14:02.056309227 +0100
+++ binutils-2.41/ld/testsuite/ld-x86-64/tlsbindesc.dd 2024-07-01 15:47:08.955799034 +0100
@@ -165,6 +165,55 @@ Disassembly of section .text:
+[0-9a-f]+: 90[ ]+nop *
+[0-9a-f]+: c9[ ]+leave *
+[0-9a-f]+: c3[ ]+ret *
+# IE against global var
+ +[0-9a-f]+: d5 48 03 05 ([0-9a-f]{2} ){3}[ ]+add 0x[0-9a-f]+\(%rip\),%r16 +# [0-9a-f]+ <sG2>
+# -> R_X86_64_TPOFF64 sG2
+ +[0-9a-f]+: 00 *
+# IE -> LE against global var defined in exec
+ +[0-9a-f]+: d5 18 81 c1 60 ff ff[ ]+add \$0xf+60,%r17
+# sg1
+ +[0-9a-f]+: ff *
+# IE -> LE against local var
+ +[0-9a-f]+: d5 18 81 c2 80 ff ff[ ]+add \$0xf+80,%r18
+# sl1
+ +[0-9a-f]+: ff *
+# IE -> LE against hidden var
+ +[0-9a-f]+: d5 18 81 c3 a0 ff ff[ ]+add \$0xf+a0,%r19
+# sh1
+ +[0-9a-f]+: ff *
+# Direct access through %fs
+# IE against global var
+ +[0-9a-f]+: d5 48 8b 25 ([0-9a-f]{2} ){3}[ ]+mov 0x[0-9a-f]+\(%rip\),%r20 +# [0-9a-f]+ <sG5>
+# -> R_X86_64_TPOFF64 sG5
+ +[0-9a-f]+: 00 *
+# IE->LE against local var
+ +[0-9a-f]+: d5 18 c7 c5 90 ff ff[ ]+mov \$0xf+90,%r21
+# sl5
+ +[0-9a-f]+: ff *
+# IE->LE against hidden var
+ +[0-9a-f]+: d5 18 c7 c6 b0 ff ff[ ]+mov \$0xf+b0,%r22
+ +[0-9a-f]+: ff *
+# GD -> IE because variable is not defined in executable
+ +[0-9a-f]+: d5 48 8b 05 ([0-9a-f]{2} ){3}[ ]+mov 0x[0-9a-f]+\(%rip\),%r16 +# [0-9a-f]+ <sG1>
+# -> R_X86_64_TPOFF64 sG1
+ +[0-9a-f]+: 00 *
+# GD -> IE because variable is not defined in executable where
+# the variable is referenced through IE too
+ +[0-9a-f]+: d5 48 8b 0d ([0-9a-f]{2} ){3}[ ]+mov 0x[0-9a-f]+\(%rip\),%r17 +# [0-9a-f]+ <sG2>
+# -> R_X86_64_TPOFF64 sG2
+ +[0-9a-f]+: 00 *
+# GD -> LE with global variable defined in executable
+ +[0-9a-f]+: d5 18 c7 c2 60 ff ff[ ]+mov \$0xf+60,%r18
+# sg1
+ +[0-9a-f]+: ff *
+# GD -> LE with local variable defined in executable
+ +[0-9a-f]+: d5 18 c7 c3 80 ff ff[ ]+mov \$0xf+80,%r19
+# sl1
+ +[0-9a-f]+: ff *
+# GD -> LE with hidden variable defined in executable
+ +[0-9a-f]+: d5 18 c7 c4 a0 ff ff[ ]+mov \$0xf+a0,%r20
+# sh1
+ +[0-9a-f]+: ff *
[0-9a-f]+ <_start>:
+[0-9a-f]+: 55[ ]+push %rbp
diff -rupN binutils.orig/ld/testsuite/ld-x86-64/tlsbindesc.rd binutils-2.41/ld/testsuite/ld-x86-64/tlsbindesc.rd
--- binutils.orig/ld/testsuite/ld-x86-64/tlsbindesc.rd 2024-07-01 15:14:02.056309227 +0100
+++ binutils-2.41/ld/testsuite/ld-x86-64/tlsbindesc.rd 2024-07-01 15:47:08.956799037 +0100
@@ -15,12 +15,12 @@ Section Headers:
+\[[ 0-9]+\] .dynsym +.*
+\[[ 0-9]+\] .dynstr +.*
+\[[ 0-9]+\] .rela.dyn +.*
- +\[[ 0-9]+\] .text +PROGBITS +0+401000 0+1000 0+1fd 00 +AX +0 +0 +4096
- +\[[ 0-9]+\] .tdata +PROGBITS +0+6011fd 0+11fd 0+60 00 WAT +0 +0 +1
- +\[[ 0-9]+\] .tbss +NOBITS +0+60125d 0+125d 0+40 00 WAT +0 +0 +1
- +\[[ 0-9]+\] .dynamic +DYNAMIC +0+601260 0+1260 0+100 10 +WA +4 +0 +8
- +\[[ 0-9]+\] .got +PROGBITS +0+601360 0+1360 0+20 08 +WA +0 +0 +8
- +\[[ 0-9]+\] .got.plt +PROGBITS +0+601380 0+1380 0+18 08 +WA +0 +0 +8
+ +\[[ 0-9]+\] .text +PROGBITS +0+401000 0+1000 0+25d 00 +AX +0 +0 +4096
+ +\[[ 0-9]+\] .tdata +PROGBITS +0+60125d 0+125d 0+60 00 WAT +0 +0 +1
+ +\[[ 0-9]+\] .tbss +NOBITS +0+6012bd 0+12bd 0+40 00 WAT +0 +0 +1
+ +\[[ 0-9]+\] .dynamic +DYNAMIC +0+6012c0 0+12c0 0+100 10 +WA +4 +0 +8
+ +\[[ 0-9]+\] .got +PROGBITS +0+6013c0 0+13c0 0+20 08 +WA +0 +0 +8
+ +\[[ 0-9]+\] .got.plt +PROGBITS +0+6013e0 0+13e0 0+18 08 +WA +0 +0 +8
+\[[ 0-9]+\] .symtab +.*
+\[[ 0-9]+\] .strtab +.*
+\[[ 0-9]+\] .shstrtab +.*
@@ -28,7 +28,7 @@ Key to Flags:
#...
Elf file type is EXEC \(Executable file\)
-Entry point 0x401105
+Entry point 0x401165
There are [0-9]+ program headers, starting at offset [0-9]+
Program Headers:
@@ -36,10 +36,10 @@ Program Headers:
+PHDR.*
+INTERP.*
.*Requesting program interpreter.*
- +LOAD +0x0+ 0x0+400000 0x0+400000 0x0+11fd 0x0+11fd R E 0x200000
- +LOAD +0x0+11fd 0x0+6011fd 0x0+6011fd 0x0+19b 0x0+19b RW +0x200000
- +DYNAMIC +0x0+1260 0x0+601260 0x0+601260 0x0+100 0x0+100 RW +0x8
- +TLS +0x0+11fd 0x0+6011fd 0x0+6011fd 0x0+60 0x0+a0 R +0x1
+ +LOAD +0x0+ 0x0+400000 0x0+400000 0x0+125d 0x0+125d R E 0x200000
+ +LOAD +0x0+125d 0x0+60125d 0x0+60125d 0x0+19b 0x0+19b RW +0x200000
+ +DYNAMIC +0x0+12c0 0x0+6012c0 0x0+6012c0 0x0+100 0x0+100 RW +0x8
+ +TLS +0x0+125d 0x0+60125d 0x0+60125d 0x0+60 0x0+a0 R +0x1
Section to Segment mapping:
+Segment Sections...
@@ -52,10 +52,10 @@ Program Headers:
Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 4 entries:
+Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
-0+601360 +0+100000012 R_X86_64_TPOFF64 +0+ sG5 \+ 0
-0+601368 +0+200000012 R_X86_64_TPOFF64 +0+ sG2 \+ 0
-0+601370 +0+300000012 R_X86_64_TPOFF64 +0+ sG6 \+ 0
-0+601378 +0+400000012 R_X86_64_TPOFF64 +0+ sG1 \+ 0
+0+6013c0 +0+100000012 R_X86_64_TPOFF64 +0+ sG5 \+ 0
+0+6013c8 +0+200000012 R_X86_64_TPOFF64 +0+ sG2 \+ 0
+0+6013d0 +0+300000012 R_X86_64_TPOFF64 +0+ sG6 \+ 0
+0+6013d8 +0+400000012 R_X86_64_TPOFF64 +0+ sG1 \+ 0
Symbol table '\.dynsym' contains [0-9]+ entries:
+Num: +Value +Size +Type +Bind +Vis +Ndx +Name
@@ -88,8 +88,8 @@ Symbol table '\.symtab' contains [0-9]+
+[0-9]+: 0+9c +0 +TLS +LOCAL +DEFAULT +8 bl8
.* FILE +LOCAL +DEFAULT +ABS
+[0-9]+: 0+a0 +0 +TLS +LOCAL +DEFAULT +7 _TLS_MODULE_BASE_
- +[0-9]+: 0+601260 +0 +OBJECT +LOCAL +DEFAULT +9 _DYNAMIC
- +[0-9]+: 0+601380 +0 +OBJECT +LOCAL +DEFAULT +11 _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: 0+6012c0 +0 +OBJECT +LOCAL +DEFAULT +9 _DYNAMIC
+ +[0-9]+: 0+6013e0 +0 +OBJECT +LOCAL +DEFAULT +11 _GLOBAL_OFFSET_TABLE_
+[0-9]+: 0+1c +0 +TLS +GLOBAL +DEFAULT +7 sg8
+[0-9]+: 0+7c +0 +TLS +GLOBAL +DEFAULT +8 bg8
+[0-9]+: 0+74 +0 +TLS +GLOBAL +DEFAULT +8 bg6
@@ -104,7 +104,7 @@ Symbol table '\.symtab' contains [0-9]+
+[0-9]+: 0+58 +0 +TLS +GLOBAL +HIDDEN +7 sh7
+[0-9]+: 0+5c +0 +TLS +GLOBAL +HIDDEN +7 sh8
+[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +7 sg1
- +[0-9]+: 0+401105 +0 +FUNC +GLOBAL +DEFAULT +6 _start
+ +[0-9]+: 0+401165 +0 +FUNC +GLOBAL +DEFAULT +6 _start
+[0-9]+: 0+4c +0 +TLS +GLOBAL +HIDDEN +7 sh4
+[0-9]+: 0+78 +0 +TLS +GLOBAL +DEFAULT +8 bg7
+[0-9]+: 0+50 +0 +TLS +GLOBAL +HIDDEN +7 sh5
diff -rupN binutils.orig/ld/testsuite/ld-x86-64/tlsbindesc.s binutils-2.41/ld/testsuite/ld-x86-64/tlsbindesc.s
--- binutils.orig/ld/testsuite/ld-x86-64/tlsbindesc.s 2024-07-01 15:14:02.056309227 +0100
+++ binutils-2.41/ld/testsuite/ld-x86-64/tlsbindesc.s 2024-07-01 15:47:08.956799037 +0100
@@ -126,3 +126,42 @@ fn2:
leave
ret
+
+ /* IE against global var */
+ addq sG2@gottpoff(%rip), %r16
+
+ /* IE -> LE against global var defined in exec */
+ addq sg1@gottpoff(%rip), %r17
+
+ /* IE -> LE against local var */
+ addq sl1@gottpoff(%rip), %r18
+
+ /* IE -> LE against hidden var */
+ addq sh1@gottpoff(%rip), %r19
+
+ /* Direct access through %fs */
+
+ /* IE against global var */
+ movq sG5@gottpoff(%rip), %r20
+
+ /* IE->LE against local var */
+ movq sl5@gottpoff(%rip), %r21
+
+ /* IE->LE against hidden var */
+ movq sh5@gottpoff(%rip), %r22
+
+ /* GD -> IE because variable is not defined in executable */
+ leaq sG1@tlsdesc(%rip), %r16
+
+ /* GD -> IE because variable is not defined in executable where
+ the variable is referenced through IE too */
+ leaq sG2@tlsdesc(%rip), %r17
+
+ /* GD -> LE with global variable defined in executable */
+ leaq sg1@tlsdesc(%rip), %r18
+
+ /* GD -> LE with local variable defined in executable */
+ leaq sl1@tlsdesc(%rip), %r19
+
+ /* GD -> LE with hidden variable defined in executable */
+ leaq sh1@tlsdesc(%rip), %r20
diff -rupN binutils.orig/ld/testsuite/ld-x86-64/x86-64.exp binutils-2.41/ld/testsuite/ld-x86-64/x86-64.exp
--- binutils.orig/ld/testsuite/ld-x86-64/x86-64.exp 2024-07-01 15:14:02.060309238 +0100
+++ binutils-2.41/ld/testsuite/ld-x86-64/x86-64.exp 2024-07-01 15:45:59.397610484 +0100
@@ -604,6 +604,10 @@ run_dump_test "load1a"
run_dump_test "load1b"
run_dump_test "load1c"
run_dump_test "load1d"
+run_dump_test "apx-load1a"
+run_dump_test "apx-load1b"
+run_dump_test "apx-load1c"
+run_dump_test "apx-load1d"
run_dump_test "load2"
run_dump_test "call1a"
run_dump_test "call1b"

117747
SOURCES/binutils-Intel-APX-part-1.patch
View File

File diff suppressed because it is too large Load Diff

3448
SOURCES/binutils-aarch64-RELR.patch
View File

File diff suppressed because it is too large Load Diff

139
SOURCES/binutils-aarch64-big-bti-programs.patch
Unescape View File

@ -0,0 +1,139 @@
diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index 4592bd6da27..4faf642b422 100644
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -3675,7 +3675,7 @@ group_sections (struct elf_aarch64_link_hash_table *htab,
/* True if the inserted stub does not break BTI compatibility. */
static bool
-aarch64_bti_stub_p (bfd *input_bfd,
+aarch64_bti_stub_p (struct bfd_link_info *info,
struct elf_aarch64_stub_hash_entry *stub_entry)
{
/* Stubs without indirect branch are BTI compatible. */
@@ -3685,12 +3685,22 @@ aarch64_bti_stub_p (bfd *input_bfd,
/* Return true if the target instruction is compatible with BR x16. */
+ struct elf_aarch64_link_hash_table *globals = elf_aarch64_hash_table (info);
asection *section = stub_entry->target_section;
bfd_byte loc[4];
file_ptr off = stub_entry->target_value;
bfd_size_type count = sizeof (loc);
- if (!bfd_get_section_contents (input_bfd, section, loc, off, count))
+ /* PLT code is not generated yet, so treat it specially.
+ Note: Checking elf_aarch64_obj_tdata.plt_type & PLT_BTI is not
+ enough because it only implies BTI in the PLT0 and tlsdesc PLT
+ entries. Normal PLT entries don't have BTI in a shared library
+ (because such PLT is normally not called indirectly and adding
+ the BTI when a stub targets a PLT would change the PLT layout
+ and it's too late for that here). */
+ if (section == globals->root.splt)
+ memcpy (loc, globals->plt_entry, count);
+ else if (!bfd_get_section_contents (section->owner, section, loc, off, count))
return false;
uint32_t insn = bfd_getl32 (loc);
@@ -4637,11 +4647,24 @@ _bfd_aarch64_add_call_stub_entries (bool *stub_changed, bfd *output_bfd,
/* A stub with indirect jump may break BTI compatibility, so
insert another stub with direct jump near the target then. */
- if (need_bti && !aarch64_bti_stub_p (input_bfd, stub_entry))
+ if (need_bti && !aarch64_bti_stub_p (info, stub_entry))
{
+ id_sec_bti = htab->stub_group[sym_sec->id].link_sec;
+
+ /* If the stub with indirect jump and the BTI stub are in
+ the same stub group: change the indirect jump stub into
+ a BTI stub since a direct branch can reach the target.
+ The BTI landing pad is still needed in case another
+ stub indirectly jumps to it. */
+ if (id_sec_bti == id_sec)
+ {
+ stub_entry->stub_type = aarch64_stub_bti_direct_branch;
+ goto skip_double_stub;
+ }
+
stub_entry->double_stub = true;
htab->has_double_stub = true;
- id_sec_bti = htab->stub_group[sym_sec->id].link_sec;
+
stub_name_bti =
elfNN_aarch64_stub_name (id_sec_bti, sym_sec, hash, irela);
if (!stub_name_bti)
@@ -4653,33 +4676,41 @@ _bfd_aarch64_add_call_stub_entries (bool *stub_changed, bfd *output_bfd,
stub_entry_bti =
aarch64_stub_hash_lookup (&htab->stub_hash_table,
stub_name_bti, false, false);
- if (stub_entry_bti == NULL)
- stub_entry_bti =
- _bfd_aarch64_add_stub_entry_in_group (stub_name_bti,
- sym_sec, htab);
- if (stub_entry_bti == NULL)
+ if (stub_entry_bti != NULL)
+ BFD_ASSERT (stub_entry_bti->stub_type
+ == aarch64_stub_bti_direct_branch);
+ else
{
- free (stub_name);
- free (stub_name_bti);
- goto error_ret_free_internal;
- }
-
- stub_entry_bti->target_value = sym_value + irela->r_addend;
- stub_entry_bti->target_section = sym_sec;
- stub_entry_bti->stub_type = aarch64_stub_bti_direct_branch;
- stub_entry_bti->h = hash;
- stub_entry_bti->st_type = st_type;
+ stub_entry_bti =
+ _bfd_aarch64_add_stub_entry_in_group (stub_name_bti,
+ sym_sec, htab);
+ if (stub_entry_bti == NULL)
+ {
+ free (stub_name);
+ free (stub_name_bti);
+ goto error_ret_free_internal;
+ }
- len = sizeof (BTI_STUB_ENTRY_NAME) + strlen (sym_name);
- stub_entry_bti->output_name = bfd_alloc (htab->stub_bfd, len);
- if (stub_entry_bti->output_name == NULL)
- {
- free (stub_name);
- free (stub_name_bti);
- goto error_ret_free_internal;
+ stub_entry_bti->target_value =
+ sym_value + irela->r_addend;
+ stub_entry_bti->target_section = sym_sec;
+ stub_entry_bti->stub_type =
+ aarch64_stub_bti_direct_branch;
+ stub_entry_bti->h = hash;
+ stub_entry_bti->st_type = st_type;
+
+ len = sizeof (BTI_STUB_ENTRY_NAME) + strlen (sym_name);
+ stub_entry_bti->output_name = bfd_alloc (htab->stub_bfd,
+ len);
+ if (stub_entry_bti->output_name == NULL)
+ {
+ free (stub_name);
+ free (stub_name_bti);
+ goto error_ret_free_internal;
+ }
+ snprintf (stub_entry_bti->output_name, len,
+ BTI_STUB_ENTRY_NAME, sym_name);
}
- snprintf (stub_entry_bti->output_name, len,
- BTI_STUB_ENTRY_NAME, sym_name);
/* Update the indirect call stub to target the BTI stub. */
stub_entry->target_value = 0;
@@ -4688,7 +4719,7 @@ _bfd_aarch64_add_call_stub_entries (bool *stub_changed, bfd *output_bfd,
stub_entry->h = NULL;
stub_entry->st_type = STT_FUNC;
}
-
+skip_double_stub:
*stub_changed = true;
}

11
SOURCES/binutils-autoconf-version.patch
Unescape View File

@ -0,0 +1,11 @@
--- binutils.orig/config/override.m4 2021-08-31 14:20:17.275574804 +0100
+++ binutils-2.37/config/override.m4 2021-08-31 14:36:37.793954247 +0100
@@ -41,7 +41,7 @@ dnl Or for updating the whole tree at on
AC_DEFUN([_GCC_AUTOCONF_VERSION_CHECK],
[m4_if(m4_defn([_GCC_AUTOCONF_VERSION]),
m4_defn([m4_PACKAGE_VERSION]), [],
- [m4_fatal([Please use exactly Autoconf ]_GCC_AUTOCONF_VERSION[ instead of ]m4_defn([m4_PACKAGE_VERSION])[.])])
+ [])
])
m4_define([AC_INIT], m4_defn([AC_INIT])[
_GCC_AUTOCONF_VERSION_CHECK

29
SOURCES/binutils-big-merge.patch
Unescape View File

@ -0,0 +1,29 @@
--- binutils.orig/bfd/merge.c 2023-11-07 09:49:56.923358543 +0000
+++ binutils-2.41/bfd/merge.c 2023-11-07 09:51:47.031552039 +0000
@@ -167,7 +167,7 @@ static bool
sec_merge_maybe_resize (struct sec_merge_hash *table, unsigned added)
{
struct bfd_hash_table *bfdtab = &table->table;
- if (bfdtab->count + added > table->nbuckets * 2 / 3)
+ if (bfdtab->count + added > table->nbuckets / 3 * 2)
{
unsigned i;
unsigned long newnb = table->nbuckets * 2;
@@ -175,7 +175,7 @@ sec_merge_maybe_resize (struct sec_merge
uint64_t *newl;
unsigned long alloc;
- while (bfdtab->count + added > newnb * 2 / 3)
+ while (bfdtab->count + added > newnb / 3 * 2)
{
newnb *= 2;
if (!newnb)
@@ -240,7 +240,7 @@ sec_merge_hash_insert (struct sec_merge_
hashp->u.suffix = NULL;
hashp->next = NULL;
// We must not need resizing, otherwise _index is wrong
- BFD_ASSERT (bfdtab->count + 1 <= table->nbuckets * 2 / 3);
+ BFD_ASSERT (bfdtab->count + 1 <= table->nbuckets / 3 * 2);
bfdtab->count++;
table->key_lens[_index] = (hash << 32) | (uint32_t)len;
table->values[_index] = hashp;

374
SOURCES/binutils-demangler-updates.patch
Unescape View File

@ -0,0 +1,374 @@
--- binutils.orig/include/demangle.h 2024-01-17 09:54:10.945686323 +0000
+++ binutils-2.41/include/demangle.h 2024-01-17 09:54:55.696760281 +0000
@@ -1,5 +1,5 @@
/* Defs for interface to demanglers.
- Copyright (C) 1992-2023 Free Software Foundation, Inc.
+ Copyright (C) 1992-2024 Free Software Foundation, Inc.
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU Library General Public License
@@ -448,6 +448,8 @@ enum demangle_component_type
DEMANGLE_COMPONENT_TRANSACTION_SAFE,
/* A cloned function. */
DEMANGLE_COMPONENT_CLONE,
+ /* A member-like friend function. */
+ DEMANGLE_COMPONENT_FRIEND,
DEMANGLE_COMPONENT_NOEXCEPT,
DEMANGLE_COMPONENT_THROW_SPEC,
@@ -464,6 +466,8 @@ enum demangle_component_type
DEMANGLE_COMPONENT_TEMPLATE_TEMPLATE_PARM,
DEMANGLE_COMPONENT_TEMPLATE_PACK_PARM,
+ DEMANGLE_COMPONENT_CONSTRAINTS,
+
/* A builtin type with argument. This holds the builtin type
information. */
DEMANGLE_COMPONENT_EXTENDED_BUILTIN_TYPE
diff -rup binutils.orig/libiberty/cp-demangle.c binutils-2.41/libiberty/cp-demangle.c
--- binutils.orig/libiberty/cp-demangle.c 2024-01-17 09:54:11.323686947 +0000
+++ binutils-2.41/libiberty/cp-demangle.c 2024-01-17 09:54:42.468738420 +0000
@@ -1,5 +1,5 @@
/* Demangler for g++ V3 ABI.
- Copyright (C) 2003-2023 Free Software Foundation, Inc.
+ Copyright (C) 2003-2024 Free Software Foundation, Inc.
Written by Ian Lance Taylor <ian@wasabisystems.com>.
This file is part of the libiberty library, which is part of GCC.
@@ -993,6 +993,7 @@ d_make_comp (struct d_info *di, enum dem
case DEMANGLE_COMPONENT_VECTOR_TYPE:
case DEMANGLE_COMPONENT_CLONE:
case DEMANGLE_COMPONENT_MODULE_ENTITY:
+ case DEMANGLE_COMPONENT_CONSTRAINTS:
if (left == NULL || right == NULL)
return NULL;
break;
@@ -1036,6 +1037,7 @@ d_make_comp (struct d_info *di, enum dem
case DEMANGLE_COMPONENT_TEMPLATE_NON_TYPE_PARM:
case DEMANGLE_COMPONENT_TEMPLATE_TEMPLATE_PARM:
case DEMANGLE_COMPONENT_TEMPLATE_PACK_PARM:
+ case DEMANGLE_COMPONENT_FRIEND:
if (left == NULL)
return NULL;
break;
@@ -1344,6 +1346,22 @@ is_ctor_dtor_or_conversion (struct deman
}
}
+/* [ Q <constraint-expression> ] */
+
+static struct demangle_component *
+d_maybe_constraints (struct d_info *di, struct demangle_component *dc)
+{
+ if (d_peek_char (di) == 'Q')
+ {
+ d_advance (di, 1);
+ struct demangle_component *expr = d_expression (di);
+ if (expr == NULL)
+ return NULL;
+ dc = d_make_comp (di, DEMANGLE_COMPONENT_CONSTRAINTS, dc, expr);
+ }
+ return dc;
+}
+
/* <encoding> ::= <(function) name> <bare-function-type>
::= <(data) name>
::= <special-name>
@@ -1397,21 +1415,21 @@ d_encoding (struct d_info *di, int top_l
struct demangle_component *ftype;
ftype = d_bare_function_type (di, has_return_type (dc));
- if (ftype)
- {
- /* If this is a non-top-level local-name, clear the
- return type, so it doesn't confuse the user by
- being confused with the return type of whaever
- this is nested within. */
- if (!top_level && dc->type == DEMANGLE_COMPONENT_LOCAL_NAME
- && ftype->type == DEMANGLE_COMPONENT_FUNCTION_TYPE)
- d_left (ftype) = NULL;
+ if (!ftype)
+ return NULL;
- dc = d_make_comp (di, DEMANGLE_COMPONENT_TYPED_NAME,
- dc, ftype);
- }
- else
- dc = NULL;
+ /* If this is a non-top-level local-name, clear the
+ return type, so it doesn't confuse the user by
+ being confused with the return type of whaever
+ this is nested within. */
+ if (!top_level && dc->type == DEMANGLE_COMPONENT_LOCAL_NAME
+ && ftype->type == DEMANGLE_COMPONENT_FUNCTION_TYPE)
+ d_left (ftype) = NULL;
+
+ ftype = d_maybe_constraints (di, ftype);
+
+ dc = d_make_comp (di, DEMANGLE_COMPONENT_TYPED_NAME,
+ dc, ftype);
}
}
}
@@ -1681,6 +1699,7 @@ d_maybe_module_name (struct d_info *di,
/* <unqualified-name> ::= [<module-name>] <operator-name> [<abi-tags>]
::= [<module-name>] <ctor-dtor-name> [<abi-tags>]
::= [<module-name>] <source-name> [<abi-tags>]
+ ::= [<module-name>] F <source-name> [<abi-tags>]
::= [<module-name>] <local-source-name> [<abi-tags>]
::= [<module-name>] DC <source-name>+ E [<abi-tags>]
<local-source-name> ::= L <source-name> <discriminator> [<abi-tags>]
@@ -1692,11 +1711,18 @@ d_unqualified_name (struct d_info *di, s
{
struct demangle_component *ret;
char peek;
+ int member_like_friend = 0;
if (!d_maybe_module_name (di, &module))
return NULL;
peek = d_peek_char (di);
+ if (peek == 'F')
+ {
+ member_like_friend = 1;
+ d_advance (di, 1);
+ peek = d_peek_char (di);
+ }
if (IS_DIGIT (peek))
ret = d_source_name (di);
else if (IS_LOWER (peek))
@@ -1773,6 +1799,8 @@ d_unqualified_name (struct d_info *di, s
ret = d_make_comp (di, DEMANGLE_COMPONENT_MODULE_ENTITY, ret, module);
if (d_peek_char (di) == 'B')
ret = d_abi_tags (di, ret);
+ if (member_like_friend)
+ ret = d_make_comp (di, DEMANGLE_COMPONENT_FRIEND, ret, NULL);
if (scope)
ret = d_make_comp (di, DEMANGLE_COMPONENT_QUAL_NAME, scope, ret);
@@ -3012,7 +3040,7 @@ d_parmlist (struct d_info *di)
struct demangle_component *type;
char peek = d_peek_char (di);
- if (peek == '\0' || peek == 'E' || peek == '.')
+ if (peek == '\0' || peek == 'E' || peek == '.' || peek == 'Q')
break;
if ((peek == 'R' || peek == 'O')
&& d_peek_next_char (di) == 'E')
@@ -3248,7 +3276,7 @@ d_template_args (struct d_info *di)
return d_template_args_1 (di);
}
-/* <template-arg>* E */
+/* <template-arg>* [Q <constraint-expression>] E */
static struct demangle_component *
d_template_args_1 (struct d_info *di)
@@ -3284,13 +3312,17 @@ d_template_args_1 (struct d_info *di)
return NULL;
pal = &d_right (*pal);
- if (d_peek_char (di) == 'E')
- {
- d_advance (di, 1);
- break;
- }
+ char peek = d_peek_char (di);
+ if (peek == 'E' || peek == 'Q')
+ break;
}
+ al = d_maybe_constraints (di, al);
+
+ if (d_peek_char (di) != 'E')
+ return NULL;
+ d_advance (di, 1);
+
di->last_name = hold_last_name;
return al;
@@ -4431,6 +4463,7 @@ d_count_templates_scopes (struct d_print
case DEMANGLE_COMPONENT_PACK_EXPANSION:
case DEMANGLE_COMPONENT_TAGGED_NAME:
case DEMANGLE_COMPONENT_CLONE:
+ case DEMANGLE_COMPONENT_CONSTRAINTS:
recurse_left_right:
/* PR 89394 - Check for too much recursion. */
if (dpi->recursion > DEMANGLE_RECURSION_LIMIT)
@@ -4459,6 +4492,7 @@ d_count_templates_scopes (struct d_print
case DEMANGLE_COMPONENT_GLOBAL_CONSTRUCTORS:
case DEMANGLE_COMPONENT_GLOBAL_DESTRUCTORS:
case DEMANGLE_COMPONENT_MODULE_ENTITY:
+ case DEMANGLE_COMPONENT_FRIEND:
d_count_templates_scopes (dpi, d_left (dc));
break;
@@ -5189,6 +5223,22 @@ d_print_comp_inner (struct d_print_info
dpt.next = dpi->templates;
dpi->templates = &dpt;
dpt.template_decl = typed_name;
+
+ /* Constraints are mangled as part of the template argument list,
+ so they wrap the _TEMPLATE_ARGLIST. But
+ d_lookup_template_argument expects the RHS of _TEMPLATE to be
+ the _ARGLIST, and constraints need to refer to these args. So
+ move the _CONSTRAINTS out of the _TEMPLATE and onto the type.
+ This will result in them being printed after the () like a
+ trailing requires-clause, but that seems like our best option
+ given that we aren't printing a template-head. */
+ struct demangle_component *tnr = d_right (typed_name);
+ if (tnr->type == DEMANGLE_COMPONENT_CONSTRAINTS)
+ {
+ d_right (typed_name) = d_left (tnr);
+ d_left (tnr) = d_right (dc);
+ d_right (dc) = tnr;
+ }
}
d_print_comp (dpi, options, d_right (dc));
@@ -6197,6 +6247,11 @@ d_print_comp_inner (struct d_print_info
d_append_char (dpi, ']');
return;
+ case DEMANGLE_COMPONENT_FRIEND:
+ d_print_comp (dpi, options, d_left (dc));
+ d_append_string (dpi, "[friend]");
+ return;
+
case DEMANGLE_COMPONENT_TEMPLATE_HEAD:
{
d_append_char (dpi, '<');
@@ -6231,6 +6286,12 @@ d_print_comp_inner (struct d_print_info
d_append_string (dpi, "...");
return;
+ case DEMANGLE_COMPONENT_CONSTRAINTS:
+ d_print_comp (dpi, options, d_left (dc));
+ d_append_string (dpi, " requires ");
+ d_print_comp (dpi, options, d_right (dc));
+ return;
+
default:
d_print_error (dpi);
return;
--- binutils.orig/include/demangle.h 2024-01-17 11:06:11.111229985 +0000
+++ binutils-2.41/include/demangle.h 2024-01-17 11:06:21.281242709 +0000
@@ -314,6 +314,8 @@ enum demangle_component_type
/* C++11: An rvalue reference modifying a member function. The one
subtree is the type which is being referenced. */
DEMANGLE_COMPONENT_RVALUE_REFERENCE_THIS,
+ /* C++23: A member function with explict object parameter. */
+ DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION,
/* A vendor qualifier. The left subtree is the type which is being
qualified, and the right subtree is the name of the
qualifier. */
--- binutils.orig/libiberty/cp-demangle.c 2024-01-17 11:06:11.246230153 +0000
+++ binutils-2.41/libiberty/cp-demangle.c 2024-01-17 11:06:21.282242710 +0000
@@ -581,6 +581,7 @@ static char *d_demangle (const char *, i
case DEMANGLE_COMPONENT_CONST_THIS: \
case DEMANGLE_COMPONENT_REFERENCE_THIS: \
case DEMANGLE_COMPONENT_RVALUE_REFERENCE_THIS: \
+ case DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION: \
case DEMANGLE_COMPONENT_TRANSACTION_SAFE: \
case DEMANGLE_COMPONENT_NOEXCEPT: \
case DEMANGLE_COMPONENT_THROW_SPEC
@@ -749,6 +750,9 @@ d_dump (struct demangle_component *dc, i
case DEMANGLE_COMPONENT_RVALUE_REFERENCE_THIS:
printf ("rvalue reference this\n");
break;
+ case DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION:
+ printf ("explicit object parameter\n");
+ break;
case DEMANGLE_COMPONENT_TRANSACTION_SAFE:
printf ("transaction_safe this\n");
break;
@@ -1547,6 +1551,8 @@ d_name (struct d_info *di, int substable
/* <nested-name> ::= N [<CV-qualifiers>] [<ref-qualifier>] <prefix> <unqualified-name> E
::= N [<CV-qualifiers>] [<ref-qualifier>] <template-prefix> <template-args> E
+ ::= N H <prefix> <unqualified-name> E
+ ::= N H <template-prefix> <template-args> E
*/
static struct demangle_component *
@@ -1559,13 +1565,24 @@ d_nested_name (struct d_info *di)
if (! d_check_char (di, 'N'))
return NULL;
- pret = d_cv_qualifiers (di, &ret, 1);
- if (pret == NULL)
- return NULL;
+ if (d_peek_char (di) == 'H')
+ {
+ d_advance (di, 1);
+ di->expansion += sizeof "this";
+ pret = &ret;
+ rqual = d_make_comp (di, DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION,
+ NULL, NULL);
+ }
+ else
+ {
+ pret = d_cv_qualifiers (di, &ret, 1);
+ if (pret == NULL)
+ return NULL;
- /* Parse the ref-qualifier now and then attach it
- once we have something to attach it to. */
- rqual = d_ref_qualifier (di, NULL);
+ /* Parse the ref-qualifier now and then attach it
+ once we have something to attach it to. */
+ rqual = d_ref_qualifier (di, NULL);
+ }
*pret = d_prefix (di, 1);
if (*pret == NULL)
@@ -4427,6 +4444,7 @@ d_count_templates_scopes (struct d_print
case DEMANGLE_COMPONENT_CONST_THIS:
case DEMANGLE_COMPONENT_REFERENCE_THIS:
case DEMANGLE_COMPONENT_RVALUE_REFERENCE_THIS:
+ case DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION:
case DEMANGLE_COMPONENT_TRANSACTION_SAFE:
case DEMANGLE_COMPONENT_NOEXCEPT:
case DEMANGLE_COMPONENT_THROW_SPEC:
@@ -6521,6 +6539,8 @@ d_print_mod (struct d_print_info *dpi, i
case DEMANGLE_COMPONENT_RVALUE_REFERENCE:
d_append_string (dpi, "&&");
return;
+ case DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION:
+ return;
case DEMANGLE_COMPONENT_COMPLEX:
d_append_string (dpi, " _Complex");
return;
@@ -6559,11 +6579,13 @@ d_print_function_type (struct d_print_in
{
int need_paren;
int need_space;
+ int xobj_memfn;
struct d_print_mod *p;
struct d_print_mod *hold_modifiers;
need_paren = 0;
need_space = 0;
+ xobj_memfn = 0;
for (p = mods; p != NULL; p = p->next)
{
if (p->printed)
@@ -6586,7 +6608,8 @@ d_print_function_type (struct d_print_in
need_space = 1;
need_paren = 1;
break;
- FNQUAL_COMPONENT_CASE:
+ case DEMANGLE_COMPONENT_XOBJ_MEMBER_FUNCTION:
+ xobj_memfn = 1;
break;
default:
break;
@@ -6617,6 +6640,8 @@ d_print_function_type (struct d_print_in
d_append_char (dpi, ')');
d_append_char (dpi, '(');
+ if (xobj_memfn)
+ d_append_string (dpi, "this ");
if (d_right (dc) != NULL)
d_print_comp (dpi, options, d_right (dc));

85
SOURCES/binutils-do-not-link-with-static-libstdc++.patch
Unescape View File

@ -0,0 +1,85 @@
diff -rup binutils.orig/configure binutils-2.40/configure
--- binutils.orig/configure 2023-02-13 14:43:00.728877170 +0000
+++ binutils-2.40/configure 2023-02-13 14:43:13.671864892 +0000
@@ -5442,49 +5442,6 @@ if test -z "$LD"; then
fi
fi
-# Check whether -static-libstdc++ -static-libgcc is supported.
-have_static_libs=no
-if test "$GCC" = yes; then
- saved_LDFLAGS="$LDFLAGS"
-
- LDFLAGS="$LDFLAGS -static-libstdc++ -static-libgcc"
- { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether g++ accepts -static-libstdc++ -static-libgcc" >&5
-$as_echo_n "checking whether g++ accepts -static-libstdc++ -static-libgcc... " >&6; }
- ac_ext=cpp
-ac_cpp='$CXXCPP $CPPFLAGS'
-ac_compile='$CXX -c $CXXFLAGS $CPPFLAGS conftest.$ac_ext >&5'
-ac_link='$CXX -o conftest$ac_exeext $CXXFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
-ac_compiler_gnu=$ac_cv_cxx_compiler_gnu
-
-
-cat confdefs.h - <<_ACEOF >conftest.$ac_ext
-/* end confdefs.h. */
-
-#if (__GNUC__ < 4) || (__GNUC__ == 4 && __GNUC_MINOR__ < 5)
-#error -static-libstdc++ not implemented
-#endif
-int main() {}
-_ACEOF
-if ac_fn_cxx_try_link "$LINENO"; then :
- { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5
-$as_echo "yes" >&6; }; have_static_libs=yes
-else
- { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
-$as_echo "no" >&6; }
-fi
-rm -f core conftest.err conftest.$ac_objext \
- conftest$ac_exeext conftest.$ac_ext
- ac_ext=c
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
-ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5'
-ac_compiler_gnu=$ac_cv_c_compiler_gnu
-
-
- LDFLAGS="$saved_LDFLAGS"
-fi
-
-
if test -n "$ac_tool_prefix"; then
diff -rup binutils.orig/configure.ac binutils-2.40/configure.ac
--- binutils.orig/configure.ac 2023-02-13 14:43:00.728877170 +0000
+++ binutils-2.40/configure.ac 2023-02-13 14:43:13.671864892 +0000
@@ -1435,26 +1435,6 @@ if test -z "$LD"; then
fi
fi
-# Check whether -static-libstdc++ -static-libgcc is supported.
-have_static_libs=no
-if test "$GCC" = yes; then
- saved_LDFLAGS="$LDFLAGS"
-
- LDFLAGS="$LDFLAGS -static-libstdc++ -static-libgcc"
- AC_MSG_CHECKING([whether g++ accepts -static-libstdc++ -static-libgcc])
- AC_LANG_PUSH(C++)
- AC_LINK_IFELSE([AC_LANG_SOURCE([
-#if (__GNUC__ < 4) || (__GNUC__ == 4 && __GNUC_MINOR__ < 5)
-#error -static-libstdc++ not implemented
-#endif
-int main() {}])],
- [AC_MSG_RESULT([yes]); have_static_libs=yes],
- [AC_MSG_RESULT([no])])
- AC_LANG_POP(C++)
-
- LDFLAGS="$saved_LDFLAGS"
-fi
-
ACX_PROG_GNAT
ACX_PROG_GDC
ACX_PROG_CMP_IGNORE_INITIAL
Only in binutils-2.40: configure.ac.orig
Only in binutils-2.40: configure.orig

1481
SOURCES/binutils-execstack-error.patch
View File

File diff suppressed because it is too large Load Diff

33
SOURCES/binutils-export-demangle.h.patch
Unescape View File

@ -0,0 +1,33 @@
diff -rup binutils.orig/bfd/Makefile.am binutils-2.32/bfd/Makefile.am
--- binutils.orig/bfd/Makefile.am 2019-02-08 12:22:51.395684251 +0000
+++ binutils-2.32/bfd/Makefile.am 2019-02-08 12:22:53.970664973 +0000
@@ -33,7 +33,7 @@ bfdlibdir = @bfdlibdir@
bfdincludedir = @bfdincludedir@
bfdlib_LTLIBRARIES = libbfd.la
bfdinclude_HEADERS = $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h
+ $(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h $(INCDIR)/demangle.h
else !INSTALL_LIBBFD
# Empty these so that the respective installation directories will not be created.
bfdlibdir =
diff -rup binutils.orig/bfd/Makefile.in binutils-2.32/bfd/Makefile.in
--- binutils.orig/bfd/Makefile.in 2019-02-08 12:21:35.291254044 +0000
+++ binutils-2.32/bfd/Makefile.in 2019-02-08 12:22:10.163992947 +0000
@@ -249,7 +249,7 @@ am__can_run_installinfo = \
esac
am__bfdinclude_HEADERS_DIST = $(INCDIR)/plugin-api.h bfd.h \
$(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
- $(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h
+ $(INCDIR)/diagnostics.h $(INCDIR)/bfdlink.h $(INCDIR)/demangle.h
HEADERS = $(bfdinclude_HEADERS)
RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \
distclean-recursive maintainer-clean-recursive
@@ -468,7 +468,7 @@ libbfd_la_LDFLAGS = $(am__append_1) -rel
@INSTALL_LIBBFD_FALSE@bfdinclude_HEADERS = $(am__append_2)
@INSTALL_LIBBFD_TRUE@bfdinclude_HEADERS = $(BFD_H) \
@INSTALL_LIBBFD_TRUE@ $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h \
-@INSTALL_LIBBFD_TRUE@ $(INCDIR)/diagnostics.h \
+@INSTALL_LIBBFD_TRUE@ $(INCDIR)/diagnostics.h $(INCDIR)/demangle.h \
@INSTALL_LIBBFD_TRUE@ $(INCDIR)/bfdlink.h $(am__append_2)
@INSTALL_LIBBFD_FALSE@rpath_bfdlibdir = @bfdlibdir@
@INSTALL_LIBBFD_FALSE@noinst_LTLIBRARIES = libbfd.la

11
SOURCES/binutils-gold-empty-dwp.patch
Unescape View File

@ -0,0 +1,11 @@
--- binutils.orig/gold/dwp.cc 2023-05-02 13:26:44.075148082 +0100
+++ binutils-2.40/gold/dwp.cc 2023-05-02 13:27:16.189130127 +0100
@@ -2418,6 +2418,8 @@ main(int argc, char** argv)
{
Dwo_file exe_file(exe_filename);
exe_file.read_executable(&files);
+ if (files.empty())
+ gold_fatal(_("Could not find any dwo links in specified EXE"));
}
// Add any additional files listed on command line.

193
SOURCES/binutils-gold-i386-gnu-property-notes.patch
Unescape View File

@ -0,0 +1,193 @@
diff --git a/gold/i386.cc b/gold/i386.cc
index bf209fe9a86..31161ff091c 100644
--- a/gold/i386.cc
+++ b/gold/i386.cc
@@ -360,7 +360,11 @@ class Target_i386 : public Sized_target<32, false>
got_(NULL), plt_(NULL), got_plt_(NULL), got_irelative_(NULL),
got_tlsdesc_(NULL), global_offset_table_(NULL), rel_dyn_(NULL),
rel_irelative_(NULL), copy_relocs_(elfcpp::R_386_COPY),
- got_mod_index_offset_(-1U), tls_base_symbol_defined_(false)
+ got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
+ isa_1_used_(0), isa_1_needed_(0),
+ feature_1_(0), feature_2_used_(0), feature_2_needed_(0),
+ object_isa_1_used_(0), object_feature_1_(0),
+ object_feature_2_used_(0), seen_first_object_(false)
{ }
// Process the relocations to determine unreferenced sections for
@@ -859,6 +863,21 @@ class Target_i386 : public Sized_target<32, false>
this->rel_dyn_section(layout));
}
+ // Record a target-specific program property in the .note.gnu.property
+ // section.
+ void
+ record_gnu_property(unsigned int, unsigned int, size_t,
+ const unsigned char*, const Object*);
+
+ // Merge the target-specific program properties from the current object.
+ void
+ merge_gnu_properties(const Object*);
+
+ // Finalize the target-specific program properties and add them back to
+ // the layout.
+ void
+ do_finalize_gnu_properties(Layout*) const;
+
// Information about this specific target which we pass to the
// general Target structure.
static const Target::Target_info i386_info;
@@ -898,6 +917,26 @@ class Target_i386 : public Sized_target<32, false>
unsigned int got_mod_index_offset_;
// True if the _TLS_MODULE_BASE_ symbol has been defined.
bool tls_base_symbol_defined_;
+
+ // Target-specific program properties, from .note.gnu.property section.
+ // Each bit represents a specific feature.
+ uint32_t isa_1_used_;
+ uint32_t isa_1_needed_;
+ uint32_t feature_1_;
+ uint32_t feature_2_used_;
+ uint32_t feature_2_needed_;
+ // Target-specific properties from the current object.
+ // These bits get ORed into ISA_1_USED_ after all properties for the object
+ // have been processed. But if either is all zeroes (as when the property
+ // is absent from an object), the result should be all zeroes.
+ // (See PR ld/23486.)
+ uint32_t object_isa_1_used_;
+ // These bits get ANDed into FEATURE_1_ after all properties for the object
+ // have been processed.
+ uint32_t object_feature_1_;
+ uint32_t object_feature_2_used_;
+ // Whether we have seen our first object, for use in initializing FEATURE_1_.
+ bool seen_first_object_;
};
const Target::Target_info Target_i386::i386_info =
@@ -1042,6 +1081,126 @@ Target_i386::rel_irelative_section(Layout* layout)
return this->rel_irelative_;
}
+// Record a target-specific program property from the .note.gnu.property
+// section.
+void
+Target_i386::record_gnu_property(
+ unsigned int, unsigned int pr_type,
+ size_t pr_datasz, const unsigned char* pr_data,
+ const Object* object)
+{
+ uint32_t val = 0;
+
+ switch (pr_type)
+ {
+ case elfcpp::GNU_PROPERTY_X86_COMPAT_ISA_1_USED:
+ case elfcpp::GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED:
+ case elfcpp::GNU_PROPERTY_X86_COMPAT_2_ISA_1_USED:
+ case elfcpp::GNU_PROPERTY_X86_COMPAT_2_ISA_1_NEEDED:
+ case elfcpp::GNU_PROPERTY_X86_ISA_1_USED:
+ case elfcpp::GNU_PROPERTY_X86_ISA_1_NEEDED:
+ case elfcpp::GNU_PROPERTY_X86_FEATURE_1_AND:
+ case elfcpp::GNU_PROPERTY_X86_FEATURE_2_USED:
+ case elfcpp::GNU_PROPERTY_X86_FEATURE_2_NEEDED:
+ if (pr_datasz != 4)
+ {
+ gold_warning(_("%s: corrupt .note.gnu.property section "
+ "(pr_datasz for property %d is not 4)"),
+ object->name().c_str(), pr_type);
+ return;
+ }
+ val = elfcpp::Swap<32, false>::readval(pr_data);
+ break;
+ default:
+ gold_warning(_("%s: unknown program property type 0x%x "
+ "in .note.gnu.property section"),
+ object->name().c_str(), pr_type);
+ break;
+ }
+
+ switch (pr_type)
+ {
+ case elfcpp::GNU_PROPERTY_X86_ISA_1_USED:
+ this->object_isa_1_used_ |= val;
+ break;
+ case elfcpp::GNU_PROPERTY_X86_ISA_1_NEEDED:
+ this->isa_1_needed_ |= val;
+ break;
+ case elfcpp::GNU_PROPERTY_X86_FEATURE_1_AND:
+ // If we see multiple feature props in one object, OR them together.
+ this->object_feature_1_ |= val;
+ break;
+ case elfcpp::GNU_PROPERTY_X86_FEATURE_2_USED:
+ this->object_feature_2_used_ |= val;
+ break;
+ case elfcpp::GNU_PROPERTY_X86_FEATURE_2_NEEDED:
+ this->feature_2_needed_ |= val;
+ break;
+ }
+}
+
+// Merge the target-specific program properties from the current object.
+void
+Target_i386::merge_gnu_properties(const Object*)
+{
+ if (this->seen_first_object_)
+ {
+ // If any object is missing the ISA_1_USED property, we must omit
+ // it from the output file.
+ if (this->object_isa_1_used_ == 0)
+ this->isa_1_used_ = 0;
+ else if (this->isa_1_used_ != 0)
+ this->isa_1_used_ |= this->object_isa_1_used_;
+ this->feature_1_ &= this->object_feature_1_;
+ // If any object is missing the FEATURE_2_USED property, we must
+ // omit it from the output file.
+ if (this->object_feature_2_used_ == 0)
+ this->feature_2_used_ = 0;
+ else if (this->feature_2_used_ != 0)
+ this->feature_2_used_ |= this->object_feature_2_used_;
+ }
+ else
+ {
+ this->isa_1_used_ = this->object_isa_1_used_;
+ this->feature_1_ = this->object_feature_1_;
+ this->feature_2_used_ = this->object_feature_2_used_;
+ this->seen_first_object_ = true;
+ }
+ this->object_isa_1_used_ = 0;
+ this->object_feature_1_ = 0;
+ this->object_feature_2_used_ = 0;
+}
+
+static inline void
+add_property(Layout* layout, unsigned int pr_type, uint32_t val)
+{
+ unsigned char buf[4];
+ elfcpp::Swap<32, false>::writeval(buf, val);
+ layout->add_gnu_property(elfcpp::NT_GNU_PROPERTY_TYPE_0, pr_type, 4, buf);
+}
+
+// Finalize the target-specific program properties and add them back to
+// the layout.
+void
+Target_i386::do_finalize_gnu_properties(Layout* layout) const
+{
+ if (this->isa_1_used_ != 0)
+ add_property(layout, elfcpp::GNU_PROPERTY_X86_ISA_1_USED,
+ this->isa_1_used_);
+ if (this->isa_1_needed_ != 0)
+ add_property(layout, elfcpp::GNU_PROPERTY_X86_ISA_1_NEEDED,
+ this->isa_1_needed_);
+ if (this->feature_1_ != 0)
+ add_property(layout, elfcpp::GNU_PROPERTY_X86_FEATURE_1_AND,
+ this->feature_1_);
+ if (this->feature_2_used_ != 0)
+ add_property(layout, elfcpp::GNU_PROPERTY_X86_FEATURE_2_USED,
+ this->feature_2_used_);
+ if (this->feature_2_needed_ != 0)
+ add_property(layout, elfcpp::GNU_PROPERTY_X86_FEATURE_2_NEEDED,
+ this->feature_2_needed_);
+}
+
// Write the first three reserved words of the .got.plt section.
// The remainder of the section is written while writing the PLT
// in Output_data_plt_i386::do_write.

16
SOURCES/binutils-gold-ignore-execstack-error.patch
Unescape View File

@ -0,0 +1,16 @@
diff -rup binutils.orig/gold/options.h binutils-2.41/gold/options.h
--- binutils.orig/gold/options.h 2024-01-04 09:52:09.282002253 +0000
+++ binutils-2.41/gold/options.h 2024-01-04 09:52:51.890972630 +0000
@@ -855,6 +855,12 @@ class General_options
N_("(ARM only) Do not warn about objects with incompatible "
"enum sizes"));
+ DEFINE_bool_ignore(error_execstack, options::TWO_DASHES, '\0',
+ N_("Ignored"), N_("Ignored"));
+
+ DEFINE_bool_ignore(error_rwx_segments, options::TWO_DASHES, '\0',
+ N_("Ignored"), N_("Ignored"));
+
DEFINE_special(exclude_libs, options::TWO_DASHES, '\0',
N_("Exclude libraries from automatic export"),
N_(("lib,lib ...")));

19
SOURCES/binutils-gold-mismatched-section-flags.patch
Unescape View File

@ -0,0 +1,19 @@
diff -rup binutils.orig/gold/layout.cc binutils-2.32/gold/layout.cc
--- binutils.orig/gold/layout.cc 2019-06-24 14:37:36.013086899 +0100
+++ binutils-2.32/gold/layout.cc 2019-06-24 14:41:40.054517479 +0100
@@ -868,6 +868,7 @@ Layout::get_output_section(const char* n
&& (same_name->flags() & elfcpp::SHF_TLS) == 0)
os = same_name;
}
+#if 0 /* BZ 1722715, PR 17556. */
else if ((flags & elfcpp::SHF_TLS) == 0)
{
elfcpp::Elf_Xword zero_flags = 0;
@@ -878,6 +879,7 @@ Layout::get_output_section(const char* n
if (p != this->section_name_map_.end())
os = p->second;
}
+#endif
}
if (os == NULL)

27
SOURCES/binutils-gold-pack-relative-relocs.patch
Unescape View File

@ -0,0 +1,27 @@
diff --git a/gold/options.cc b/gold/options.cc
index c9834b66159..91d7802fffe 100644
--- a/gold/options.cc
+++ b/gold/options.cc
@@ -989,7 +989,7 @@ parse_short_option(int argc, const char** argv, int pos_in_argv_i,
}
// If we're a -z option, we need to parse our argument as a
- // long-option, e.g. "-z stacksize=8192".
+ // long-option, e.g. "-z stack-size=8192".
if (retval == &dash_z)
{
int dummy_i = 0;
diff --git a/gold/options.h b/gold/options.h
index 46f658f23ea..d16e38066da 100644
--- a/gold/options.h
+++ b/gold/options.h
@@ -1110,6 +1110,9 @@ class General_options
N_("Generate package metadata note"),
N_("[=JSON]"));
+ DEFINE_bool_ignore(pack_relative_relocs, options::DASH_Z, '\0',
+ N_("Ignored"), N_("Ignored"));
+
DEFINE_bool(pie, options::ONE_DASH, '\0', false,
N_("Create a position independent executable"),
N_("Do not create a position independent executable"));

71
SOURCES/binutils-gold-powerpc.patch
Unescape View File

@ -0,0 +1,71 @@
diff -rup binutils.orig/gold/powerpc.cc binutils-2.41/gold/powerpc.cc
--- binutils.orig/gold/powerpc.cc 2023-08-25 11:21:08.882071604 +0100
+++ binutils-2.41/gold/powerpc.cc 2023-08-25 11:21:26.050081034 +0100
@@ -3714,12 +3714,7 @@ Target_powerpc<size, big_endian>::do_rel
unsigned int prev_brlt_size = 0;
if (pass == 1)
{
- bool thread_safe
- = this->abiversion() < 2 && parameters->options().plt_thread_safe();
- if (size == 64
- && this->abiversion() < 2
- && !thread_safe
- && !parameters->options().user_set_plt_thread_safe())
+ if (size == 64 && this->abiversion() < 2)
{
static const char* const thread_starter[] =
{
@@ -3747,29 +3742,37 @@ Target_powerpc<size, big_endian>::do_rel
/* libgo */
"__go_go",
};
+ bool thread_safe = parameters->options().plt_thread_safe();
- if (parameters->options().shared())
- thread_safe = true;
- else
+ if (!thread_safe
+ && !parameters->options().user_set_plt_thread_safe())
{
- for (unsigned int i = 0;
- i < sizeof(thread_starter) / sizeof(thread_starter[0]);
- i++)
+ if (parameters->options().shared())
+ thread_safe = true;
+ else
{
- Symbol* sym = symtab->lookup(thread_starter[i], NULL);
- thread_safe = (sym != NULL
- && sym->in_reg()
- && sym->in_real_elf());
- if (thread_safe)
- break;
+ for (unsigned int i = 0;
+ i < sizeof(thread_starter) / sizeof(thread_starter[0]);
+ i++)
+ {
+ Symbol* sym = symtab->lookup(thread_starter[i], NULL);
+ thread_safe = (sym != NULL
+ && sym->in_reg()
+ && sym->in_real_elf());
+ if (thread_safe)
+ break;
+ }
}
}
+ this->plt_thread_safe_ = thread_safe;
}
- this->plt_thread_safe_ = thread_safe;
- if (parameters->options().output_is_position_independent())
- this->rela_dyn_size_
- = this->rela_dyn_section(layout)->current_data_size();
+ if (size == 64
+ && parameters->options().output_is_position_independent())
+ {
+ gold_assert (this->rela_dyn_);
+ this->rela_dyn_size_ = this->rela_dyn_->current_data_size();
+ }
this->stub_group_size_ = parameters->options().stub_group_size();
bool no_size_errors = true;

66
SOURCES/binutils-gold-warn-unsupported.patch
Unescape View File

@ -0,0 +1,66 @@
Only in binutils-2.34/gold: autom4te.cache
diff -rup binutils.orig/gold/configure binutils-2.34/gold/configure
--- binutils.orig/gold/configure 2020-04-20 12:35:13.048297305 +0100
+++ binutils-2.34/gold/configure 2020-04-20 14:02:06.743725696 +0100
@@ -5180,7 +5180,8 @@ for targ in $target $canon_targets; do
. ${srcdir}/configure.tgt
if test "$targ_obj" = "UNKNOWN"; then
- as_fn_error $? "\"unsupported target $targ\"" "$LINENO" 5
+ { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: \"unsupported target $targ\"" >&5
+$as_echo "$as_me: WARNING: \"unsupported target $targ\"" >&2;}
else
targetobjs="$targetobjs ${targ_obj}.\$(OBJEXT)"
if test "$targ_extra_obj" != ""; then
diff -rup binutils.orig/gold/configure.ac binutils-2.34/gold/configure.ac
--- binutils.orig/gold/configure.ac 2020-04-20 12:35:13.050297291 +0100
+++ binutils-2.34/gold/configure.ac 2020-04-20 14:01:46.435868770 +0100
@@ -181,7 +181,7 @@ for targ in $target $canon_targets; do
. ${srcdir}/configure.tgt
if test "$targ_obj" = "UNKNOWN"; then
- AC_MSG_ERROR("unsupported target $targ")
+ AC_MSG_WARN("unsupported target $targ")
else
targetobjs="$targetobjs ${targ_obj}.\$(OBJEXT)"
if test "$targ_extra_obj" != ""; then
--- binutils.orig/ld/configure.tgt 2020-04-20 12:35:12.465301359 +0100
+++ binutils-2.34/ld/configure.tgt 2020-04-20 14:17:52.123066333 +0100
@@ -220,7 +220,7 @@ bfin-*-linux-uclibc*) targ_emul=elf32bfi
targ_extra_emuls="elf32bfin"
targ_extra_libpath=$targ_extra_emuls
;;
-bpf-*-*) targ_emul=elf64bpf
+bpf-* | bpf-*-*) targ_emul=elf64bpf
;;
cr16-*-elf*) targ_emul=elf32cr16
;;
@@ -1026,7 +1026,7 @@ z8k-*-coff) targ_emul=z8002
targ_extra_ofiles=
;;
*)
- echo 2>&1 "*** ld does not support target ${targ}"
+ echo 2>&1 "*** ld does not support target '${targ}' NO REALLY"
echo 2>&1 "*** see ld/configure.tgt for supported targets"
exit 1
--- binutils.orig/bfd/config.bfd 2020-04-20 12:35:13.038297375 +0100
+++ binutils-2.34/bfd/config.bfd 2020-04-20 14:25:26.452869193 +0100
@@ -473,7 +473,7 @@ case "${targ}" in
;;
#ifdef BFD64
- bpf-*-none)
+ bpf-*-none | bpf-*)
targ_defvec=bpf_elf64_le_vec
targ_selvecs=bpf_elf64_be_vec
targ_underscore=yes
@@ -1427,7 +1427,7 @@ case "${targ}" in
;;
*)
- echo 1>&2 "*** BFD does not support target ${targ}."
+ echo 1>&2 "*** BFD does not support target '${targ}'. Honest."
echo 1>&2 "*** Look in bfd/config.bfd for supported targets."
exit 1
;;

29
SOURCES/binutils-handle-corrupt-version-info.patch
Unescape View File

@ -0,0 +1,29 @@
--- binutils.orig/bfd/elf.c 2023-10-13 11:38:25.159530287 +0100
+++ binutils-2.41/bfd/elf.c 2023-10-13 11:41:23.290898228 +0100
@@ -9479,6 +9479,8 @@ _bfd_elf_slurp_version_tables (bfd *abfd
if (elf_use_dt_symtab_p (abfd))
iverneed->vn_filename
= elf_tdata (abfd)->dt_strtab + iverneed->vn_file;
+ else if (hdr == NULL)
+ goto error_return_bad_verref;
else
iverneed->vn_filename
= bfd_elf_string_from_elf_section (abfd, hdr->sh_link,
@@ -9516,6 +9518,8 @@ _bfd_elf_slurp_version_tables (bfd *abfd
if (elf_use_dt_symtab_p (abfd))
ivernaux->vna_nodename
= elf_tdata (abfd)->dt_strtab + ivernaux->vna_name;
+ else if (hdr == NULL)
+ goto error_return_bad_verref;
else
ivernaux->vna_nodename
= bfd_elf_string_from_elf_section (abfd, hdr->sh_link,
@@ -9546,7 +9550,7 @@ _bfd_elf_slurp_version_tables (bfd *abfd
iverneed->vn_nextref = NULL;
if (iverneed->vn_next == 0)
break;
- if (i + 1 < hdr->sh_info)
+ if (hdr != NULL && (i + 1 < hdr->sh_info))
iverneed->vn_nextref = iverneed + 1;
if (iverneed->vn_next

236
SOURCES/binutils-libtool-lib64.patch
Unescape View File

@ -0,0 +1,236 @@
diff -rcp ../binutils-2.20.51.0.7.original/bfd/configure ./bfd/configure
--- a/bfd/configure 2010-04-08 14:53:48.000000000 +0100
+++ b/bfd/configure 2010-04-08 14:56:50.000000000 +0100
@@ -10762,10 +10762,34 @@
# before this can be enabled.
hardcode_into_libs=yes
+ # find out which ABI we are using
+ libsuff=
+ case "$host_cpu" in
+ x86_64*|s390*|powerpc*|ppc*|sparc*)
+ echo 'int i;' > conftest.$ac_ext
+ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; then
+ case `/usr/bin/file conftest.$ac_objext` in
+ *64-bit*)
+ libsuff=64
+ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
+ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
+ fi
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
+ ;;
+ esac
+ fi
+ rm -rf conftest*
+ ;;
+ esac
+
# Append ld.so.conf contents to the search path
if test -f /etc/ld.so.conf; then
lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '`
- sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
fi
# We used to test for /lib/ld.so.1 and disable shared libraries on
diff -rcp ../binutils-2.20.51.0.7.original/binutils/configure ./binutils/configure
--- a/binutils/configure 2010-04-08 14:53:45.000000000 +0100
+++ b/binutils/configure 2010-04-08 14:56:21.000000000 +0100
@@ -10560,10 +10560,34 @@
# before this can be enabled.
hardcode_into_libs=yes
+ # find out which ABI we are using
+ libsuff=
+ case "$host_cpu" in
+ x86_64*|s390*|powerpc*|ppc*|sparc*)
+ echo 'int i;' > conftest.$ac_ext
+ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; then
+ case `/usr/bin/file conftest.$ac_objext` in
+ *64-bit*)
+ libsuff=64
+ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
+ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
+ fi
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
+ ;;
+ esac
+ fi
+ rm -rf conftest*
+ ;;
+ esac
+
# Append ld.so.conf contents to the search path
if test -f /etc/ld.so.conf; then
lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '`
- sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
fi
# We used to test for /lib/ld.so.1 and disable shared libraries on
diff -rcp ../binutils-2.20.51.0.7.original/gas/configure ./gas/configure
--- a/gas/configure 2010-04-08 14:53:47.000000000 +0100
+++ b/gas/configure 2010-04-08 14:57:24.000000000 +0100
@@ -10547,10 +10547,34 @@
# before this can be enabled.
hardcode_into_libs=yes
+ # find out which ABI we are using
+ libsuff=
+ case "$host_cpu" in
+ x86_64*|s390*|powerpc*|ppc*|sparc*)
+ echo 'int i;' > conftest.$ac_ext
+ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; then
+ case `/usr/bin/file conftest.$ac_objext` in
+ *64-bit*)
+ libsuff=64
+ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
+ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
+ fi
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
+ ;;
+ esac
+ fi
+ rm -rf conftest*
+ ;;
+ esac
+
# Append ld.so.conf contents to the search path
if test -f /etc/ld.so.conf; then
lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '`
- sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
fi
# We used to test for /lib/ld.so.1 and disable shared libraries on
diff -rcp ../binutils-2.20.51.0.7.original/gprof/configure ./gprof/configure
--- a/gprof/configure 2010-04-08 14:53:45.000000000 +0100
+++ b/gprof/configure 2010-04-08 14:57:50.000000000 +0100
@@ -10485,10 +10485,34 @@
# before this can be enabled.
hardcode_into_libs=yes
+ # find out which ABI we are using
+ libsuff=
+ case "$host_cpu" in
+ x86_64*|s390*|powerpc*|ppc*|sparc*)
+ echo 'int i;' > conftest.$ac_ext
+ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; then
+ case `/usr/bin/file conftest.$ac_objext` in
+ *64-bit*)
+ libsuff=64
+ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
+ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
+ fi
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
+ ;;
+ esac
+ fi
+ rm -rf conftest*
+ ;;
+ esac
+
# Append ld.so.conf contents to the search path
if test -f /etc/ld.so.conf; then
lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '`
- sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
fi
# We used to test for /lib/ld.so.1 and disable shared libraries on
diff -rcp ../binutils-2.20.51.0.7.original/ld/configure ./ld/configure
--- a/ld/configure 2010-04-08 14:53:44.000000000 +0100
+++ b/ld/configure 2010-04-08 14:58:21.000000000 +0100
@@ -10966,10 +10966,34 @@
# before this can be enabled.
hardcode_into_libs=yes
+ # find out which ABI we are using
+ libsuff=
+ case "$host_cpu" in
+ x86_64*|s390*|powerpc*|ppc*|sparc*)
+ echo 'int i;' > conftest.$ac_ext
+ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; then
+ case `/usr/bin/file conftest.$ac_objext` in
+ *64-bit*)
+ libsuff=64
+ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
+ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
+ fi
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
+ ;;
+ esac
+ fi
+ rm -rf conftest*
+ ;;
+ esac
+
# Append ld.so.conf contents to the search path
if test -f /etc/ld.so.conf; then
lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '`
- sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
fi
# We used to test for /lib/ld.so.1 and disable shared libraries on
Only in .: .#libtool.m4
Only in .: #libtool.m4#
diff -rcp ../binutils-2.20.51.0.7.original/opcodes/configure ./opcodes/configure
--- a/opcodes/configure 2010-04-08 14:53:45.000000000 +0100
+++ b/opcodes/configure 2010-04-08 14:59:10.000000000 +0100
@@ -10496,10 +10496,34 @@
# before this can be enabled.
hardcode_into_libs=yes
+ # find out which ABI we are using
+ libsuff=
+ case "$host_cpu" in
+ x86_64*|s390*|powerpc*|ppc*|sparc*)
+ echo 'int i;' > conftest.$ac_ext
+ if { (eval echo "$as_me:$LINENO: \"$ac_compile\"") >&5
+ (eval $ac_compile) 2>&5
+ ac_status=$?
+ echo "$as_me:$LINENO: \$? = $ac_status" >&5
+ (exit $ac_status); }; then
+ case `/usr/bin/file conftest.$ac_objext` in
+ *64-bit*)
+ libsuff=64
+ if test x"$sys_lib_search_path_spec" = x"/lib /usr/lib /usr/local/lib"; then
+ sys_lib_search_path_spec="/lib${libsuff} /usr/lib${libsuff} /usr/local/lib${libsuff}"
+ fi
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff}"
+ ;;
+ esac
+ fi
+ rm -rf conftest*
+ ;;
+ esac
+
# Append ld.so.conf contents to the search path
if test -f /etc/ld.so.conf; then
lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[ ]*hwcap[ ]/d;s/[:, ]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '`
- sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
+ sys_lib_dlsearch_path_spec="/lib${libsuff} /usr/lib${libsuff} $lt_ld_extra"
fi
# We used to test for /lib/ld.so.1 and disable shared libraries on

28
SOURCES/binutils-libtool-no-rpath.patch
Unescape View File

@ -0,0 +1,28 @@
diff -rup binutils.orig/ltmain.sh binutils-2.37/ltmain.sh
--- binutils.orig/ltmain.sh 2022-01-27 16:23:09.304207432 +0000
+++ binutils-2.37/ltmain.sh 2022-01-27 16:23:18.380143759 +0000
@@ -7103,6 +7103,7 @@ EOF
rpath="$finalize_rpath"
test "$mode" != relink && rpath="$compile_rpath$rpath"
for libdir in $rpath; do
+ case "$libdir" in /usr/lib|/usr/lib64|/usr/lib/../lib|/usr/lib/../lib64) continue;; esac
if test -n "$hardcode_libdir_flag_spec"; then
if test -n "$hardcode_libdir_separator"; then
if test -z "$hardcode_libdirs"; then
@@ -7798,6 +7799,7 @@ EOF
rpath=
hardcode_libdirs=
for libdir in $compile_rpath $finalize_rpath; do
+ case "$libdir" in /usr/lib|/usr/lib64|/usr/lib/../lib|/usr/lib/../lib64) continue;; esac
if test -n "$hardcode_libdir_flag_spec"; then
if test -n "$hardcode_libdir_separator"; then
if test -z "$hardcode_libdirs"; then
@@ -7849,6 +7851,7 @@ EOF
rpath=
hardcode_libdirs=
for libdir in $finalize_rpath; do
+ case "$libdir" in /usr/lib|/usr/lib64|/usr/lib/../lib|/usr/lib/../lib64) continue;; esac
if test -n "$hardcode_libdir_flag_spec"; then
if test -n "$hardcode_libdir_separator"; then
if test -z "$hardcode_libdirs"; then
Only in binutils-2.37: ltmain.sh.orig

49
SOURCES/binutils-multilib.am.patch
Unescape View File

@ -0,0 +1,49 @@
diff -rupN binutils.orig/multilib.am binutils-2.41/multilib.am
--- binutils.orig/multilib.am 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.41/multilib.am 2024-02-12 16:41:56.899838085 +0000
@@ -0,0 +1,45 @@
+## automake - create Makefile.in from Makefile.am
+
+## Copyright (C) 1994-2017 Free Software Foundation, Inc.
+## This Makefile.in is free software; the Free Software Foundation
+## gives unlimited permission to copy and/or distribute it,
+## with or without modifications, as long as this notice is preserved.
+
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+
+MULTISRCTOP =
+MULTIBUILDTOP =
+MULTIDIRS =
+MULTISUBDIR =
+MULTIDO = true
+MULTICLEAN = true
+
+# GNU Make needs to see an explicit $(MAKE) variable in the command it
+# runs to enable its job server during parallel builds. Hence the
+# comments below.
+all-multi:
+ $(MULTIDO) $(AM_MAKEFLAGS) DO=all multi-do # $(MAKE)
+install-multi:
+ $(MULTIDO) $(AM_MAKEFLAGS) DO=install multi-do # $(MAKE)
+mostlyclean-multi:
+ $(MULTICLEAN) $(AM_MAKEFLAGS) DO=mostlyclean multi-clean # $(MAKE)
+clean-multi:
+ $(MULTICLEAN) $(AM_MAKEFLAGS) DO=clean multi-clean # $(MAKE)
+distclean-multi:
+ $(MULTICLEAN) $(AM_MAKEFLAGS) DO=distclean multi-clean # $(MAKE)
+maintainer-clean-multi:
+ $(MULTICLEAN) $(AM_MAKEFLAGS) DO=maintainer-clean multi-clean # $(MAKE)
+
+.MAKE .PHONY: all-multi clean-multi distclean-multi install-am \
+ install-multi maintainer-clean-multi mostlyclean-multi
+
+install-exec-local: install-multi
+
+all-local: all-multi
+mostlyclean-local: mostlyclean-multi
+clean-local: clean-multi
+distclean-local: distclean-multi
+maintainer-clean-local: maintainer-clean-multi

28
SOURCES/binutils-no-config-h-check.patch
Unescape View File

@ -0,0 +1,28 @@
--- a/bfd/bfd-in.h 2012-08-02 10:56:34.561769686 +0100
+++ b/bfd/bfd-in.h 2012-08-02 11:13:27.134797755 +0100
@@ -25,11 +25,6 @@
#ifndef __BFD_H_SEEN__
#define __BFD_H_SEEN__
-/* PR 14072: Ensure that config.h is included first. */
-#if !defined PACKAGE && !defined PACKAGE_VERSION
-#error config.h must be included before this header
-#endif
-
#ifdef __cplusplus
extern "C" {
#endif
--- a/bfd/bfd-in2.h 2012-08-02 10:56:34.349769680 +0100
+++ b/bfd/bfd-in2.h 2012-08-02 11:13:40.015798113 +0100
@@ -32,11 +32,6 @@
#ifndef __BFD_H_SEEN__
#define __BFD_H_SEEN__
-/* PR 14072: Ensure that config.h is included first. */
-#if !defined PACKAGE && !defined PACKAGE_VERSION
-#error config.h must be included before this header
-#endif
-
#ifdef __cplusplus
extern "C" {
#endif

83
SOURCES/binutils-power-11.patch
Unescape View File

@ -0,0 +1,83 @@
diff -rup binutils,orig/binutils/doc/binutils.texi binutils-2.41/binutils/doc/binutils.texi
--- binutils,orig/binutils/doc/binutils.texi 2024-02-12 10:03:46.609677213 +0000
+++ binutils-2.41/binutils/doc/binutils.texi 2024-02-12 10:03:55.976681219 +0000
@@ -2651,11 +2651,12 @@ rather than @code{li}. All of the @opti
@option{e300}, @option{e500}, @option{e500mc}, @option{e500mc64},
@option{e500x2}, @option{e5500}, @option{e6500}, @option{efs},
@option{power4}, @option{power5}, @option{power6}, @option{power7},
-@option{power8}, @option{power9}, @option{power10}, @option{ppc},
-@option{ppc32}, @option{ppc64}, @option{ppc64bridge}, @option{ppcps},
-@option{pwr}, @option{pwr2}, @option{pwr4}, @option{pwr5}, @option{pwr5x},
-@option{pwr6}, @option{pwr7}, @option{pwr8}, @option{pwr9}, @option{pwr10},
-@option{pwrx}, @option{titan}, @option{vle}, and @option{future}.
+@option{power8}, @option{power9}, @option{power10}, @option{power11},
+@option{ppc}, @option{ppc32}, @option{ppc64}, @option{ppc64bridge},
+@option{ppcps}, @option{pwr}, @option{pwr2}, @option{pwr4}, @option{pwr5},
+@option{pwr5x}, @option{pwr6}, @option{pwr7}, @option{pwr8}, @option{pwr9},
+@option{pwr10}, @option{pwr11}, @option{pwrx}, @option{titan}, @option{vle},
+and @option{future}.
@option{32} and @option{64} modify the default or a prior CPU
selection, disabling and enabling 64-bit insns respectively. In
addition, @option{altivec}, @option{any}, @option{lsp}, @option{htm},
Only in binutils-2.41/binutils/doc: binutils.texi.orig
diff -rup binutils,orig/gas/config/tc-ppc.c binutils-2.41/gas/config/tc-ppc.c
--- binutils,orig/gas/config/tc-ppc.c 2024-02-12 10:03:46.742677270 +0000
+++ binutils-2.41/gas/config/tc-ppc.c 2024-02-12 10:03:55.977681219 +0000
@@ -1392,6 +1392,8 @@ PowerPC options:\n"));
fprintf (stream, _("\
-mpower10, -mpwr10 generate code for Power10 architecture\n"));
fprintf (stream, _("\
+-mpower11, -mpwr11 generate code for Power11 architecture\n"));
+ fprintf (stream, _("\
-mlibresoc generate code for Libre-SOC architecture\n"));
fprintf (stream, _("\
-mfuture generate code for 'future' architecture\n"));
diff -rup binutils,orig/gas/doc/c-ppc.texi binutils-2.41/gas/doc/c-ppc.texi
--- binutils,orig/gas/doc/c-ppc.texi 2024-02-12 10:03:46.783677288 +0000
+++ binutils-2.41/gas/doc/c-ppc.texi 2024-02-12 10:03:55.977681219 +0000
@@ -156,6 +156,9 @@ Generate code for Power9 architecture.
@item -mpower10, -mpwr10
Generate code for Power10 architecture.
+@item -mpower11, -mpwr11
+Generate code for Power11 architecture.
+
@item -mfuture
Generate code for 'future' architecture.
diff -rup binutils,orig/opcodes/ppc-dis.c binutils-2.41/opcodes/ppc-dis.c
--- binutils,orig/opcodes/ppc-dis.c 2024-02-12 10:03:47.836677739 +0000
+++ binutils-2.41/opcodes/ppc-dis.c 2024-02-12 10:03:55.977681219 +0000
@@ -208,6 +208,11 @@ struct ppc_mopt ppc_opts[] = {
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
| PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
0 },
+ { "power11", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
+ | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
+ | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
+ | PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
+ 0 },
{ "libresoc",(PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
@@ -267,6 +272,11 @@ struct ppc_mopt ppc_opts[] = {
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
| PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
0 },
+ { "pwr11", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
+ | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
+ | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
+ | PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
+ 0 },
{ "pwrx", PPC_OPCODE_POWER | PPC_OPCODE_POWER2,
0 },
{ "raw", PPC_OPCODE_PPC,
@@ -396,7 +406,7 @@ powerpc_init_dialect (struct disassemble
break;
default:
if (info->arch == bfd_arch_powerpc)
- dialect = ppc_parse_cpu (dialect, &sticky, "power10") | PPC_OPCODE_ANY;
+ dialect = ppc_parse_cpu (dialect, &sticky, "power11") | PPC_OPCODE_ANY;
else
dialect = ppc_parse_cpu (dialect, &sticky, "pwr");
break;

114
SOURCES/binutils-ppc-dt_relr-relocs.patch
Unescape View File

@ -0,0 +1,114 @@
--- binutils.orig/bfd/elf64-ppc.c 2024-01-16 10:39:26.903071936 +0000
+++ binutils-2.41/bfd/elf64-ppc.c 2024-01-16 10:39:38.650127903 +0000
@@ -4749,6 +4749,21 @@ is_8byte_reloc (enum elf_ppc64_reloc_typ
|| r_type == R_PPC64_PLTCALL);
}
+/* The RELR encoding doesn't allow odd addresses, so RELR_ALIGN must
+ be at least 1. R_PPC64_RELATIVE relocs require alignment of 2**3.
+ We use 3 here to avoid complexity in relocate_section. PR30824. */
+#define RELR_ALIGN 3
+
+static bool
+maybe_relr (enum elf_ppc64_reloc_type r_type,
+ const Elf_Internal_Rela *rel,
+ const asection *sec)
+{
+ return ((r_type == R_PPC64_ADDR64 || r_type == R_PPC64_TOC)
+ && (rel->r_offset & ((1 << RELR_ALIGN) - 1)) == 0
+ && sec->alignment_power >= RELR_ALIGN);
+}
+
/* Like bfd_reloc_offset_in_range but without a howto. Return true
iff a field of SIZE bytes at OFFSET is within SEC limits. */
@@ -5401,9 +5416,7 @@ ppc64_elf_check_relocs (bfd *abfd, struc
p->count += 1;
if (!must_be_dyn_reloc (info, r_type))
p->pc_count += 1;
- if ((r_type == R_PPC64_ADDR64 || r_type == R_PPC64_TOC)
- && rel->r_offset % 2 == 0
- && sec->alignment_power != 0)
+ if (maybe_relr (r_type, rel, sec))
p->rel_count += 1;
}
else
@@ -5438,9 +5451,7 @@ ppc64_elf_check_relocs (bfd *abfd, struc
p->ifunc = is_ifunc;
}
p->count += 1;
- if ((r_type == R_PPC64_ADDR64 || r_type == R_PPC64_TOC)
- && rel->r_offset % 2 == 0
- && sec->alignment_power != 0)
+ if (maybe_relr (r_type, rel, sec))
p->rel_count += 1;
}
}
@@ -7291,9 +7302,7 @@ dec_dynrel_count (const Elf_Internal_Rel
{
if (!must_be_dyn_reloc (info, r_type))
p->pc_count -= 1;
- if ((r_type == R_PPC64_ADDR64 || r_type == R_PPC64_TOC)
- && rel->r_offset % 2 == 0
- && sec->alignment_power != 0)
+ if (maybe_relr (r_type, rel, sec))
p->rel_count -= 1;
p->count -= 1;
if (p->count == 0)
@@ -7326,9 +7335,7 @@ dec_dynrel_count (const Elf_Internal_Rel
{
if (p->sec == sec && p->ifunc == is_ifunc)
{
- if ((r_type == R_PPC64_ADDR64 || r_type == R_PPC64_TOC)
- && rel->r_offset % 2 == 0
- && sec->alignment_power != 0)
+ if (maybe_relr (r_type, rel, sec))
p->rel_count -= 1;
p->count -= 1;
if (p->count == 0)
@@ -13869,6 +13876,9 @@ ppc64_elf_size_stubs (struct bfd_link_in
switch (r_type)
{
default:
+ if (info->enable_dt_relr
+ && maybe_relr (r_type, irela, section))
+ break;
continue;
case R_PPC64_REL24:
@@ -13880,14 +13890,6 @@ ppc64_elf_size_stubs (struct bfd_link_in
if ((section->flags & SEC_CODE) != 0)
break;
continue;
-
- case R_PPC64_ADDR64:
- case R_PPC64_TOC:
- if (info->enable_dt_relr
- && irela->r_offset % 2 == 0
- && section->alignment_power != 0)
- break;
- continue;
}
/* Now determine the call target, its name, value,
@@ -15272,7 +15274,7 @@ ppc64_elf_build_stubs (struct bfd_link_i
while (i < htab->relr_count)
{
bfd_vma base = relr_addr[i];
- BFD_ASSERT (base % 2 == 0);
+ BFD_ASSERT ((base & ((1 << RELR_ALIGN) - 1)) == 0);
bfd_put_64 (htab->elf.dynobj, base, loc);
loc += 8;
i++;
@@ -17510,9 +17512,8 @@ ppc64_elf_relocate_section (bfd *output_
if (!(info->enable_dt_relr
&& ELF64_R_TYPE (outrel.r_info) == R_PPC64_RELATIVE
- && rel->r_offset % 2 == 0
- && input_section->alignment_power != 0
- && ELF64_R_TYPE (orig_rel.r_info) != R_PPC64_UADDR64))
+ && maybe_relr (ELF64_R_TYPE (orig_rel.r_info),
+ rel, input_section)))
{
sreloc = elf_section_data (input_section)->sreloc;
if (h != NULL

167
SOURCES/binutils-revert-PLT-elision.patch
Unescape View File

@ -0,0 +1,167 @@
diff -rup binutils.orig/ld/testsuite/ld-i386/pltgot-1.d binutils-2.29.1/ld/testsuite/ld-i386/pltgot-1.d
--- binutils.orig/ld/testsuite/ld-i386/pltgot-1.d 2017-11-15 13:32:39.335065263 +0000
+++ binutils-2.29.1/ld/testsuite/ld-i386/pltgot-1.d 2017-11-15 15:03:55.649727195 +0000
@@ -2,6 +2,7 @@
#readelf: -S --wide
#as: --32
+#pass
#...
+\[ *[0-9]+\] \.plt +PROGBITS +[0-9a-f]+ +[0-9a-f]+ +0+10 +.*
#...
diff -rup binutils.orig/ld/testsuite/ld-i386/pltgot-2.d binutils-2.29.1/ld/testsuite/ld-i386/pltgot-2.d
--- binutils.orig/ld/testsuite/ld-i386/pltgot-2.d 2017-11-15 13:32:39.329065335 +0000
+++ binutils-2.29.1/ld/testsuite/ld-i386/pltgot-2.d 2017-11-15 15:04:20.803430034 +0000
@@ -3,7 +3,6 @@
#readelf: -d --wide
#as: --32
-#failif
#...
+0x[0-9a-f]+ +\(PLTREL.*
#...
diff -rup binutils.orig/ld/testsuite/ld-i386/pr19636-2d.d binutils-2.29.1/ld/testsuite/ld-i386/pr19636-2d.d
--- binutils.orig/ld/testsuite/ld-i386/pr19636-2d.d 2017-11-15 13:32:39.336065251 +0000
+++ binutils-2.29.1/ld/testsuite/ld-i386/pr19636-2d.d 2017-11-15 15:03:00.413379749 +0000
@@ -9,7 +9,7 @@ Relocation section '\.rel\.dyn' at offse
[0-9a-f]+ +[0-9a-f]+ +R_386_32 +0+ +func
[0-9a-f]+ +[0-9a-f]+ +R_386_PC32 +0+ +func
[0-9a-f]+ +[0-9a-f]+ +R_386_GLOB_DAT +0+ +func
-
+#...
Symbol table '\.dynsym' contains [0-9]+ entries:
+Num: +Value +Size Type +Bind +Vis +Ndx Name
#...
diff -rup binutils.orig/ld/testsuite/ld-i386/pr19636-2e.d binutils-2.29.1/ld/testsuite/ld-i386/pr19636-2e.d
--- binutils.orig/ld/testsuite/ld-i386/pr19636-2e.d 2017-11-15 13:32:39.330065323 +0000
+++ binutils-2.29.1/ld/testsuite/ld-i386/pr19636-2e.d 2017-11-15 15:03:28.928042882 +0000
@@ -9,7 +9,7 @@ Relocation section '\.rel\.dyn' at offse
[0-9a-f]+ +[0-9a-f]+ +R_386_32 +0+ +func
[0-9a-f]+ +[0-9a-f]+ +R_386_PC32 +0+ +func
[0-9a-f]+ +[0-9a-f]+ +R_386_GLOB_DAT +0+ +func
-
+#...
Symbol table '\.dynsym' contains [0-9]+ entries:
+Num: +Value +Size Type +Bind +Vis +Ndx Name
#...
diff -rup binutils.orig/ld/testsuite/ld-x86-64/pltgot-1.d binutils-2.29.1/ld/testsuite/ld-x86-64/pltgot-1.d
--- binutils.orig/ld/testsuite/ld-x86-64/pltgot-1.d 2017-11-15 13:32:39.415064300 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/pltgot-1.d 2017-11-15 15:08:39.333375801 +0000
@@ -2,8 +2,4 @@
#readelf: -S --wide
#as: --64
-#...
- +\[ *[0-9]+\] \.plt +PROGBITS +[0-9a-f]+ +[0-9a-f]+ +0+10 +.*
-#...
- +\[ *[0-9]+\] \.got\.plt +PROGBITS +[0-9a-f]+ +[0-9a-f]+ +0+18 +.*
#pass
diff -rup binutils.orig/ld/testsuite/ld-x86-64/pltgot-2.d binutils-2.29.1/ld/testsuite/ld-x86-64/pltgot-2.d
--- binutils.orig/ld/testsuite/ld-x86-64/pltgot-2.d 2017-11-15 13:32:39.404064432 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/pltgot-2.d 2017-11-15 15:08:59.031143095 +0000
@@ -3,7 +3,6 @@
#readelf: -d --wide
#as: --64
-#failif
#...
+0x[0-9a-f]+ +\(PLTREL.*
#...
diff -rup binutils.orig/ld/testsuite/ld-x86-64/plt-main.rd binutils-2.29.1/ld/testsuite/ld-x86-64/plt-main.rd
--- binutils.orig/ld/testsuite/ld-x86-64/plt-main.rd 2017-11-15 13:32:39.407064397 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/plt-main.rd 2017-11-15 15:06:17.244054423 +0000
@@ -1,4 +1,3 @@
-#failif
#...
[0-9a-f ]+R_X86_64_JUMP_SLOT +0+ +bar \+ 0
#...
diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr20830a.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830a.d
--- binutils.orig/ld/testsuite/ld-x86-64/pr20830a.d 2017-11-15 13:32:39.412064336 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830a.d 2017-11-15 15:15:09.918750288 +0000
@@ -20,6 +20,7 @@ Contents of the .eh_frame section:
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
DW_CFA_nop
+#pass
0+18 0000000000000014 0000001c FDE cie=00000000 pc=00000000000001c8..00000000000001d4
DW_CFA_nop
diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr20830a-now.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830a-now.d
--- binutils.orig/ld/testsuite/ld-x86-64/pr20830a-now.d 2017-11-15 13:32:39.413064324 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830a-now.d 2017-11-15 15:16:08.227055104 +0000
@@ -20,6 +20,7 @@ Contents of the .eh_frame section:
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
DW_CFA_nop
+#pass
0+18 0000000000000014 0000001c FDE cie=00000000 pc=00000000000001c8..00000000000001d4
DW_CFA_nop
diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr20830b.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830b.d
--- binutils.orig/ld/testsuite/ld-x86-64/pr20830b.d 2017-11-15 13:32:39.413064324 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830b.d 2017-11-15 15:16:20.115913358 +0000
@@ -20,7 +20,8 @@ Contents of the .eh_frame section:
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
DW_CFA_nop
-
+#pass
+
0+18 0000000000000010 0000001c FDE cie=00000000 pc=0000000000000138..0000000000000144
DW_CFA_nop
DW_CFA_nop
diff -rup binutils.orig/ld/testsuite/ld-x86-64/pr20830b-now.d binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830b-now.d
--- binutils.orig/ld/testsuite/ld-x86-64/pr20830b-now.d 2017-11-15 13:32:39.411064348 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/pr20830b-now.d 2017-11-15 15:16:29.012807282 +0000
@@ -20,7 +20,8 @@ Contents of the .eh_frame section:
DW_CFA_offset: r16 \(rip\) at cfa-8
DW_CFA_nop
DW_CFA_nop
-
+#pass
+
0+18 0000000000000010 0000001c FDE cie=00000000 pc=0000000000000138..0000000000000144
DW_CFA_nop
DW_CFA_nop
diff -rup binutils.orig/ld/testsuite/ld-x86-64/tlspic2.rd binutils-2.29.1/ld/testsuite/ld-x86-64/tlspic2.rd
--- binutils.orig/ld/testsuite/ld-x86-64/tlspic2.rd 2017-11-15 13:32:39.417064276 +0000
+++ binutils-2.29.1/ld/testsuite/ld-x86-64/tlspic2.rd 2017-11-15 15:05:02.950932110 +0000
@@ -14,6 +14,7 @@ Section Headers:
+\[[ 0-9]+\] .dynsym +.*
+\[[ 0-9]+\] .dynstr +.*
+\[[ 0-9]+\] .rela.dyn +.*
+#pass
+\[[ 0-9]+\] .plt +.*
+\[[ 0-9]+\] .plt.got +.*
+\[[ 0-9]+\] .text +PROGBITS +0+1000 0+1000 0+31a 00 +AX +0 +0 4096
--- binutils.orig/bfd/elfxx-x86.c 2018-01-22 15:59:25.875788033 +0000
+++ binutils-2.30.0/bfd/elfxx-x86.c 2018-01-22 16:00:20.789146597 +0000
@@ -107,7 +107,7 @@ elf_x86_allocate_dynrelocs (struct elf_l
plt_entry_size = htab->plt.plt_entry_size;
resolved_to_zero = UNDEFINED_WEAK_RESOLVED_TO_ZERO (info, eh);
-
+#if 0
/* We can't use the GOT PLT if pointer equality is needed since
finish_dynamic_symbol won't clear symbol value and the dynamic
linker won't update the GOT slot. We will get into an infinite
@@ -125,7 +125,7 @@ elf_x86_allocate_dynrelocs (struct elf_l
/* Use the GOT PLT. */
eh->plt_got.refcount = 1;
}
-
+#endif
/* Since STT_GNU_IFUNC symbol must go through PLT, we handle it
here if it is defined and referenced in a non-shared object. */
if (h->type == STT_GNU_IFUNC
--- binutils.orig/ld/testsuite/ld-i386/pr20830.d 2018-07-09 09:49:51.277239857 +0100
+++ binutils-2.30.90/ld/testsuite/ld-i386/pr20830.d 2018-07-09 10:32:41.113356733 +0100
@@ -19,7 +19,7 @@ Contents of the .eh_frame section:
DW_CFA_offset: r8 \(eip\) at cfa-4
DW_CFA_nop
DW_CFA_nop
-
+#pass
0+18 00000010 0000001c FDE cie=00000000 pc=00000128..00000133
DW_CFA_nop
DW_CFA_nop

239
SOURCES/binutils-riscv-SUB_ULEB128.patch
Unescape View File

@ -0,0 +1,239 @@
diff -rupN binutils.orig/bfd/elfnn-riscv.c binutils-2.41/bfd/elfnn-riscv.c
--- binutils.orig/bfd/elfnn-riscv.c 2024-01-02 17:35:07.412218130 +0000
+++ binutils-2.41/bfd/elfnn-riscv.c 2024-01-02 17:36:52.274311071 +0000
@@ -1737,7 +1737,10 @@ perform_relocation (const reloc_howto_ty
{
if (howto->pc_relative)
value -= sec_addr (input_section) + rel->r_offset;
- value += rel->r_addend;
+
+ /* PR31179, ignore the non-zero addend of R_RISCV_SUB_ULEB128. */
+ if (ELFNN_R_TYPE (rel->r_info) != R_RISCV_SUB_ULEB128)
+ value += rel->r_addend;
switch (ELFNN_R_TYPE (rel->r_info))
{
@@ -1818,10 +1821,7 @@ perform_relocation (const reloc_howto_ty
value = ENCODE_CITYPE_LUI_IMM (RISCV_CONST_HIGH_PART (value));
break;
- /* SUB_ULEB128 must be applied after SET_ULEB128, so we only write the
- value back for SUB_ULEB128 should be enough. */
- case R_RISCV_SET_ULEB128:
- break;
+ /* R_RISCV_SET_ULEB128 won't go into here. */
case R_RISCV_SUB_ULEB128:
{
unsigned int len = 0;
@@ -2514,7 +2514,7 @@ riscv_elf_relocate_section (bfd *output_
else
{
msg = ("Mismatched R_RISCV_SET_ULEB128, it must be paired with"
- "and applied before R_RISCV_SUB_ULEB128");
+ " and applied before R_RISCV_SUB_ULEB128");
r = bfd_reloc_dangerous;
}
break;
@@ -2523,14 +2523,40 @@ riscv_elf_relocate_section (bfd *output_
if (uleb128_set_rel != NULL
&& uleb128_set_rel->r_offset == rel->r_offset)
{
- relocation = uleb128_set_vma - relocation;
+ relocation = uleb128_set_vma - relocation
+ + uleb128_set_rel->r_addend;
uleb128_set_vma = 0;
uleb128_set_rel = NULL;
+
+ /* PR31179, the addend of SUB_ULEB128 should be zero if using
+ .uleb128, but we make it non-zero by accident in assembler,
+ so just ignore it in perform_relocation, and make assembler
+ continue doing the right thing. Don't reset the addend of
+ SUB_ULEB128 to zero here since it will break the --emit-reloc,
+ even though the non-zero addend is unexpected.
+
+ We encourage people to rebuild their stuff to get the
+ non-zero addend of SUB_ULEB128, but that might need some
+ times, so report warnings to inform people need to rebuild
+ if --check-uleb128 is enabled. However, since the failed
+ .reloc cases for ADD/SET/SUB/ULEB128 are rarely to use, it
+ may acceptable that stop supproting them until people rebuld
+ their stuff, maybe half-year or one year later. I believe
+ this might be the least harmful option that we should go.
+
+ Or maybe we should teach people that don't write the
+ .reloc R_RISCV_SUB* with non-zero constant, and report
+ warnings/errors in assembler. */
+ if (htab->params->check_uleb128
+ && rel->r_addend != 0)
+ _bfd_error_handler (_("%pB: warning: R_RISCV_SUB_ULEB128 with"
+ " non-zero addend, please rebuild by"
+ " Fedora 40 binutils or up"), input_bfd);
}
else
{
msg = ("Mismatched R_RISCV_SUB_ULEB128, it must be paired with"
- "and applied after R_RISCV_SET_ULEB128");
+ " and applied after R_RISCV_SET_ULEB128");
r = bfd_reloc_dangerous;
}
break;
@@ -5123,7 +5149,13 @@ _bfd_riscv_relax_section (bfd *abfd, ase
if (h != NULL && h->type == STT_GNU_IFUNC)
continue;
+ /* Maybe we should check UNDEFWEAK_NO_DYNAMIC_RELOC here? But that
+ will break the undefweak relaxation testcases, so just make sure
+ we won't do relaxations for linker_def symbols in short-term. */
if (h->root.type == bfd_link_hash_undefweak
+ /* The linker_def symbol like __ehdr_start that may be undefweak
+ for now, but will be guaranteed to be defined later. */
+ && !h->root.linker_def
&& (relax_func == _bfd_riscv_relax_lui
|| relax_func == _bfd_riscv_relax_pc))
{
diff -rupN binutils.orig/bfd/elfxx-riscv.h binutils-2.41/bfd/elfxx-riscv.h
--- binutils.orig/bfd/elfxx-riscv.h 2024-01-02 17:35:07.412218130 +0000
+++ binutils-2.41/bfd/elfxx-riscv.h 2024-01-02 17:35:24.252233056 +0000
@@ -31,6 +31,8 @@ struct riscv_elf_params
{
/* Whether to relax code sequences to GP-relative addressing. */
bool relax_gp;
+ /* Whether to check if SUB_ULEB128 relocation has non-zero addend. */
+ bool check_uleb128;
};
extern void riscv_elf32_set_options (struct bfd_link_info *,
diff -rupN binutils.orig/ld/NEWS binutils-2.41/ld/NEWS
--- binutils.orig/ld/NEWS 2024-01-02 17:35:08.012218662 +0000
+++ binutils-2.41/ld/NEWS 2024-01-02 17:35:56.139261318 +0000
@@ -1,5 +1,10 @@
-*- text -*-
+* On RISC-V, add ld target option --[no-]check-uleb128. Should rebuild the
+ objects by binutils 2.42 and up if enabling the option and get warnings,
+ since the non-zero addend of SUB_ULEB128 shouldn't be generated from .uleb128
+ directives.
+
* Added --warn-execstack-objects to warn about executable stacks only when an
input object file requests one. Also added --error-execstack and
--error-rxw-segments options to convert warnings about executable stacks and
diff -rupN binutils.orig/ld/emultempl/riscvelf.em binutils-2.41/ld/emultempl/riscvelf.em
--- binutils.orig/ld/emultempl/riscvelf.em 2024-01-02 17:35:07.699218385 +0000
+++ binutils-2.41/ld/emultempl/riscvelf.em 2024-01-02 17:35:24.252233056 +0000
@@ -25,7 +25,8 @@ fragment <<EOF
#include "elf/riscv.h"
#include "elfxx-riscv.h"
-static struct riscv_elf_params params = { .relax_gp = 1 };
+static struct riscv_elf_params params = { .relax_gp = 1,
+ .check_uleb128 = 0};
EOF
# Define some shell vars to insert bits of code into the standard elf
@@ -35,17 +36,23 @@ enum risccv_opt
{
OPTION_RELAX_GP = 321,
OPTION_NO_RELAX_GP,
+ OPTION_CHECK_ULEB128,
+ OPTION_NO_CHECK_ULEB128,
};
'
PARSE_AND_LIST_LONGOPTS=${PARSE_AND_LIST_LONGOPTS}'
{ "relax-gp", no_argument, NULL, OPTION_RELAX_GP },
{ "no-relax-gp", no_argument, NULL, OPTION_NO_RELAX_GP },
+ { "check-uleb128", no_argument, NULL, OPTION_CHECK_ULEB128 },
+ { "no-check-uleb128", no_argument, NULL, OPTION_NO_CHECK_ULEB128 },
'
PARSE_AND_LIST_OPTIONS=${PARSE_AND_LIST_OPTIONS}'
fprintf (file, _(" --relax-gp Perform GP relaxation\n"));
fprintf (file, _(" --no-relax-gp Don'\''t perform GP relaxation\n"));
+ fprintf (file, _(" --check-uleb128 Check if SUB_ULEB128 has non-zero addend\n"));
+ fprintf (file, _(" --no-check-uleb128 Don'\''t check if SUB_ULEB128 has non-zero addend\n"));
'
PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LIST_ARGS_CASES}'
@@ -56,6 +63,14 @@ PARSE_AND_LIST_ARGS_CASES=${PARSE_AND_LI
case OPTION_NO_RELAX_GP:
params.relax_gp = 0;
break;
+
+ case OPTION_CHECK_ULEB128:
+ params.check_uleb128 = 1;
+ break;
+
+ case OPTION_NO_CHECK_ULEB128:
+ params.check_uleb128 = 0;
+ break;
'
fragment <<EOF
diff -rupN binutils.orig/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp binutils-2.41/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
--- binutils.orig/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp 2024-01-02 17:35:07.942218600 +0000
+++ binutils-2.41/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp 2024-01-02 17:35:24.252233056 +0000
@@ -173,6 +173,8 @@ if [istarget "riscv*-*-*"] {
run_dump_test "attr-phdr"
run_dump_test "relax-max-align-gp"
run_dump_test "uleb128"
+ run_dump_test "pr31179"
+ run_dump_test "pr31179-r"
run_ld_link_tests [list \
[list "Weak reference 32" "-T weakref.ld -m[riscv_choose_ilp32_emul]" "" \
"-march=rv32i -mabi=ilp32" {weakref32.s} \
diff -rupN binutils.orig/ld/testsuite/ld-riscv-elf/pr31179-r.d binutils-2.41/ld/testsuite/ld-riscv-elf/pr31179-r.d
--- binutils.orig/ld/testsuite/ld-riscv-elf/pr31179-r.d 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.41/ld/testsuite/ld-riscv-elf/pr31179-r.d 2024-01-02 17:35:24.252233056 +0000
@@ -0,0 +1,10 @@
+#source: pr31179.s
+#as:
+#readelf: -Wr
+
+Relocation section '.rela.text' at .*
+[ ]+Offset[ ]+Info[ ]+Type[ ]+.*
+[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_SET_ULEB128[ ]+[0-9a-f]+[ ]+bar \+ 1
+[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_SUB_ULEB128[ ]+[0-9a-f]+[ ]+foo \+ 0
+[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_SET_ULEB128[ ]+[0-9a-f]+[ ]+bar \+ 1
+[0-9a-f]+[ ]+[0-9a-f]+[ ]+R_RISCV_SUB_ULEB128[ ]+[0-9a-f]+[ ]+foo \+ 1
diff -rupN binutils.orig/ld/testsuite/ld-riscv-elf/pr31179.d binutils-2.41/ld/testsuite/ld-riscv-elf/pr31179.d
--- binutils.orig/ld/testsuite/ld-riscv-elf/pr31179.d 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.41/ld/testsuite/ld-riscv-elf/pr31179.d 2024-01-02 17:35:24.252233056 +0000
@@ -0,0 +1,11 @@
+#source: pr31179.s
+#as:
+#ld: --check-uleb128
+#objdump: -sj .text
+#warning: .*R_RISCV_SUB_ULEB128 with non-zero addend, please rebuild by Fedora 40 binutils or up
+
+.*:[ ]+file format .*
+
+Contents of section .text:
+
+[ ]+[0-9a-f]+[ ]+00000303[ ]+.*
diff -rupN binutils.orig/ld/testsuite/ld-riscv-elf/pr31179.s binutils-2.41/ld/testsuite/ld-riscv-elf/pr31179.s
--- binutils.orig/ld/testsuite/ld-riscv-elf/pr31179.s 1970-01-01 01:00:00.000000000 +0100
+++ binutils-2.41/ld/testsuite/ld-riscv-elf/pr31179.s 2024-01-02 17:35:24.252233056 +0000
@@ -0,0 +1,13 @@
+.globl _start
+_start:
+
+foo:
+.2byte 0
+bar:
+
+.uleb128 bar - foo + 1
+
+reloc:
+.reloc reloc, R_RISCV_SET_ULEB128, bar + 1
+.reloc reloc, R_RISCV_SUB_ULEB128, foo + 1
+.byte 0x0
--- binutils.orig/gas/config/tc-riscv.c 2024-01-03 13:08:16.588286420 +0000
+++ binutils-2.41/gas/config/tc-riscv.c 2024-01-03 13:08:32.749297812 +0000
@@ -4949,6 +4949,7 @@ riscv_insert_uleb128_fixes (bfd *abfd AT
fix_new_exp (fragP, fragP->fr_fix, 0,
exp_dup, 0, BFD_RELOC_RISCV_SET_ULEB128);
exp_dup->X_add_symbol = exp->X_op_symbol;
+ exp_dup->X_add_number = 0; /* Set addend of SUB_ULEB128 to zero. */
fix_new_exp (fragP, fragP->fr_fix, 0,
exp_dup, 0, BFD_RELOC_RISCV_SUB_ULEB128);
}

136
SOURCES/binutils-riscv-testsuite-fixes.patch
Unescape View File

@ -0,0 +1,136 @@
diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/attr-phdr.d binutils-2.40/ld/testsuite/ld-riscv-elf/attr-phdr.d
--- binutils.orig/ld/testsuite/ld-riscv-elf/attr-phdr.d 2023-02-16 10:11:38.656875289 +0000
+++ binutils-2.40/ld/testsuite/ld-riscv-elf/attr-phdr.d 2023-02-16 10:49:26.786573665 +0000
@@ -12,8 +12,8 @@ Program Headers:
Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align
RISCV_ATTRIBUT .*
LOAD .*
-
+#...
Section to Segment mapping:
Segment Sections...
00 .riscv.attributes
- 01 .text
+#pass
diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d binutils-2.40/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d
--- binutils.orig/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d 2023-02-16 10:11:38.659875285 +0000
+++ binutils-2.40/ld/testsuite/ld-riscv-elf/pcgp-relax-01.d 2023-02-16 10:42:54.803431287 +0000
@@ -8,7 +8,7 @@
Disassembly of section \.text:
0+[0-9a-f]+ <_start>:
-.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a0,a0,[0-9]+
+.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a0,a0,\-[0-9]+
.*:[ ]+[0-9a-f]+[ ]+jal[ ]+ra,[0-9a-f]+ <_start>
.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a1,gp,\-[0-9]+ # [0-9a-f]+ <data_g>
.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a2,gp,\-[0-9]+ # [0-9a-f]+ <data_g>
diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d binutils-2.40/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d
--- binutils.orig/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d 2023-02-16 10:11:38.659875285 +0000
+++ binutils-2.40/ld/testsuite/ld-riscv-elf/pcgp-relax-02.d 2023-02-16 10:43:49.540306593 +0000
@@ -11,5 +11,5 @@ Disassembly of section .text:
[0-9a-f]+ <_start>:
.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+a1.*
.*:[ ]+[0-9a-f]+[ ]+addi?[ ]+a0,gp.*<data_a>
-.*:[ ]+[0-9a-f]+[ ]+addi?[ ]+a1,a1.*<data_b>
+.*:[ ]+[0-9a-f]+[ ]+mv[ ]+a1,a1
#pass
diff -rup binutils.orig/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2a.d binutils-2.40/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2a.d
--- binutils.orig/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2a.d 2023-02-16 10:11:38.659875285 +0000
+++ binutils-2.40/ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2a.d 2023-02-16 10:46:55.570899994 +0000
@@ -2,4 +2,5 @@
#source: pcrel-lo-addend-2a.s
#as: -march=rv32ic
#ld: -m[riscv_choose_ilp32_emul] --no-relax
+#skip: *-*-*
#error: .*dangerous relocation: %pcrel_lo overflow with an addend, the value of %pcrel_hi is 0x1000 without any addend, but may be 0x2000 after adding the %pcrel_lo addend
diff -rup binutils.orig/ld/testsuite/ld-elf/dwarf.exp binutils-2.40/ld/testsuite/ld-elf/dwarf.exp
--- binutils.orig/ld/testsuite/ld-elf/dwarf.exp 2023-02-16 10:11:38.515875516 +0000
+++ binutils-2.40/ld/testsuite/ld-elf/dwarf.exp 2023-02-16 11:08:52.209377332 +0000
@@ -29,6 +29,10 @@ if ![is_elf_format] {
return
}
+if { [istarget riscv*-*-*] } then {
+ return
+}
+
# Skip targets where -shared is not supported
if ![check_shared_lib_support] {
diff -rup binutils.orig/ld/testsuite/ld-elf/tls.exp binutils-2.40/ld/testsuite/ld-elf/tls.exp
--- binutils.orig/ld/testsuite/ld-elf/tls.exp 2023-02-16 10:11:38.540875476 +0000
+++ binutils-2.40/ld/testsuite/ld-elf/tls.exp 2023-02-16 11:08:56.944369374 +0000
@@ -28,6 +28,10 @@ if { !([istarget *-*-linux*]
return
}
+if { [istarget riscv*-*-*] } then {
+ return
+}
+
# Check to see if the C compiler works.
if { ![check_compiler_available] } {
return
--- binutils.orig/binutils/testsuite/binutils-all/objcopy.exp 2023-08-24 07:48:30.429195480 +0100
+++ binutils-2.41/binutils/testsuite/binutils-all/objcopy.exp 2023-08-24 07:57:05.535302711 +0100
@@ -1409,6 +1409,8 @@ proc objcopy_test_without_global_symbol
# The AArch64 and ARM targets preserve mapping symbols
# in object files, so they will fail this test.
setup_xfail aarch64*-*-* arm*-*-*
+# The RISC-V target compiles with annotation enabled and these symbols remain after stripping.
+setup_xfail riscv*-*-*
objcopy_test_without_global_symbol
--- binutils.orig/ld/testsuite/ld-plugin/plugin.exp 2023-08-24 07:48:31.808196076 +0100
+++ binutils-2.41/ld/testsuite/ld-plugin/plugin.exp 2023-08-24 07:59:30.285716568 +0100
@@ -132,6 +132,10 @@ if [is_pecoff_format] {
append libs " --image-base=0x10000000"
}
+if { [istarget riscv*-*-*] } then {
+ return
+}
+
set plugin_tests [list \
[list "load plugin" "-plugin $plugin_path \
$testobjfiles $libs" "" "" "" {{ld plugin-1.d}} "main.x" ] \
--- binutils.orig/binutils/testsuite/binutils-all/compress.exp 2023-12-11 10:09:16.923374463 +0000
+++ binutils-2.41/binutils/testsuite/binutils-all/compress.exp 2023-12-12 09:00:15.150036675 +0000
@@ -818,6 +818,10 @@ proc test_gnu_debuglink {} {
}
}
+if { [istarget riscv*-*-*] } then {
+ return
+}
+
if {[is_elf_format]} then {
test_gnu_debuglink
}
--- binutils-2.41/ld/testsuite/ld-riscv-elf/pcgp-relax-01-norelaxgp.d 2023-07-03 00:00:00.000000000 +0100
+++ binutils.new/ld/testsuite/ld-riscv-elf/pcgp-relax-01-norelaxgp.d 2023-12-12 11:52:54.564057931 +0000
@@ -8,10 +8,10 @@
Disassembly of section \.text:
0+[0-9a-f]+ <_start>:
-.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a0,a0,[0-9]+
+.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a0,a0,\-[0-9]+
.*:[ ]+[0-9a-f]+[ ]+jal[ ]+ra,[0-9a-f]+ <_start>
.*:[ ]+[0-9a-f]+[ ]+auipc[ ]+a1,0x[0-9a-f]+
-.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a1,a1,[0-9]+ # [0-9a-f]+ <data_g>
+.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a1,a1,\-[0-9]+ # [0-9a-f]+ <data_g>
.*:[ ]+[0-9a-f]+[ ]+lui[ ]+a2,0x[0-9a-f]+
.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a2,a2,[0-9]+ # [0-9a-f]+ <data_g>
.*:[ ]+[0-9a-f]+[ ]+addi[ ]+a3,tp,0 # 0 <data_t>
--- binutils.orig/binutils/testsuite/binutils-all/objcopy.exp 2023-12-12 14:21:10.225342926 +0000
+++ binutils-2.41/binutils/testsuite/binutils-all/objcopy.exp 2023-12-12 14:22:12.453421499 +0000
@@ -1410,7 +1410,7 @@ proc objcopy_test_without_global_symbol
# in object files, so they will fail this test.
setup_xfail aarch64*-*-* arm*-*-*
# The RISC-V target compiles with annotation enabled and these symbols remain after stripping.
-setup_xfail riscv*-*-*
+# setup_xfail riscv*-*-*
objcopy_test_without_global_symbol

26973
SOURCES/binutils-section-ordering.patch
View File

File diff suppressed because it is too large Load Diff

27
SOURCES/binutils-special-sections-in-groups.patch
Unescape View File

@ -0,0 +1,27 @@
--- binutils.orig/bfd/elf.c 2018-10-19 11:42:10.107277490 +0100
+++ binutils-2.31.1/bfd/elf.c 2018-10-19 11:44:33.607105801 +0100
@@ -830,7 +830,13 @@ setup_group (bfd *abfd, Elf_Internal_Shd
}
}
- if (elf_group_name (newsect) == NULL)
+ if (elf_group_name (newsect) == NULL
+ /* OS specific sections might be in a group (eg ARM's ARM_EXIDX section)
+ but they will not have been added to the group because they do not
+ have contents that the ELF code in the BFD library knows how to
+ process. This is OK though - we rely upon the target backends to
+ handle these sections for us. */
+ && hdr->sh_type < SHT_LOOS)
{
/* xgettext:c-format */
_bfd_error_handler (_("%pB: no group info for section '%pA'"),
@@ -936,7 +942,8 @@ _bfd_elf_setup_sections (bfd *abfd)
else if (idx->shdr->bfd_section)
elf_sec_group (idx->shdr->bfd_section) = shdr->bfd_section;
else if (idx->shdr->sh_type != SHT_RELA
- && idx->shdr->sh_type != SHT_REL)
+ && idx->shdr->sh_type != SHT_REL
+ && idx->shdr->sh_type < SHT_LOOS)
{
/* There are some unknown sections in the group. */
_bfd_error_handler

13
SOURCES/binutils-suppress-ld-align-tests.patch
Unescape View File

@ -0,0 +1,13 @@
--- binutils.orig/ld/testsuite/ld-elf/linux-x86.exp 2024-01-24 11:52:35.288014542 +0000
+++ binutils-2.41/ld/testsuite/ld-elf/linux-x86.exp 2024-01-24 17:31:39.356167357 +0000
@@ -225,6 +225,10 @@ if { [check_ifunc_attribute_available] }
# Old gcc silently ignores __attribute__ ((aligned())) with too big alignment.
proc compiler_honours_aligned { } {
global CC_FOR_TARGET READELF srcdir subdir
+
+ # Temporary fix for CentOS-10 kernel issue. (RHEL-22466)
+ return 0
+
ld_compile $CC_FOR_TARGET $srcdir/$subdir/p_align-1.c tmpdir/p_align-1.o
set output [run_host_cmd "$READELF" "-SW tmpdir/p_align-1.o"]
if { [regexp { [.]data *PROGBITS .* 8388608[\n]} $output] } {

986
SOURCES/binutils-testsuite-fixes.patch
Unescape View File

@ -0,0 +1,986 @@
--- binutils.orig/binutils/testsuite/binutils-all/addr2line.exp 2023-08-03 13:09:07.628503779 +0100
+++ binutils-2.41/binutils/testsuite/binutils-all/addr2line.exp 2023-08-03 13:18:37.138443954 +0100
@@ -39,7 +39,7 @@ if ![regexp -line "^(\[0-9a-fA-F\]+)? +\
} else {
set list [regexp -inline -all -- {\S+} $contents]
set got [binutils_run $ADDR2LINE "-e tmpdir/testprog$exe [lindex $list 0]"]
- set want "$srcdir/$subdir/testprog.c:\[0-9\]+"
+ set want "$srcdir/$subdir/.\*"
if ![regexp $want $got] then {
fail "$testname $got\n"
} else {
@@ -54,7 +54,7 @@ if ![regexp -line "^(\[0-9a-fA-F\]+)? +\
} else {
set list [regexp -inline -all -- {\S+} $contents]
set got [binutils_run $ADDR2LINE "-f -e tmpdir/testprog$exe [lindex $list 0]"]
- set want "fn\n$srcdir/$subdir/testprog.c:\[0-9\]+"
+ set want "fn\n$srcdir/$subdir/.\*"
if ![regexp $want $got] then {
fail "$testname -f option $got\n"
} else {
@@ -64,7 +64,7 @@ if ![regexp -line "^(\[0-9a-fA-F\]+)? +\
#testcase for -s option.
#Using the same fn function address used in -f option.
set got [binutils_run $ADDR2LINE "-s -e tmpdir/testprog$exe [lindex $list 0]"]
- set want "testprog.c:\[0-9\]+"
+ set want ".\*\[0-9\]+"
if ![regexp $want $got] then {
fail "$testname -s option $got\n"
} else {
--- binutils.orig/binutils/testsuite/binutils-all/objdump.exp 2023-08-03 13:09:07.631503783 +0100
+++ binutils-2.41/binutils/testsuite/binutils-all/objdump.exp 2023-08-03 14:51:54.621295727 +0100
@@ -921,7 +921,7 @@ proc test_objdump_S { } {
}
}
-test_objdump_S
+# test_objdump_S
# Test objdump --private
proc test_objdump_P {} {
--- binutils.orig/ld/testsuite/ld-scripts/ld-version.d 2023-08-03 13:09:07.949504208 +0100
+++ binutils-2.41/ld/testsuite/ld-scripts/ld-version.d 2023-08-03 15:13:01.374590134 +0100
@@ -4,4 +4,4 @@
# target: [is_elf_format]
String dump of section '.comment':
-.*GNU ld \(.*\) 2.*
+.*GNU ld .* 2.*
--- binutils.orig/ld/testsuite/ld-scripts/ld-version-2.d 2023-08-03 13:09:07.949504208 +0100
+++ binutils-2.41/ld/testsuite/ld-scripts/ld-version-2.d 2023-08-03 15:13:13.917605323 +0100
@@ -4,4 +4,4 @@
# target: [is_elf_format]
String dump of section '.comment':
-.*GNU ld \(.*\) 2.*
+.*GNU ld .* 2.*
--- binutils.orig/ld/testsuite/ld-x86-64/pr22001-1b.err 2023-08-03 13:09:07.969504235 +0100
+++ binutils-2.41/ld/testsuite/ld-x86-64/pr22001-1b.err 2023-08-03 15:22:49.743286617 +0100
@@ -1,2 +1,2 @@
-.*relocation R_X86_64_32S against symbol `copy' can not be used when making a P(D|I)E object; recompile with -fPIE
+.*relocation R_X86_64_.* against symbol `copy' can not be used when making a P(D|I)E object; recompile with -fPIE
#...
--- binutils.orig/ld/testsuite/ld-x86-64/plt-main-ibt.dd 2023-08-03 13:09:07.965504230 +0100
+++ binutils-2.41/ld/testsuite/ld-x86-64/plt-main-ibt.dd 2023-08-03 15:31:54.864037693 +0100
@@ -1,7 +1,2 @@
#...
-Disassembly of section .plt.got:
-
-[a-f0-9]+ <[_a-z]+@plt>:
-[ ]*[a-f0-9]+: f3 0f 1e fa endbr64
-[ ]*[a-f0-9]+: ff 25 .. .. 3f 00 jmp +\*0x3f....\(%rip\) # ...... <.*>
#pass
--- binutils.orig/ld/testsuite/ld-x86-64/x86-64.exp 2023-08-03 13:09:07.975504243 +0100
+++ binutils-2.41/ld/testsuite/ld-x86-64/x86-64.exp 2023-08-03 15:46:29.537416942 +0100
@@ -1386,7 +1386,7 @@ if { [isnative] && [check_compiler_avail
"$NOPIE_LDFLAGS -Wl,--no-as-needed tmpdir/libprotected-func-2b.so" \
"$NOPIE_CFLAGS -Wa,-mx86-used-note=yes" \
{ protected-func-1b.c } \
- {{error_output "pr28875-func.err"}} \
+ {} \
"protected-func-2" \
] \
[list \
@@ -1402,7 +1402,7 @@ if { [isnative] && [check_compiler_avail
"$NOPIE_LDFLAGS -Wl,--no-as-needed tmpdir/libprotected-func-2c.so" \
"$NOPIE_CFLAGS -Wa,-mx86-used-note=yes" \
{ protected-func-1b.c } \
- {{error_output "pr28875-func.err"}} \
+ {} \
"protected-func-2a" \
] \
[list \
@@ -2155,7 +2155,6 @@ if { [isnative] && [check_compiler_avail
}
}
- undefined_weak "$NOPIE_CFLAGS" "$NOPIE_LDFLAGS"
undefined_weak "-fPIE" ""
undefined_weak "-fPIE" "-pie"
undefined_weak "-fPIE" "-Wl,-z,nodynamic-undefined-weak"
--- binutils.orig/binutils/testsuite/binutils-all/addr2line.exp 2023-08-04 14:00:37.692356718 +0100
+++ binutils-2.41/binutils/testsuite/binutils-all/addr2line.exp 2023-08-04 14:04:32.627697316 +0100
@@ -39,9 +39,9 @@ if ![regexp -line "^(\[0-9a-fA-F\]+)? +\
} else {
set list [regexp -inline -all -- {\S+} $contents]
set got [binutils_run $ADDR2LINE "-e tmpdir/testprog$exe [lindex $list 0]"]
- set want "$srcdir/$subdir/.\*"
+ set want "$srcdir/.\*"
if ![regexp $want $got] then {
- fail "$testname $got\n"
+ fail "$testname\n wanted: $srcdir/$subdir/.*\n got: $got\n"
} else {
pass "$testname"
}
@@ -54,7 +54,7 @@ if ![regexp -line "^(\[0-9a-fA-F\]+)? +\
} else {
set list [regexp -inline -all -- {\S+} $contents]
set got [binutils_run $ADDR2LINE "-f -e tmpdir/testprog$exe [lindex $list 0]"]
- set want "fn\n$srcdir/$subdir/.\*"
+ set want "fn\n$srcdir/.\*"
if ![regexp $want $got] then {
fail "$testname -f option $got\n"
} else {
--- binutils.orig/ld/testsuite/ld-x86-64/plt-main-ibt.dd 2023-08-04 14:00:38.923357454 +0100
+++ binutils-2.41/ld/testsuite/ld-x86-64/plt-main-ibt.dd 2023-08-04 14:06:45.525679653 +0100
@@ -1,2 +1,3 @@
#...
+
#pass
--- binutils.orig/binutils/testsuite/binutils-all/addr2line.exp 2023-08-04 16:05:44.678916015 +0100
+++ binutils-2.41/binutils/testsuite/binutils-all/addr2line.exp 2023-08-04 16:08:23.779024539 +0100
@@ -39,7 +39,7 @@ if ![regexp -line "^(\[0-9a-fA-F\]+)? +\
} else {
set list [regexp -inline -all -- {\S+} $contents]
set got [binutils_run $ADDR2LINE "-e tmpdir/testprog$exe [lindex $list 0]"]
- set want "$srcdir/.\*"
+ set want ".*"
if ![regexp $want $got] then {
fail "$testname\n wanted: $srcdir/$subdir/.*\n got: $got\n"
} else {
@@ -54,7 +54,7 @@ if ![regexp -line "^(\[0-9a-fA-F\]+)? +\
} else {
set list [regexp -inline -all -- {\S+} $contents]
set got [binutils_run $ADDR2LINE "-f -e tmpdir/testprog$exe [lindex $list 0]"]
- set want "fn\n$srcdir/.\*"
+ set want "fn\n.*"
if ![regexp $want $got] then {
fail "$testname -f option $got\n"
} else {
--- binutils.orig/ld/testsuite/ld-plugin/lto.exp 2023-08-04 16:05:45.721916727 +0100
+++ binutils-2.41/ld/testsuite/ld-plugin/lto.exp 2023-08-04 16:13:11.794221039 +0100
@@ -31,8 +31,8 @@ if { ![check_plugin_api_available]
set saved_CFLAGS "$CFLAGS_FOR_TARGET"
set saved_CXXFLAGS "$CXXFLAGS_FOR_TARGET"
-regsub -all "(\\-Wp,)?-D_FORTIFY_SOURCE=\[0-9\]+" $CFLAGS_FOR_TARGET "" CFLAGS_FOR_TARGET
-regsub -all "(\\-Wp,)?-D_FORTIFY_SOURCE=\[0-9\]+" $CXXFLAGS_FOR_TARGET "" CXXFLAGS_FOR_TARGET
+# regsub -all "(\\-Wp,)?-D_FORTIFY_SOURCE=\[0-9\]+" $CFLAGS_FOR_TARGET "" CFLAGS_FOR_TARGET
+# regsub -all "(\\-Wp,)?-D_FORTIFY_SOURCE=\[0-9\]+" $CXXFLAGS_FOR_TARGET "" CXXFLAGS_FOR_TARGET
proc restore_notify { } {
global saved_CFLAGS
--- binutils.orig/ld/testsuite/ld-plugin/lto.exp 2023-08-04 16:43:51.926589278 +0100
+++ binutils-2.41/ld/testsuite/ld-plugin/lto.exp 2023-08-04 16:45:14.323650391 +0100
@@ -474,7 +474,7 @@ set lto_link_elf_tests [list \
[list \
"Build libpr28879a.so" \
"-shared" \
- "-O0 -fpic" \
+ "-O2 -fpic" \
{pr28879a.cc} \
{} \
"libpr28879a.so" \
@@ -491,7 +491,7 @@ set lto_link_elf_tests [list \
[list \
"Build pr28879" \
"-Wl,--no-as-needed tmpdir/libpr28879b.so -Wl,-rpath-link,." \
- "-O0 -flto -D_GLIBCXX_ASSERTIONS" \
+ "-O2 -flto -D_GLIBCXX_ASSERTIONS" \
{pr28879b.cc} \
{} \
"pr28879" \
@@ -525,7 +525,7 @@ set lto_link_elf_tests [list \
[list \
"PR ld/pr29086" \
"-Wl,--wrap=foo" \
- "-O0 -flto" \
+ "-O2 -flto" \
{pr29086.c} \
{} \
"pr29086" \
diff -rup binutils.orig/ld/testsuite/ld-aarch64/bti-plt-5.d binutils-2.41/ld/testsuite/ld-aarch64/bti-plt-5.d
--- binutils.orig/ld/testsuite/ld-aarch64/bti-plt-5.d 2023-08-15 09:03:21.676463687 +0100
+++ binutils-2.41/ld/testsuite/ld-aarch64/bti-plt-5.d 2023-08-15 09:17:56.751533569 +0100
@@ -12,8 +12,8 @@ Disassembly of section \.plt:
[0-9a-f]+ <.*>:
.*: d503245f bti c
.*: a9bf7bf0 stp x16, x30, \[sp, #-16\]!
-.*: 90000090 adrp x16, 410000 <.*>
-.*: f9...... ldr x17, \[x16, #....\]
+.*: 90000090 adrp x16, 4.0000 <.*>
+.*: f9...... ldr x17, \[x16, #.*\]
.*: 91...... add x16, x16, #0x...
.*: d61f0220 br x17
.*: d503201f nop
@@ -21,8 +21,8 @@ Disassembly of section \.plt:
[0-9a-f]+ <.*>:
.*: d503245f bti c
-.*: 90000090 adrp x16, 410000 <.*>
-.*: f9...... ldr x17, \[x16, #....\]
+.*: 90000090 adrp x16, 4.0000 <.*>
+.*: f9...... ldr x17, \[x16, #.*\]
.*: 91...... add x16, x16, #0x...
.*: d61f0220 br x17
.*: d503201f nop
diff -rup binutils.orig/ld/testsuite/ld-aarch64/erratum843419-far-full.d binutils-2.41/ld/testsuite/ld-aarch64/erratum843419-far-full.d
--- binutils.orig/ld/testsuite/ld-aarch64/erratum843419-far-full.d 2023-08-15 09:03:21.683463694 +0100
+++ binutils-2.41/ld/testsuite/ld-aarch64/erratum843419-far-full.d 2023-08-15 09:05:41.549608111 +0100
@@ -8,7 +8,7 @@ Disassembly of section \.text:
0*400000 <_start>:
...
- 400ffc: 90400000 adrp x0, 80400000 <__bss_end__\+0x7ffedff0>
+ 400ffc: 90400000 adrp x0, 80400000 <__bss_end__\+0x[0-9a-f]+>
401000: f9000042 str x2, \[x2\]
401004: d2800002 mov x2, #0x0 // #0
401008: 14000004 b 401018 <e843419@0002_00000010_1008>
@@ -18,5 +18,5 @@ Disassembly of section \.text:
0*401018 <e843419@0002_00000010_1008>:
401018: f9402001 ldr x1, \[x0, #64\]
- 40101c: 17fffffc b 40100c <_start\+0x100c>
+ 40101c: 17fffffc b 40100c <_start\+0x[0-9a-f]+>
...
diff -rup binutils.orig/ld/testsuite/ld-aarch64/farcall-b-plt.d binutils-2.41/ld/testsuite/ld-aarch64/farcall-b-plt.d
--- binutils.orig/ld/testsuite/ld-aarch64/farcall-b-plt.d 2023-08-15 09:03:21.683463694 +0100
+++ binutils-2.41/ld/testsuite/ld-aarch64/farcall-b-plt.d 2023-08-15 09:07:02.046699709 +0100
@@ -10,7 +10,7 @@ Disassembly of section .plt:
.* <.plt>:
.*: a9bf7bf0 stp x16, x30, \[sp, #-16\]!
-.*: .* adrp x16, .* <__foo_veneer\+.*>
+.*: .* adrp x16, .* <.*>
.*: .* ldr [wx]17, \[x16, #.*\]
.*: .* add [wx]16, [wx]16, #.*
.*: d61f0220 br x17
@@ -19,7 +19,7 @@ Disassembly of section .plt:
.*: d503201f nop
.* <foo@plt>:
-.*: .* adrp x16, .* <__foo_veneer\+.*>
+.*: .* adrp x16, .* <.*>
.*: .* ldr [wx]17, \[x16, #.*\]
.*: .* add [wx]16, [wx]16, #.*
.*: d61f0220 br x17
@@ -35,7 +35,7 @@ Disassembly of section .text:
.*: .* nop
.* <__foo_veneer>:
-.*: .* adrp x16, 0 <.*>
+.*: .* adrp x16, [0-9a-f]+ <.*>
.*: .* add x16, x16, #.*
.*: d61f0200 br x16
...
diff -rup binutils.orig/ld/testsuite/ld-aarch64/farcall-bl-plt.d binutils-2.41/ld/testsuite/ld-aarch64/farcall-bl-plt.d
--- binutils.orig/ld/testsuite/ld-aarch64/farcall-bl-plt.d 2023-08-15 09:03:21.684463695 +0100
+++ binutils-2.41/ld/testsuite/ld-aarch64/farcall-bl-plt.d 2023-08-15 09:07:53.198757913 +0100
@@ -10,7 +10,7 @@ Disassembly of section .plt:
.* <.plt>:
.*: a9bf7bf0 stp x16, x30, \[sp, #-16\]!
-.*: .* adrp x16, .* <__foo_veneer\+.*>
+.*: .* adrp x16, .* <.*>
.*: .* ldr [wx]17, \[x16, #.*\]
.*: .* add [wx]16, [wx]16, #.*
.*: d61f0220 br x17
@@ -19,7 +19,7 @@ Disassembly of section .plt:
.*: d503201f nop
.* <foo@plt>:
-.*: .* adrp x16, .* <__foo_veneer\+.*>
+.*: .* adrp x16, .* <.*>
.*: .* ldr [wx]17, \[x16, #.*\]
.*: .* add [wx]16, [wx]16, #.*
.*: d61f0220 br x17
@@ -35,7 +35,7 @@ Disassembly of section .text:
.*: .* nop
.* <__foo_veneer>:
-.*: .* adrp x16, 0 <.*>
+.*: .* adrp x16, [0-9a-f]+ <.*>
.*: .* add x16, x16, #.*
.*: d61f0200 br x16
...
diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-1-local.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-1-local.d
--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-1-local.d 2023-08-15 09:03:21.685463696 +0100
+++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-1-local.d 2023-08-15 09:08:50.622823248 +0100
@@ -3,7 +3,3 @@
#objdump: -dw
-#...
-0+(110|180|1a0) <(__GI_)?foo>:
-#...
-[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+(0x110|0x180|0x1a0)@plt>
#pass
diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-1.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-1.d
--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-1.d 2023-08-15 09:03:21.685463696 +0100
+++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-1.d 2023-08-15 09:08:18.190786345 +0100
@@ -3,7 +3,3 @@
#objdump: -dw
-#...
-0+(130|1a0|1c8) <foo>:
-#...
-[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(130|1a0|1c8)@plt>
#pass
diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-2-local.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-2-local.d
--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-2-local.d 2023-08-15 09:03:21.685463696 +0100
+++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-2-local.d 2023-08-15 09:09:27.982865763 +0100
@@ -3,8 +3,6 @@
#objdump: -dw
#...
-0+(110|180|1a0) <__GI_foo>:
-#...
[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(110|180|1a0)@plt>
[ \t0-9a-f]+:[ \t0-9a-f]+adrp[ \t]+x0, 0 <.*>
[ \t0-9a-f]+:[ \t0-9a-f]+add[ \t]+x0, x0, #0x(100|170|190)
diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-2.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-2.d
--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-2.d 2023-08-15 09:03:21.686463697 +0100
+++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-2.d 2023-08-15 09:09:14.350850251 +0100
@@ -3,8 +3,6 @@
#objdump: -dw
#...
-0+(130|1a0|1c8) <foo>:
-#...
[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(130|1a0|1c8)@plt>
[ \t0-9a-f]+:[ \t0-9a-f]+adrp[ \t]+x0, 0 <.*>
[ \t0-9a-f]+:[ \t0-9a-f]+add[ \t]+x0, x0, #0x(120|190|1b8)
diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-21.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-21.d
--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-21.d 2023-08-15 09:03:21.686463697 +0100
+++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-21.d 2023-08-15 09:13:27.007155679 +0100
@@ -11,7 +11,7 @@ Contents of section .text:
[0-9a-f]+ .*
Contents of section .got.plt:
[0-9a-f]+ 0+ 0+ 0+ 0+ .*
- (10298|102b8) 0+ 0+ [0-9a-f]+ [0-9a-f]+ .*
+ (10298|102b8|20108) 0+ 0+ [0-9a-f]+ [0-9a-f]+ .*
Disassembly of section .text:
@@ -19,8 +19,8 @@ Disassembly of section .text:
.*: d65f03c0 ret
.* <bar>:
- .*: 90000080 adrp x0, 10000 <.*>
- .*: .* ldr x0, \[x0, #(672|704)\]
+ .*: 90000080 adrp x0, .0000 <.*>
+ .*: .* ldr x0, \[x0, #(672|704|272)\]
.*: d65f03c0 ret
#pass
diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-22.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-22.d
--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-22.d 2023-08-15 09:03:21.686463697 +0100
+++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-22.d 2023-08-15 09:14:02.191199743 +0100
@@ -8,4 +8,4 @@
.*: file format elf64-(little|big)aarch64
Contents of section \.got:
- [0-9a-f]+ 00000000 00000000 (d0004000|18004000|00000000) (00000000|004000d0|00400018) .*
+#pass
diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-3a.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-3a.d
--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-3a.d 2023-08-15 09:03:21.686463697 +0100
+++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-3a.d 2023-08-15 09:09:42.174882286 +0100
@@ -4,7 +4,5 @@
#objdump: -dw
#...
-0+(150|1d0|1e8) <__GI_foo>:
-#...
[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(150|1d0|1e8)@plt>
#pass
diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-7c.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-7c.d
--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-7c.d 2023-08-15 09:03:21.686463697 +0100
+++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-7c.d 2023-08-15 09:11:37.716022782 +0100
@@ -11,9 +11,9 @@
Disassembly of section \.text:
[0-9a-f]+ <foo>:
- [0-9a-f]+: d65f03c0 ret
+[ ]+[0-9a-f]+:[ ]+d65f03c0[ ]+ret
[0-9a-f]+ <__start>:
- [0-9a-f]+: [0-9a-f]+ bl [0-9a-f]+ <\*ABS\*\+0x[0-9a-f]+@plt>
- [0-9a-f]+: [0-9a-f]+ adrp x0, [0-9]+ <__start\+0x[0-9a-f]+>
- [0-9a-f]+: [0-9a-f]+ ldr x0, \[x0, .+\]
+[ ]+[0-9a-f]+:[ ]+[0-9a-f]+[ ]+bl[ ]+[0-9a-f]+ <\*ABS\*\+0x[0-9a-f]+@plt>
+[ ]+[0-9a-f]+:[ ]+[0-9a-f]+[ ]+adrp[ ]+x0, [0-9]+ <.*>
+[ ]+[0-9a-f]+:[ ]+[0-9a-f]+[ ]+ldr[ ]+x0, \[x0, .+\]
diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-2-local.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-2-local.d
--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-2-local.d 2023-08-15 11:17:45.947214180 +0100
+++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-2-local.d 2023-08-15 11:18:17.319251036 +0100
@@ -2,8 +2,4 @@
#ld: -shared --hash-style=sysv
#objdump: -dw
-#...
-[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(110|180|1a0)@plt>
-[ \t0-9a-f]+:[ \t0-9a-f]+adrp[ \t]+x0, 0 <.*>
-[ \t0-9a-f]+:[ \t0-9a-f]+add[ \t]+x0, x0, #0x(100|170|190)
#pass
diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-2.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-2.d
--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-2.d 2023-08-15 11:17:45.947214180 +0100
+++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-2.d 2023-08-15 11:18:02.935234133 +0100
@@ -2,8 +2,4 @@
#ld: -shared --hash-style=sysv
#objdump: -dw
-#...
-[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(130|1a0|1c8)@plt>
-[ \t0-9a-f]+:[ \t0-9a-f]+adrp[ \t]+x0, 0 <.*>
-[ \t0-9a-f]+:[ \t0-9a-f]+add[ \t]+x0, x0, #0x(120|190|1b8)
#pass
diff -rup binutils.orig/ld/testsuite/ld-aarch64/ifunc-3a.d binutils-2.41/ld/testsuite/ld-aarch64/ifunc-3a.d
--- binutils.orig/ld/testsuite/ld-aarch64/ifunc-3a.d 2023-08-15 11:17:45.947214180 +0100
+++ binutils-2.41/ld/testsuite/ld-aarch64/ifunc-3a.d 2023-08-15 11:18:37.703274987 +0100
@@ -3,6 +3,4 @@
#ld: -shared --hash-style=sysv
#objdump: -dw
-#...
-[ \t0-9a-f]+:[ \t0-9a-f]+bl[ \t0-9a-f]+<\*ABS\*\+0x(150|1d0|1e8)@plt>
#pass
--- binutils.orig/ld/testsuite/ld-elf/binutils.exp 2023-08-15 14:30:13.138890662 +0100
+++ binutils-2.41/ld/testsuite/ld-elf/binutils.exp 2023-08-15 14:33:16.133301230 +0100
@@ -174,7 +174,7 @@ binutils_test strip "-T ${srcdir}/${subd
set tls_tests { "tdata1" "tdata2" }
# hppa64 has its own .tbss section, with different flags.
-if { ![istarget "hppa64-*-*"] } {
+if { ![istarget "hppa64-*-*"] && ![istarget "powerpc*-*-*"] } {
lappend tls_tests "tdata3" "tbss1" "tbss2" "tbss3"
}
set tls_opts {
diff -rup binutils.orig/ld/testsuite/ld-powerpc/powerpc.exp binutils-2.41/ld/testsuite/ld-powerpc/powerpc.exp
--- binutils.orig/ld/testsuite/ld-powerpc/powerpc.exp 2023-08-15 14:30:13.277890866 +0100
+++ binutils-2.41/ld/testsuite/ld-powerpc/powerpc.exp 2023-08-15 14:41:18.582395219 +0100
@@ -126,65 +126,6 @@ set ppcelftests {
"tls32no"}
{"TLS32 helper shared library" "-shared -melf32ppc tmpdir/tlslib32.o" "" "" {}
{} "libtlslib32.so"}
- {"TLS32 dynamic exec" "-melf32ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls32.o tmpdir/libtlslib32.so" "" "" {}
- {{readelf -WSsrl tlsexe32.r} {objdump -dr tlsexe32.d}
- {objdump -sj.got tlsexe32.g} {objdump -sj.tdata tlsexe32.t}}
- "tlsexe32"}
- {"TLS32 dynamic exec (--no-tls-optimize)" "-melf32ppc --no-tls-optimize --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls32.o tmpdir/libtlslib32.so" "" "" {}
- {{readelf -WSsrl tlsexe32no.r} {objdump -dr tlsexe32no.d}
- {objdump -sj.got tlsexe32no.g} {objdump -sj.tdata tlsexe32.t}}
- "tlsexe32no"}
- {"TLS32 shared" "-shared -melf32ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv -z notext tmpdir/tls32.o" "" "" {}
- {{readelf -WSsrl tlsso32.r} {objdump -dr tlsso32.d}
- {objdump -sj.got tlsso32.g} {objdump -sj.tdata tlsso32.t}}
- "tls32.so"}
- {"TLS32 markers" "-melf32ppc" "" "-a32" {tlsmark32.s tlslib32.s}
- {{objdump -dr tlsmark32.d}}
- "tlsmark32"}
- {"TLS32 opt 1" "-melf32ppc" "" "-a32" {tlsopt1_32.s tlslib32.s}
- {{objdump -dr tlsopt1_32.d}}
- "tlsopt1_32"}
- {"TLS32 opt 2" "-melf32ppc" "" "-a32" {tlsopt2_32.s tlslib32.s}
- {{objdump -dr tlsopt2_32.d}}
- "tlsopt2_32"}
- {"TLS32 opt 3" "-melf32ppc" "" "-a32" {tlsopt3_32.s tlslib32.s}
- {{objdump -dr tlsopt3_32.d}}
- "tlsopt3_32"}
- {"TLS32 opt 4" "-melf32ppc" "" "-a32" {tlsopt4_32.s tlslib32.s}
- {{objdump -dr tlsopt4_32.d}}
- "tlsopt4_32"}
- {"TLS32 DLL" "-shared -melf32ppc --version-script tlsdll.ver" ""
- "-a32" {tlsdll_32.s}
- {} "tlsdll32.so"}
- {"TLS32 opt 5" "-melf32ppc -shared --gc-sections --secure-plt --no-plt-align tmpdir/tlsdll32.so" "" "-a32" {tlsopt5_32.s}
- {{objdump -dr tlsopt5_32.d}}
- "tlsopt5_32"}
- {"Shared library with global symbol" "-shared -melf32ppc" "" "-a32" {sdalib.s}
- {} "sdalib.so"}
- {"Dynamic application with SDA" "-melf32ppc tmpdir/sdalib.so" "" "-a32" {sdadyn.s}
- {{objdump -R sdadyn.d}} "sdadyn"}
- {"relaxing" "-melf32ppc --relax -Ttext=0 --defsym far=0x80001234 --defsym near=0x00004320" "" "-a32" "relax.s"
- {{objdump -dr relax.d}}
- "relax"}
- {"relocatable relaxing" "-melf32ppc -r --relax" "" "-a32" "relax.s"
- {{objdump -dr relaxr.d}}
- "rrelax"}
- {"relocatable relaxing large" "-melf32ppc -r --relax" "" "-a32" "relax.s big.s"
- {{objdump -dr relaxrl.d}}
- "rrelax"}
- {"build empty shared library" "-shared" "" "" "empty.s" {} "empty.so"}
- {"abs32-static" "-melf32ppc -static --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x12345678" ""
- "-a32" {abs32-reloc.s}
- {{objdump {-dr} abs32-static.d}
- {readelf {-rW} abs32-static.r}} "abs32-static"}
- {"abs32-pie" "-melf32ppc -pie --hash-style=sysv --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x12345678" ""
- "-a32" {abs32-reloc.s}
- {{objdump {-dr} abs32-pie.d}
- {readelf {-rW} abs32-pie.r}} "abs32-pie"}
- {"abs32-shared" "-melf32ppc -shared --hash-style=sysv --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x12345678" ""
- "-a32" {abs32-reloc.s}
- {{objdump {-dr} abs32-shared.d}
- {readelf {-rW} abs32-shared.r}} "abs32-shared"}
}
set ppc64elftests {
@@ -192,200 +133,6 @@ set ppc64elftests {
"-a64 --defsym TLSMARK=1" {tls.s tlslib.s}
{{objdump -dr tls.d} {objdump -sj.got tls.g} {objdump -sj.tdata tls.t}}
"tlsm"}
- {"TLS static exec" "-melf64ppc --no-plt-align" "" "-a64" {tls.s tlslib.s}
- {{objdump -dr tls.d} {objdump -sj.got tls.g} {objdump -sj.tdata tls.t}}
- "tls"}
- {"TLS static exec (--no-tls-optimize)" "-melf64ppc --no-tls-optimize --no-plt-align" ""
- "-a64 --defsym TLSMARK=1" {tls.s tlslib.s}
- {{objdump -dr tlsno.d} {objdump -sj.got tlsno.g} {objdump -sj.tdata tls.t}}
- "tlsno"}
- {"TLS helper shared library" "-shared -melf64ppc tmpdir/tlslib.o" "" "" {}
- {} "libtlslib.so"}
- {"TLS helper old shared lib" "-shared -melf64ppc" "" "-a64" {oldtlslib.s}
- {} "liboldlib.so"}
- {"TLS dynamic exec" "-melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls.o tmpdir/libtlslib.so" "" "" {}
- {{readelf -WSsrl tlsexe.r} {objdump -dr tlsexe.d}
- {objdump -sj.got tlsexe.g} {objdump -sj.tdata tlsexe.t}}
- "tlsexe"}
- {"TLS dynamic old" "-melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls.o tmpdir/liboldlib.so" "" "" {}
- {{readelf -WSsrl tlsexe.r} {objdump -dr tlsexe.d}
- {objdump -sj.got tlsexe.g} {objdump -sj.tdata tlsexe.t}}
- "tlsexeold"}
- {"TLS dynamic exec (--no-tls-optimize)" "-melf64ppc --no-tls-optimize --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls.o tmpdir/libtlslib.so" "" "" {}
- {{readelf -WSsrl tlsexeno.r} {objdump -dr tlsexeno.d}
- {objdump -sj.got tlsexeno.g} {objdump -sj.tdata tlsexe.t}}
- "tlsexeno"}
- {"TLS shared" "-shared -melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv -z notext tmpdir/tls.o" "" "" {}
- {{readelf -WSsrl tlsso.r} {objdump -dr tlsso.d}
- {objdump -sj.got tlsso.g} {objdump -sj.tdata tlsso.t}}
- "tls.so"}
- {"TLSTOC static exec" "-melf64ppc tmpdir/tlslib.o" "" "-a64" {tlstoc.s}
- {{objdump -dr tlstoc.d} {objdump -sj.got tlstoc.g}
- {objdump -sj.tdata tlstoc.t}}
- "tlstoc"}
- {"TLSTOC static exec (--no-tls-optimize)" "-melf64ppc --no-tls-optimize tmpdir/tlslib.o tmpdir/tlstoc.o" "" "" {}
- {{objdump -dr tlstocno.d} {objdump -sj.got tlstocno.g}
- {objdump -sj.tdata tlstoc.t}}
- "tlstocno"}
- {"TLSTOC dynamic exec" "-melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tlstoc.o tmpdir/libtlslib.so" ""
- "" {}
- {{readelf -WSsrl tlsexetoc.r} {objdump -dr tlsexetoc.d}
- {objdump -sj.got tlsexetoc.g} {objdump -sj.tdata tlsexetoc.t}}
- "tlsexetoc"}
- {"TLSTOC dynamic old" "-melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tlstoc.o tmpdir/liboldlib.so" ""
- "" {}
- {{readelf -WSsrl tlsexetoc.r} {objdump -dr tlsexetoc.d}
- {objdump -sj.got tlsexetoc.g} {objdump -sj.tdata tlsexetoc.t}}
- "tlsexetocold"}
- {"TLSTOC dynamic exec (--no-tls-optimize)" "-melf64ppc --no-tls-optimize --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tlstoc.o tmpdir/libtlslib.so" ""
- "" {}
- {{readelf -WSsrl tlsexetoc.r} {objdump -dr tlsexetocno.d}
- {objdump -sj.got tlsexetocno.g} {objdump -sj.tdata tlsexetoc.t}}
- "tlsexetocno"}
- {"TLSTOC shared" "-shared -melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv -z notext tmpdir/tlstoc.o" "" "" {}
- {{readelf -WSsrl tlstocso.r} {objdump -dr tlstocso.d}
- {objdump -sj.got tlstocso.g} {objdump -sj.tdata tlstocso.t}}
- "tlstoc.so"}
- {"TLS dynamic exec (--tls-get-addr-regsave)" "-melf64ppc --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv --tls-get-addr-regsave tmpdir/tls.o tmpdir/libtlslib.so" "" "" {}
- {{readelf -WSsrl tlsexers.r} {objdump -dr tlsexers.d}
- {objdump -sj.got tlsexe.g} {objdump -sj.tdata tlsexe.t}}
- "tlsexers"}
- {"TLS dynamic exec (--no-tls-optimize --tls-get-addr-regsave)" "-melf64ppc --no-tls-optimize --tls-get-addr-regsave --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tls.o tmpdir/libtlslib.so" "" "" {}
- {{readelf -WSsrl tlsexenors.r} {objdump -dr tlsexenors.d}
- {objdump -sj.got tlsexeno.g} {objdump -sj.tdata tlsexe.t}}
- "tlsexenors"}
- {"TLSTOC dynamic exec (--tls-get-addr-regsave)" "-melf64ppc --tls-get-addr-regsave --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tlstoc.o tmpdir/libtlslib.so" ""
- "" {}
- {{readelf -WSsrl tlsexetocrs.r} {objdump -dr tlsexetocrs.d}
- {objdump -sj.got tlsexetoc.g} {objdump -sj.tdata tlsexetoc.t}}
- "tlsexetocrs"}
- {"TLSTOC dynamic exec (--no-tls-optimize --tls-get-addr-regsave)" "-melf64ppc --no-tls-optimize --tls-get-addr-regsave --no-plt-align --no-ld-generated-unwind-info --hash-style=sysv tmpdir/tlstoc.o tmpdir/libtlslib.so" ""
- "" {}
- {{readelf -WSsrl tlsexetocrs.r} {objdump -dr tlsexetocnors.d}
- {objdump -sj.got tlsexetocno.g} {objdump -sj.tdata tlsexetoc.t}}
- "tlsexetocnors"}
- {"TLS markers" "-melf64ppc" "" "-a64" {tlsmark.s tlslib.s}
- {{objdump -dr tlsmark.d}}
- "tlsmark"}
- {"TLS opt 1" "-melf64ppc" "" "-a64" {tlsopt1.s tlslib.s}
- {{objdump -dr tlsopt1.d}}
- "tlsopt1"}
- {"TLS opt 2" "-melf64ppc" "" "-a64" {tlsopt2.s tlslib.s}
- {{objdump -dr tlsopt2.d}}
- "tlsopt2"}
- {"TLS opt 3" "-melf64ppc" "" "-a64" {tlsopt3.s tlslib.s}
- {{objdump -dr tlsopt3.d}}
- "tlsopt3"}
- {"TLS opt 4" "-melf64ppc" "" "-a64" {tlsopt4.s tlslib.s}
- {{objdump -dr tlsopt4.d}}
- "tlsopt4"}
- {"TLS DLL" "-shared -melf64ppc --version-script tlsdll.ver" "" "-a64" {tlsdll.s}
- {} "tlsdll.so"}
- {"TLS opt 5" "-melf64ppc -shared --hash-style=both --gc-sections --no-plt-localentry tmpdir/tlsdll.so" "" "-a64" {tlsopt5.s}
- {{objdump -dr tlsopt5.d} {readelf -wf tlsopt5.wf}}
- "tlsopt5"}
- {"TLS opt 6" "-melf64ppc -shared --hash-style=both --gc-sections --no-plt-localentry --tls-get-addr-regsave tmpdir/tlsdll.so" "" "-a64" {tlsopt5.s}
- {{objdump -dr tlsopt6.d} {readelf -wf tlsopt6.wf}}
- "tlsopt6"}
- {"TLSdesc" "-melf64ppc -shared --hash-style=both --no-plt-localentry tmpdir/libtlslib.so" "" "-a64" {tlsdesc.s}
- {{objdump -dr tlsdesc.d} {readelf -wf tlsdesc.wf}}
- "tlsdesc"}
- {"TLSdesc2" "-melf64ppc -shared --hash-style=both --no-plt-localentry tmpdir/tlsdll.so" "" "-a64" {tlsdesc.s}
- {{objdump -dr tlsdesc2.d} {readelf -wf tlsdesc2.wf}}
- "tlsdesc2"}
- {"TLSdesc3" "-melf64ppc --no-tls-optimize tmpdir/tlsdll.o" "" "-a64" {tlsdesc.s}
- {{objdump -dr tlsdesc3.d} {readelf -wf tlsdesc3.wf}}
- "tlsdesc3"}
- {"TLSdesc4" "-melf64ppc --no-tls-optimize tmpdir/tlsdll.o" "" "-a64" {tlsdesc4.s}
- {{objdump -dr tlsdesc4.d} {readelf -wf tlsdesc4.wf}}
- "tlsdesc4"}
- {"tlsget" "-shared --hash-style=both -melf64ppc --plt-align=0" "tmpdir/tlsdll.so" "-a64 -mpower10" {tlsget.s}
- {{objdump -dr tlsget.d} {readelf -wf tlsget.wf}}
- "tlsget.so"}
- {"tlsget2" "-shared --hash-style=both -melf64ppc --plt-align=0 --power10-stubs=yes" "tmpdir/tlsdll.so" "-a64 -mpower10" {tlsget.s}
- {{objdump -dr tlsget2.d} {readelf -wf tlsget2.wf}}
- "tlsget2.so"}
- {"sym@tocbase" "-shared -melf64ppc" "" "-a64" {symtocbase-1.s symtocbase-2.s}
- {{objdump -dj.data symtocbase.d}} "symtocbase.so"}
- {"TOC opt" "-melf64ppc" "" "-a64" {tocopt.s}
- {{ld tocopt.out} {objdump -s tocopt.d}} "tocopt"}
- {"TOC opt2" "-melf64ppc --defsym x=2" "" "-a64" {tocopt2.s}
- {{ld tocopt2.out} {objdump -s tocopt2.d}} "tocopt2"}
- {"TOC opt3" "-melf64ppc -no-keep-memory --defsym x=2" "" "-a64" {tocopt3.s}
- {{objdump -s tocopt3.d}} "tocopt3"}
- {"TOC opt4" "-melf64ppc -no-keep-memory --defsym x=2" "" "-a64"
- {tocopt4a.s tocopt4b.s} {{objdump -s tocopt4.d}} "tocopt4"}
- {"TOC opt5" "-melf64ppc" "" "-a64" {tocopt5.s}
- {{objdump -s tocopt5.d}} "tocopt5"}
- {"TOC opt6" "-melf64ppc" "" "-a64" {tocopt6a.s tocopt6b.s tocopt6c.s}
- {{objdump -d tocopt6.d}} "tocopt6"}
- {"TOC opt7" "-melf64ppc" "" "-a64 -mpower9" {tocopt7.s}
- {{ld tocopt7.out} {objdump -s tocopt7.d}} "tocopt7"}
- {"TOC opt8" "-melf64ppc" "" "-a64 -mpower9" {tocopt8.s}
- {{objdump -s tocopt8.d}} "tocopt8"}
- {"tocsave lib" "-shared -melf64ppc" "" "-a64" {tocsavelib.s}
- {} "tocsavelib.so"}
- {"tocsave1 shared" "-melf64ppc" "tmpdir/tocsavelib.so" "-a64" {tocsave1.s}
- {{objdump -dr tocsave1s.d}} "tocsave1s"}
- {"tocsave1 static" "-melf64ppc" "tmpdir/tocsavelib.o" "-a64" {tocsave1.s}
- {{objdump -dr tocsave1a.d}} "tocsave1a"}
- {"tocsave2 shared" "-melf64ppc" "tmpdir/tocsavelib.so" "-a64" {tocsave2.s}
- {{objdump -dr tocsave2s.d}} "tocsave2s"}
- {"tocsave2 static" "-melf64ppc" "tmpdir/tocsavelib.o" "-a64" {tocsave2.s}
- {{objdump -dr tocsave2a.d}} "tocsave2a"}
- {"ambig shared v1" "-shared -melf64ppc" "" "-a64" {funv1.s} {} "funv1.so"}
- {"ambig shared v2" "-shared -melf64ppc" "" "-a64" {funv2.s} {} "funv2.so"}
- {"notoc ext" "" "" "-a64" {ext.s} {} ""}
- {"notoc" "-melf64ppc --no-plt-localentry --no-power10-stubs -T ext.lnk"
- "" "-a64" {notoc.s}
- {{objdump -d notoc.d} {readelf {-wf -W} notoc.wf}} "notoc"}
- {"notoc2" "-melf64ppc -shared" "" "-a64 -mpower10" {notoc2.s}
- {{objdump {-d -Mpower10} notoc2.d}} "notoc2"}
- {"notoc3" "-melf64ppc --no-plt-localentry -T ext.lnk" ""
- "-a64 -mpower10" {notoc3.s}
- {{objdump -d notoc3.d} {readelf {-wf -W} notoc3.wf}} "notoc3"}
- {"pcrelopt" "-melf64ppc --hash-style=gnu" "tmpdir/symtocbase.so"
- "-a64 -mpower10" {pcrelopt.s}
- {{objdump {-d -Mpower10} pcrelopt.d}
- {readelf {-S --wide} pcrelopt.sec}} "pcrelopt" }
- {"group1" "-melf64ppc -e foo" "" "-a64" {group1.s group2.s group3.s}
- {{objdump {-d} group1.d}
- {readelf {-s} group1.sym}} "group1"}
- {"group2" "-melf64ppc -e foo" "" "-a64" {group2.s group1.s group3.s}
- {{objdump {-d} group2.d}
- {readelf {-s} group2.sym}} "group2"}
- {"group3" "-melf64ppc -e foo" "" "-a64" {group3.s group2.s group1.s}
- {{objdump {-d} group2.d}
- {readelf {-s} group3.sym}} "group3"}
- {"weak1" "-melf64ppc --hash-style=both" ""
- "-a64 -mpower10" {weak1.s}
- {{objdump -d weak1.d} {readelf {-srW} weak1.r}} "weak1"}
- {"weak1.so" "-shared -melf64ppc --hash-style=both" ""
- "-a64 -mpower10" {weak1.s}
- {{objdump -d weak1so.d} {readelf {-srW} weak1so.r}} "weak1.so"}
- {"startstop" "-shared -melf64ppc --hash-style=sysv --gc-sections -z start-stop-gc" ""
- "-a64 -mpower10" {startstop.s}
- {{objdump -d startstop.d} {readelf {-rW} startstop.r}} "startstop.so"}
- {"abs-static" "-melf64ppc -static --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x123456789abcdef0" ""
- "-a64" {abs-reloc.s}
- {{objdump {-sdr} abs-static.d}
- {readelf {-rW} abs-static.r}} "abs-static"}
- {"abs-pie" "-melf64ppc -pie --hash-style=sysv --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x123456789abcdef0" ""
- "-a64" {abs-reloc.s}
- {{objdump {-sdr} abs-pie.d}
- {readelf {-rW} abs-pie.r}} "abs-pie"}
- {"abs-shared" "-melf64ppc -shared --hash-style=sysv --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x123456789abcdef0" ""
- "-a64" {abs-reloc.s}
- {{objdump {-sdr} abs-shared.d}
- {readelf {-rW} abs-shared.r}} "abs-shared"}
- {"abs-pie-relr" "-melf64ppc -pie --hash-style=sysv -z pack-relative-relocs --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x123456789abcdef0" ""
- "-a64" {abs-reloc.s}
- {{objdump {-sdr} abs-pie-relr.d}
- {readelf {-rW} abs-pie-relr.r}} "abs-pie-relr"}
- {"abs-shared-relr" "-melf64ppc -shared --hash-style=sysv -z pack-relative-relocs --defsym a=1 --defsym 'HIDDEN(b=2)' --defsym c=0x123456789abcdef0" ""
- "-a64" {abs-reloc.s}
- {{objdump {-sdr} abs-shared-relr.d}
- {readelf {-rW} abs-shared-relr.r}} "abs-shared-relr"}
}
set ppceabitests {
@@ -404,15 +151,6 @@ set ppceabitests {
{"VLE multiple segments 5" "-melf32ppc -T vle-multiseg-5.ld" ""
"-a32 -mbig -mregnames -mvle" {vle-multiseg.s}
{{readelf "-l" vle-multiseg-5.d}} "vle-multiseg-5"}
- {"VLE relocations 1" "-melf32ppc -T vle.ld" ""
- "-a32 -mbig -mvle" {vle-reloc-1.s vle-reloc-def-1.s}
- {{objdump "-Mvle -d" vle-reloc-1.d}} "vle-reloc-1"}
- {"VLE relocations 2" "-melf32ppc -T vle.ld" ""
- "-a32 -mbig -mvle" {vle-reloc-2.s vle-reloc-def-2.s}
- {{objdump "-Mvle -d" vle-reloc-2.d}} "vle-reloc-2"}
- {"VLE relocations 3" "-melf32ppc -T vle.ld" ""
- "-a32 -mbig -mvle" {vle-reloc-3.s vle-reloc-def-3.s}
- {{objdump "-Mvle -d" vle-reloc-3.d}} "vle-reloc-3"}
}
if [istarget "powerpc*le*-*-*"] then {
diff -rup binutils.orig/ld/testsuite/ld-powerpc/tls32.d binutils-2.41/ld/testsuite/ld-powerpc/tls32.d
--- binutils.orig/ld/testsuite/ld-powerpc/tls32.d 2023-08-15 14:30:13.278890868 +0100
+++ binutils-2.41/ld/testsuite/ld-powerpc/tls32.d 2023-08-15 14:35:25.141593764 +0100
@@ -9,11 +9,11 @@
Disassembly of section \.text:
-0+18000a0 <_start>:
+0+18[0-9a-f]+ <_start>:
.*: (42 9f 00 05|05 00 9f 42) bcl 20,4\*cr7\+so,.* <_start\+0x4>
.*: (7f c8 02 a6|a6 02 c8 7f) mflr r30
.*: (3f de 00 02|02 00 de 3f) addis r30,r30,2
-.*: (3b de 80 a0|a0 80 de 3b) addi r30,r30,-32608
+.*: (3b de 80 a0|.. 80 de 3b) addi r30,r30,.*
.*: (60 00 00 00|00 00 00 60) nop
.*: (38 62 90 3c|3c 90 62 38) addi r3,r2,-28612
.*: (60 00 00 00|00 00 00 60) nop
@@ -43,5 +43,5 @@ Disassembly of section \.text:
.*: (60 00 00 00|00 00 00 60) nop
.*: (a9 42 90 18|18 90 42 a9) lha r10,-28648\(r2\)
-0+1800120 <__tls_get_addr>:
+0+18[0-9a-f]+ <__tls_get_addr>:
.*: (4e 80 00 20|20 00 80 4e) blr
--- binutils.orig/ld/testsuite/ld-elf/shared.exp 2023-08-15 14:30:13.165890702 +0100
+++ binutils-2.41/ld/testsuite/ld-elf/shared.exp 2023-08-15 14:45:41.943992390 +0100
@@ -1152,10 +1152,6 @@ set run_tests [list \
[list "Run pr21964-3" \
"-Wl,--no-as-needed,-rpath,tmpdir tmpdir/pr21964-1a.so tmpdir/pr21964-1b.so tmpdir/pr21964-3a.so" "" \
{pr21964-3c.c} "pr21964-3" "pass.out" ] \
- [list "pr26580-3" \
- "" "" \
- {pr26580-a.c} "pr26580-3" "pr26580-3.out" "-fcommon" "c" "" \
- "-Wl,--as-needed tmpdir/libpr26580-2.so" ] \
[list "pr26580-4" \
"" "" \
{pr26580-a.c} "pr26580-4" "pr26580-4.out" "-fcommon" "c" "" \
@@ -1579,18 +1575,6 @@ if { [istarget *-*-linux*]
"pr22393-2-static" \
"pass.out" \
] \
- [list \
- "Run pr21964-4" \
- "" \
- "" \
- {pr21964-4.c} \
- "pr21964-4" \
- "pass.out" \
- "" \
- "" \
- "" \
- "-ldl" \
- ] \
]
}
--- binutils.orig/ld/testsuite/ld-s390/s390.exp 2023-08-15 14:30:13.292890888 +0100
+++ binutils-2.41/ld/testsuite/ld-s390/s390.exp 2023-08-15 14:48:38.327360916 +0100
@@ -35,6 +35,8 @@ if { !([istarget "s390-*-*"] || [istarge
# nm: Apply nm options on result. Compare with regex (last arg).
# readelf: Apply readelf options on result. Compare with regex (last arg).
+return
+
set s390tests {
{"TLS -fpic -shared transitions" "-shared -melf_s390 --hash-style=sysv" ""
"-m31" {tlspic1.s tlspic2.s}
--- binutils.orig/ld/testsuite/ld-elf/linux-x86.exp 2023-08-15 14:30:13.146890674 +0100
+++ binutils-2.41/ld/testsuite/ld-elf/linux-x86.exp 2023-08-15 14:54:31.527999066 +0100
@@ -152,6 +152,10 @@ run_cc_link_tests [list \
] \
]
+if { [istarget "i686-*-*"] } {
+ return
+}
+
run_ld_link_exec_tests [list \
[list \
"Run indirect-extern-access-1a without PIE" \
--- binutils.orig/ld/testsuite/ld-i386/i386.exp 2023-08-15 14:30:13.183890728 +0100
+++ binutils-2.41/ld/testsuite/ld-i386/i386.exp 2023-08-15 14:55:59.001157084 +0100
@@ -597,6 +597,10 @@ proc undefined_weak {cflags ldflags} {
}
}
+if { [istarget "i686-*-*"] } {
+ return
+}
+
# Must be Linux native with the C compiler
if { [isnative]
&& [istarget "i?86-*-linux*"]
--- binutils.orig/ld/testsuite/ld-scripts/crossref.exp 2023-08-15 14:30:13.294890891 +0100
+++ binutils-2.41/ld/testsuite/ld-scripts/crossref.exp 2023-08-15 14:59:36.680591177 +0100
@@ -121,6 +121,10 @@ if [string match "" $exec_output] then {
}
}
+if { [istarget "i686-*-*"] } {
+ return
+}
+
# Check cross references for ld -r
if { ![ld_compile "$CC_FOR_TARGET $NOSANITIZE_CFLAGS $NOLTO_CFLAGS" "$srcdir/$subdir/cross4.c" tmpdir/cross4.o] } {
--- binutils.orig/ld/testsuite/ld-shared/shared.exp 2023-08-15 14:30:13.309890913 +0100
+++ binutils-2.41/ld/testsuite/ld-shared/shared.exp 2023-08-15 15:00:31.929701875 +0100
@@ -204,6 +204,10 @@ if { [istarget mips*-*-*] && ! [at_least
}
verbose "Using $picflag to compile PIC code"
+if { [istarget "i686-*-*"] } {
+ return
+}
+
# Compile the main program.
if ![ld_compile "$CC_FOR_TARGET $SHCFLAG" $srcdir/$subdir/main.c $tmpdir/mainnp.o] {
unsupported "shared (non PIC)"
--- binutils.orig/ld/testsuite/ld-srec/srec.exp 2023-08-15 14:30:13.315890922 +0100
+++ binutils-2.41/ld/testsuite/ld-srec/srec.exp 2023-08-15 15:01:24.104806404 +0100
@@ -442,6 +442,9 @@ setup_xfail "csky*-*-*"
# The S-record linker is not supported for eBPF.
setup_xfail "bpf-*-*"
+setup_xfail "s390*-*-*"
+setup_xfail "i686-*-*"
+
run_srec_test $test1 "tmpdir/sr1.o tmpdir/sr2.o"
# Now try linking a C++ program with global constructors and
--- binutils.orig/ld/testsuite/ld-vsb/vsb.exp 2023-08-15 14:30:13.329890943 +0100
+++ binutils-2.41/ld/testsuite/ld-vsb/vsb.exp 2023-08-15 15:03:41.018080699 +0100
@@ -29,6 +29,10 @@ if { ![check_compiler_available] } {
return
}
+if { [istarget "i686-*-*"] } {
+ return
+}
+
# This test can only be run on a couple of ELF platforms or with
# XCOFF formats.
# Square bracket expressions seem to confuse istarget.
diff -rup binutils.orig/ld/testsuite/ld-powerpc/powerpc.exp binutils-2.41/ld/testsuite/ld-powerpc/powerpc.exp
--- binutils.orig/ld/testsuite/ld-powerpc/powerpc.exp 2023-08-15 15:04:24.106167010 +0100
+++ binutils-2.41/ld/testsuite/ld-powerpc/powerpc.exp 2023-08-15 15:59:51.422385730 +0100
@@ -177,6 +177,8 @@ if [istarget "powerpc*le*-*-*"] then {
run_ld_link_tests $ppcelftests
+return
+
if [ supports_ppc64 ] then {
run_ld_link_tests $ppc64elftests
run_dump_test "relbrlt"
diff -rup binutils.orig/ld/testsuite/ld-powerpc/tls.d binutils-2.41/ld/testsuite/ld-powerpc/tls.d
--- binutils.orig/ld/testsuite/ld-powerpc/tls.d 2023-08-15 15:04:24.100166998 +0100
+++ binutils-2.41/ld/testsuite/ld-powerpc/tls.d 2023-08-15 15:59:07.422314417 +0100
@@ -9,7 +9,7 @@
Disassembly of section \.text:
-0+100000e8 <\._start>:
+0+100..... <\._start>:
.*: (60 00 00 00|00 00 00 60) nop
.*: (38 6d 90 78|78 90 6d 38) addi r3,r13,-28552
.*: (60 00 00 00|00 00 00 60) nop
@@ -49,5 +49,5 @@ Disassembly of section \.text:
.*: (60 00 00 00|00 00 00 60) nop
.*: (a9 4d 90 30|30 90 4d a9) lha r10,-28624\(r13\)
-0+10000180 <\.__tls_get_addr>:
+0+100..... <\.__tls_get_addr>:
.*: (4e 80 00 20|20 00 80 4e) blr
diff -rup binutils.orig/ld/testsuite/ld-powerpc/tls32.g binutils-2.41/ld/testsuite/ld-powerpc/tls32.g
--- binutils.orig/ld/testsuite/ld-powerpc/tls32.g 2023-08-15 15:04:24.100166998 +0100
+++ binutils-2.41/ld/testsuite/ld-powerpc/tls32.g 2023-08-15 15:56:33.167064455 +0100
@@ -8,4 +8,4 @@
.*
Contents of section \.got:
- 1810144 00000000 00000000 00000000 .*
+ 18..... 00000000 00000000 00000000 .*
diff -rup binutils.orig/ld/testsuite/ld-powerpc/tls32no.d binutils-2.41/ld/testsuite/ld-powerpc/tls32no.d
--- binutils.orig/ld/testsuite/ld-powerpc/tls32no.d 2023-08-15 15:04:24.100166998 +0100
+++ binutils-2.41/ld/testsuite/ld-powerpc/tls32no.d 2023-08-15 15:58:02.959209959 +0100
@@ -9,11 +9,11 @@
Disassembly of section \.text:
-0+18000a0 <_start>:
+0+18..... <_start>:
.*: (42 9f 00 05|05 00 9f 42) bcl .*
.*: (7f c8 02 a6|a6 02 c8 7f) mflr r30
.*: (3f de 00 02|02 00 de 3f) addis r30,r30,2
-.*: (3b de 80 a0|a0 80 de 3b) addi r30,r30,-32608
+.*: (3b de 80 a0|.. 80 de 3b) addi r30,r30,-[0-9]+
.*: (38 7f ff e4|e4 ff 7f 38) addi r3,r31,-28
.*: (48 00 00 6d|6d 00 00 48) bl .*
.*: (38 7f ff f8|f8 ff 7f 38) addi r3,r31,-8
@@ -43,5 +43,5 @@ Disassembly of section \.text:
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
.*: (a9 49 90 18|18 90 49 a9) lha r10,-28648\(r9\)
-0+1800120 <__tls_get_addr>:
+0+18..... <__tls_get_addr>:
.*: (4e 80 00 20|20 00 80 4e) blr
--- binutils.orig/ld/testsuite/ld-elf/linux-x86.exp 2023-08-15 15:04:23.995166788 +0100
+++ binutils-2.41/ld/testsuite/ld-elf/linux-x86.exp 2023-08-15 16:03:11.615710200 +0100
@@ -73,6 +73,10 @@ run_ld_link_tests [list \
] \
]
+if { [istarget "i686-*-*"] } {
+ return
+}
+
run_cc_link_tests [list \
[list \
"Build indirect-extern-access-1.so" \
@@ -152,10 +156,6 @@ run_cc_link_tests [list \
] \
]
-if { [istarget "i686-*-*"] } {
- return
-}
-
run_ld_link_exec_tests [list \
[list \
"Run indirect-extern-access-1a without PIE" \
diff -rup binutils.orig/ld/testsuite/ld-powerpc/tls32.t binutils-2.41/ld/testsuite/ld-powerpc/tls32.t
--- binutils.orig/ld/testsuite/ld-powerpc/tls32.t 2023-08-15 16:48:58.540653339 +0100
+++ binutils-2.41/ld/testsuite/ld-powerpc/tls32.t 2023-08-15 16:49:34.611717013 +0100
@@ -8,5 +8,5 @@
.*
Contents of section \.tdata:
- 1810124 (12345678|78563412) (23456789|89674523) (3456789a|9a785634) (456789ab|ab896745) .*
- 1810134 (56789abc|bc9a7856) (6789abcd|cdab8967) (789abcde|debc9a78) (00c0ffee|eeffc000) .*
+#pass
+
diff -rup binutils.orig/ld/testsuite/ld-powerpc/tls32no.g binutils-2.41/ld/testsuite/ld-powerpc/tls32no.g
--- binutils.orig/ld/testsuite/ld-powerpc/tls32no.g 2023-08-15 17:41:46.719412912 +0100
+++ binutils-2.41/ld/testsuite/ld-powerpc/tls32no.g 2023-08-15 17:42:37.097511729 +0100
@@ -8,6 +8,4 @@
.*
Contents of section \.got:
- 1810144 (0+01 f+8000 0+01 f+803c|010+ 0080f+ 010+ 3c80f+) .*
- 1810154 (0+01 f+8020 f+9030 0+01|010+ 2080f+ 3090f+ 010+) .*
- 1810164 0+ 0+ 0+ 0+0 .*
+#pass

46
SOURCES/binutils-version.patch
Unescape View File

@ -0,0 +1,46 @@
diff -rup binutils.orig/bfd/Makefile.am binutils-2.38/bfd/Makefile.am
--- binutils.orig/bfd/Makefile.am 2022-02-09 14:10:42.659300681 +0000
+++ binutils-2.38/bfd/Makefile.am 2022-02-09 14:12:40.562532916 +0000
@@ -977,8 +977,8 @@ DISTCLEANFILES = $(BUILD_CFILES) $(BUILD
bfdver.h: $(srcdir)/version.h $(srcdir)/development.sh $(srcdir)/Makefile.in
$(AM_V_GEN)\
bfd_version=`echo "$(VERSION)" | $(SED) -e 's/\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\).*/\1.00\2.00\3.00\4.00\5/' -e 's/\([^\.]*\)\..*\(..\)\..*\(..\)\..*\(..\)\..*\(..\)$$/\1\2\3\4\5/'` ;\
- bfd_version_string="\"$(VERSION)\"" ;\
- bfd_soversion="$(VERSION)" ;\
+ bfd_version_string="\"$(VERSION)-%{release}\"" ;\
+ bfd_soversion="$(VERSION)-%{release}" ;\
bfd_version_package="\"$(PKGVERSION)\"" ;\
report_bugs_to="\"$(REPORT_BUGS_TO)\"" ;\
. $(srcdir)/development.sh ;\
@@ -989,7 +989,7 @@ bfdver.h: $(srcdir)/version.h $(srcdir)/
fi ;\
$(SED) -e "s,@bfd_version@,$$bfd_version," \
-e "s,@bfd_version_string@,$$bfd_version_string," \
- -e "s,@bfd_version_package@,$$bfd_version_package," \
+ -e "s,@bfd_version_package@,\"version \"," \
-e "s,@report_bugs_to@,$$report_bugs_to," \
< $(srcdir)/version.h > $@; \
echo "$${bfd_soversion}" > libtool-soversion
diff -rup binutils.orig/bfd/Makefile.in binutils-2.38/bfd/Makefile.in
--- binutils.orig/bfd/Makefile.in 2022-02-09 14:10:42.653300720 +0000
+++ binutils-2.38/bfd/Makefile.in 2022-02-09 14:19:03.362040188 +0000
@@ -2094,8 +2094,8 @@ stmp-lcoff-h: $(LIBCOFF_H_FILES) $(MKDOC
bfdver.h: $(srcdir)/version.h $(srcdir)/development.sh $(srcdir)/Makefile.in
$(AM_V_GEN)\
bfd_version=`echo "$(VERSION)" | $(SED) -e 's/\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\)\.*\([^\.]*\).*/\1.00\2.00\3.00\4.00\5/' -e 's/\([^\.]*\)\..*\(..\)\..*\(..\)\..*\(..\)\..*\(..\)$$/\1\2\3\4\5/'` ;\
- bfd_version_string="\"$(VERSION)\"" ;\
- bfd_soversion="$(VERSION)" ;\
+ bfd_version_string="\"$(VERSION)-%{release}\"" ;\
+ bfd_soversion="$(VERSION)-%{release}" ;\
bfd_version_package="\"$(PKGVERSION)\"" ;\
report_bugs_to="\"$(REPORT_BUGS_TO)\"" ;\
. $(srcdir)/development.sh ;\
@@ -2106,7 +2106,7 @@ bfdver.h: $(srcdir)/version.h $(srcdir)/
fi ;\
$(SED) -e "s,@bfd_version@,$$bfd_version," \
-e "s,@bfd_version_string@,$$bfd_version_string," \
- -e "s,@bfd_version_package@,$$bfd_version_package," \
+ -e "s,@bfd_version_package@,\"version \"," \
-e "s,@report_bugs_to@,$$report_bugs_to," \
< $(srcdir)/version.h > $@; \
echo "$${bfd_soversion}" > libtool-soversion

33
SOURCES/binutils-x86-64-v3.patch
Unescape View File

@ -0,0 +1,33 @@
diff --git a/ld/testsuite/ld-x86-64/property-3.r b/ld/testsuite/ld-x86-64/property-3.r
index 1bdb47c7b6b..1e4a24c6fbe 100644
--- a/ld/testsuite/ld-x86-64/property-3.r
+++ b/ld/testsuite/ld-x86-64/property-3.r
@@ -4,5 +4,5 @@ Displaying notes found in: .note.gnu.property
GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
Properties: stack size: 0x800000
#...
- x86 ISA needed: x86-64-baseline, x86-64-v2
+ x86 ISA needed: x86-64-baseline, x86-64-v2.*
#pass
diff --git a/ld/testsuite/ld-x86-64/property-4.r b/ld/testsuite/ld-x86-64/property-4.r
index 8cc618cbfad..031a1d280ad 100644
--- a/ld/testsuite/ld-x86-64/property-4.r
+++ b/ld/testsuite/ld-x86-64/property-4.r
@@ -4,5 +4,5 @@ Displaying notes found in: .note.gnu.property
GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
Properties: stack size: 0x800000
#...
- x86 ISA needed: x86-64-baseline, x86-64-v2, x86-64-v4
+ x86 ISA needed: x86-64-baseline, x86-64-v2,.*x86-64-v4
#pass
diff --git a/ld/testsuite/ld-x86-64/property-5.r b/ld/testsuite/ld-x86-64/property-5.r
index e3ba4f659b9..58b274b9772 100644
--- a/ld/testsuite/ld-x86-64/property-5.r
+++ b/ld/testsuite/ld-x86-64/property-5.r
@@ -4,5 +4,5 @@ Displaying notes found in: .note.gnu.property
GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
Properties: stack size: 0x900000
#...
- x86 ISA needed: x86-64-baseline, x86-64-v2, x86-64-v4
+ x86 ISA needed: x86-64-baseline, x86-64-v2,.*x86-64-v4
#pass

209
SOURCES/i686-AVX10.1-part-1.patch
Unescape View File

@ -0,0 +1,209 @@
From e30e95759268ce5a5a1f752b3c9fa3e4a182db99 Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Fri, 1 Sep 2023 12:28:57 +0200
Subject: [PATCH] x86: correct source used for two non-AVX512 VEXWIG tests
These shouldn't wrongly include the AVX512VL sources. Obviously the
expectations therefore also need to change.
---
gas/testsuite/gas/i386/vaes-wig1.d | 118 ++++-------------------
gas/testsuite/gas/i386/vpclmulqdq-wig1.d | 44 +++------
2 files changed, 32 insertions(+), 130 deletions(-)
diff --git a/gas/testsuite/gas/i386/vaes-wig1.d b/gas/testsuite/gas/i386/vaes-wig1.d
index 8e8567e01df..9d37e52b49e 100644
--- a/gas/testsuite/gas/i386/vaes-wig1.d
+++ b/gas/testsuite/gas/i386/vaes-wig1.d
@@ -1,7 +1,7 @@
#as: -mvexwig=1
#objdump: -dw
#name: i386 AVX/VAES wig insns
-#source: avx512vl_vaes.s
+#source: vaes.s
.*: +file format .*
@@ -9,100 +9,24 @@
Disassembly of section \.text:
00000000 <_start>:
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 de f4[ ]*vaesdec %xmm4,%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 de b2 f0 07 00 00[ ]*vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 de f4[ ]*vaesdec %ymm4,%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 de b2 e0 0f 00 00[ ]*vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 df f4[ ]*vaesdeclast %xmm4,%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 df b2 f0 07 00 00[ ]*vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 df f4[ ]*vaesdeclast %ymm4,%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 df b2 e0 0f 00 00[ ]*vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 dc f4[ ]*vaesenc %xmm4,%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 dc b2 f0 07 00 00[ ]*vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 dc f4[ ]*vaesenc %ymm4,%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 dc b2 e0 0f 00 00[ ]*vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 dd f4[ ]*vaesenclast %xmm4,%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 dd b2 f0 07 00 00[ ]*vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 dd f4[ ]*vaesenclast %ymm4,%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 dd b2 e0 0f 00 00[ ]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de f4[ ]*\{evex\} vaesdec %xmm4,%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de 72 7f[ ]*\{evex\} vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de f4[ ]*\{evex\} vaesdec %ymm4,%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de 72 7f[ ]*\{evex\} vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df f4[ ]*\{evex\} vaesdeclast %xmm4,%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df 72 7f[ ]*\{evex\} vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df f4[ ]*\{evex\} vaesdeclast %ymm4,%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df 72 7f[ ]*\{evex\} vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc f4[ ]*\{evex\} vaesenc %xmm4,%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc 72 7f[ ]*\{evex\} vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc f4[ ]*\{evex\} vaesenc %ymm4,%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc 72 7f[ ]*\{evex\} vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd f4[ ]*\{evex\} vaesenclast %xmm4,%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd 72 7f[ ]*\{evex\} vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd f4[ ]*\{evex\} vaesenclast %ymm4,%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd 72 7f[ ]*\{evex\} vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 de f4[ ]*vaesdec %xmm4,%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 de b2 f0 07 00 00[ ]*vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 de f4[ ]*vaesdec %ymm4,%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 de b4 f4 c0 1d fe ff[ ]*vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 de b2 e0 0f 00 00[ ]*vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 df f4[ ]*vaesdeclast %xmm4,%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 df b2 f0 07 00 00[ ]*vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 df f4[ ]*vaesdeclast %ymm4,%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 df b4 f4 c0 1d fe ff[ ]*vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 df b2 e0 0f 00 00[ ]*vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 dc f4[ ]*vaesenc %xmm4,%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 dc b2 f0 07 00 00[ ]*vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 dc f4[ ]*vaesenc %ymm4,%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 dc b4 f4 c0 1d fe ff[ ]*vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 dc b2 e0 0f 00 00[ ]*vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 dd f4[ ]*vaesenclast %xmm4,%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d1 dd b2 f0 07 00 00[ ]*vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 dd f4[ ]*vaesenclast %ymm4,%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 dd b4 f4 c0 1d fe ff[ ]*vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e2 d5 dd b2 e0 0f 00 00[ ]*vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de f4[ ]*\{evex\} vaesdec %xmm4,%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 de 72 7f[ ]*\{evex\} vaesdec 0x7f0\(%edx\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de f4[ ]*\{evex\} vaesdec %ymm4,%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdec -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 de 72 7f[ ]*\{evex\} vaesdec 0xfe0\(%edx\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df f4[ ]*\{evex\} vaesdeclast %xmm4,%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 df 72 7f[ ]*\{evex\} vaesdeclast 0x7f0\(%edx\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df f4[ ]*\{evex\} vaesdeclast %ymm4,%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df b4 f4 c0 1d fe ff[ ]*\{evex\} vaesdeclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 df 72 7f[ ]*\{evex\} vaesdeclast 0xfe0\(%edx\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc f4[ ]*\{evex\} vaesenc %xmm4,%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dc 72 7f[ ]*\{evex\} vaesenc 0x7f0\(%edx\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc f4[ ]*\{evex\} vaesenc %ymm4,%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenc -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dc 72 7f[ ]*\{evex\} vaesenc 0xfe0\(%edx\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd f4[ ]*\{evex\} vaesenclast %xmm4,%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 08 dd 72 7f[ ]*\{evex\} vaesenclast 0x7f0\(%edx\),%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd f4[ ]*\{evex\} vaesenclast %ymm4,%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd b4 f4 c0 1d fe ff[ ]*\{evex\} vaesenclast -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*62 f2 55 28 dd 72 7f[ ]*\{evex\} vaesenclast 0xfe0\(%edx\),%ymm5,%ymm6
+[ ]*[a-f0-9]+: c4 e2 cd dc d4 vaesenc %ymm4,%ymm6,%ymm2
+[ ]*[a-f0-9]+: c4 e2 cd dc 39 vaesenc \(%ecx\),%ymm6,%ymm7
+[ ]*[a-f0-9]+: c4 e2 cd dd d4 vaesenclast %ymm4,%ymm6,%ymm2
+[ ]*[a-f0-9]+: c4 e2 cd dd 39 vaesenclast \(%ecx\),%ymm6,%ymm7
+[ ]*[a-f0-9]+: c4 e2 cd de d4 vaesdec %ymm4,%ymm6,%ymm2
+[ ]*[a-f0-9]+: c4 e2 cd de 39 vaesdec \(%ecx\),%ymm6,%ymm7
+[ ]*[a-f0-9]+: c4 e2 cd df d4 vaesdeclast %ymm4,%ymm6,%ymm2
+[ ]*[a-f0-9]+: c4 e2 cd df 39 vaesdeclast \(%ecx\),%ymm6,%ymm7
+[ ]*[a-f0-9]+: c4 e2 cd dc d4 vaesenc %ymm4,%ymm6,%ymm2
+[ ]*[a-f0-9]+: c4 e2 cd dc 39 vaesenc \(%ecx\),%ymm6,%ymm7
+[ ]*[a-f0-9]+: c4 e2 cd dc 39 vaesenc \(%ecx\),%ymm6,%ymm7
+[ ]*[a-f0-9]+: c4 e2 cd dd d4 vaesenclast %ymm4,%ymm6,%ymm2
+[ ]*[a-f0-9]+: c4 e2 cd dd 39 vaesenclast \(%ecx\),%ymm6,%ymm7
+[ ]*[a-f0-9]+: c4 e2 cd dd 39 vaesenclast \(%ecx\),%ymm6,%ymm7
+[ ]*[a-f0-9]+: c4 e2 cd de d4 vaesdec %ymm4,%ymm6,%ymm2
+[ ]*[a-f0-9]+: c4 e2 cd de 39 vaesdec \(%ecx\),%ymm6,%ymm7
+[ ]*[a-f0-9]+: c4 e2 cd de 39 vaesdec \(%ecx\),%ymm6,%ymm7
+[ ]*[a-f0-9]+: c4 e2 cd df d4 vaesdeclast %ymm4,%ymm6,%ymm2
+[ ]*[a-f0-9]+: c4 e2 cd df 39 vaesdeclast \(%ecx\),%ymm6,%ymm7
+[ ]*[a-f0-9]+: c4 e2 cd df 39 vaesdeclast \(%ecx\),%ymm6,%ymm7
#pass
diff --git a/gas/testsuite/gas/i386/vpclmulqdq-wig1.d b/gas/testsuite/gas/i386/vpclmulqdq-wig1.d
index 843bf56bc21..52bb1651201 100644
--- a/gas/testsuite/gas/i386/vpclmulqdq-wig1.d
+++ b/gas/testsuite/gas/i386/vpclmulqdq-wig1.d
@@ -1,7 +1,7 @@
#as: -mvexwig=1
#objdump: -dw
#name: i386 AVX/VPCLMULQDQ wig insns
-#source: avx512vl_vpclmulqdq.s
+#source: vpclmulqdq.s
.*: +file format .*
@@ -9,36 +9,14 @@
Disassembly of section \.text:
00000000 <_start>:
-[ ]*[a-f0-9]+:[ ]*c4 e3 e9 44 da ab[ ]*vpclmulqdq \$0xab,%xmm2,%xmm2,%xmm3
-[ ]*[a-f0-9]+:[ ]*c4 e3 e9 44 9c f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm2,%xmm3
-[ ]*[a-f0-9]+:[ ]*c4 e3 e9 44 9a f0 07 00 00 7b[ ]*vpclmulqdq \$0x7b,0x7f0\(%edx\),%xmm2,%xmm3
-[ ]*[a-f0-9]+:[ ]*c4 e3 d5 44 e1 ab[ ]*vpclmulqdq \$0xab,%ymm1,%ymm5,%ymm4
-[ ]*[a-f0-9]+:[ ]*c4 e3 d5 44 a4 f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm5,%ymm4
-[ ]*[a-f0-9]+:[ ]*c4 e3 d5 44 a2 e0 0f 00 00 7b[ ]*vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm5,%ymm4
-[ ]*[a-f0-9]+:[ ]*62 f3 6d 08 44 da ab[ ]*\{evex\} vpclmulqdq \$0xab,%xmm2,%xmm2,%xmm3
-[ ]*[a-f0-9]+:[ ]*62 f3 6d 08 44 9c f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm2,%xmm3
-[ ]*[a-f0-9]+:[ ]*62 f3 6d 08 44 5a 7f 7b[ ]*\{evex\} vpclmulqdq \$0x7b,0x7f0\(%edx\),%xmm2,%xmm3
-[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 e1 ab[ ]*\{evex\} vpclmulqdq \$0xab,%ymm1,%ymm5,%ymm4
-[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 a4 f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm5,%ymm4
-[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 62 7f 7b[ ]*\{evex\} vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm5,%ymm4
-[ ]*[a-f0-9]+:[ ]*62 f3 65 08 44 e2 11[ ]*\{evex\} vpclmulhqhqdq %xmm2,%xmm3,%xmm4
-[ ]*[a-f0-9]+:[ ]*62 f3 5d 08 44 eb 01[ ]*\{evex\} vpclmulhqlqdq %xmm3,%xmm4,%xmm5
-[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 f4 10[ ]*\{evex\} vpclmullqhqdq %xmm4,%xmm5,%xmm6
-[ ]*[a-f0-9]+:[ ]*62 f3 4d 08 44 fd 00[ ]*\{evex\} vpclmullqlqdq %xmm5,%xmm6,%xmm7
-[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 d9 11[ ]*\{evex\} vpclmulhqhqdq %ymm1,%ymm2,%ymm3
-[ ]*[a-f0-9]+:[ ]*62 f3 65 28 44 e2 01[ ]*\{evex\} vpclmulhqlqdq %ymm2,%ymm3,%ymm4
-[ ]*[a-f0-9]+:[ ]*62 f3 5d 28 44 eb 10[ ]*\{evex\} vpclmullqhqdq %ymm3,%ymm4,%ymm5
-[ ]*[a-f0-9]+:[ ]*62 f3 55 28 44 f4 00[ ]*\{evex\} vpclmullqlqdq %ymm4,%ymm5,%ymm6
-[ ]*[a-f0-9]+:[ ]*c4 e3 d1 44 db ab[ ]*vpclmulqdq \$0xab,%xmm3,%xmm5,%xmm3
-[ ]*[a-f0-9]+:[ ]*c4 e3 d1 44 9c f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm5,%xmm3
-[ ]*[a-f0-9]+:[ ]*c4 e3 d1 44 9a f0 07 00 00 7b[ ]*vpclmulqdq \$0x7b,0x7f0\(%edx\),%xmm5,%xmm3
-[ ]*[a-f0-9]+:[ ]*c4 e3 ed 44 d2 ab[ ]*vpclmulqdq \$0xab,%ymm2,%ymm2,%ymm2
-[ ]*[a-f0-9]+:[ ]*c4 e3 ed 44 94 f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm2,%ymm2
-[ ]*[a-f0-9]+:[ ]*c4 e3 ed 44 92 e0 0f 00 00 7b[ ]*vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm2,%ymm2
-[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 db ab[ ]*\{evex\} vpclmulqdq \$0xab,%xmm3,%xmm5,%xmm3
-[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 9c f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm5,%xmm3
-[ ]*[a-f0-9]+:[ ]*62 f3 55 08 44 5a 7f 7b[ ]*\{evex\} vpclmulqdq \$0x7b,0x7f0\(%edx\),%xmm5,%xmm3
-[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 d2 ab[ ]*\{evex\} vpclmulqdq \$0xab,%ymm2,%ymm2,%ymm2
-[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 94 f4 c0 1d fe ff 7b[ ]*\{evex\} vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm2,%ymm2
-[ ]*[a-f0-9]+:[ ]*62 f3 6d 28 44 52 7f 7b[ ]*\{evex\} vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm2,%ymm2
+[ ]*[a-f0-9]+:[ ]*c4 e3 d5 44 f4 ab[ ]*vpclmulqdq \$0xab,%ymm4,%ymm5,%ymm6
+[ ]*[a-f0-9]+:[ ]*c4 e3 d5 44 b4 f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ ]*[a-f0-9]+:[ ]*c4 e3 d5 44 b2 e0 0f 00 00 7b[ ]*vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm5,%ymm6
+[ ]*[a-f0-9]+:[ ]*c4 e3 ed 44 d9 11[ ]*vpclmulhqhqdq %ymm1,%ymm2,%ymm3
+[ ]*[a-f0-9]+:[ ]*c4 e3 e5 44 e2 01[ ]*vpclmulhqlqdq %ymm2,%ymm3,%ymm4
+[ ]*[a-f0-9]+:[ ]*c4 e3 dd 44 eb 10[ ]*vpclmullqhqdq %ymm3,%ymm4,%ymm5
+[ ]*[a-f0-9]+:[ ]*c4 e3 d5 44 f4 00[ ]*vpclmullqlqdq %ymm4,%ymm5,%ymm6
+[ ]*[a-f0-9]+:[ ]*c4 e3 d5 44 f4 ab[ ]*vpclmulqdq \$0xab,%ymm4,%ymm5,%ymm6
+[ ]*[a-f0-9]+:[ ]*c4 e3 d5 44 b4 f4 c0 1d fe ff 7b[ ]*vpclmulqdq \$0x7b,-0x1e240\(%esp,%esi,8\),%ymm5,%ymm6
+[ ]*[a-f0-9]+:[ ]*c4 e3 d5 44 b2 e0 0f 00 00 7b[ ]*vpclmulqdq \$0x7b,0xfe0\(%edx\),%ymm5,%ymm6
#pass
--
2.43.0

379
SOURCES/i686-AVX10.1-part-2.patch
Unescape View File

@ -0,0 +1,379 @@
From dfab07b9ead66f08661325c03175e1df9210ccd7 Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Fri, 1 Sep 2023 12:29:44 +0200
Subject: [PATCH] x86: unindent most of set_cpu_arch()
Inverting the initial if()'s condition allows to move out the bulk of
the function by a level, improving readability at least a bit. While
doing that also pull the push/pop handling up first, such that "else if"
after "return" isn't needed anymore; the order in which special cases
are checked doesn't really matter.
---
gas/config/tc-i386.c | 305 ++++++++++++++++++++++---------------------
1 file changed, 154 insertions(+), 151 deletions(-)
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 19a5f2d61e5..00abfc78264 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -2793,29 +2793,134 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED)
bool no_cond_jump_promotion;
} arch_stack_entry;
static const arch_stack_entry *arch_stack_top;
+ char *s;
+ int e;
+ const char *string;
+ unsigned int j = 0;
+ i386_cpu_flags flags;
SKIP_WHITESPACE ();
- if (!is_end_of_line[(unsigned char) *input_line_pointer])
+ if (is_end_of_line[(unsigned char) *input_line_pointer])
+ {
+ as_bad (_("missing cpu architecture"));
+ input_line_pointer++;
+ return;
+ }
+
+ e = get_symbol_name (&s);
+ string = s;
+
+ if (strcmp (string, "push") == 0)
+ {
+ arch_stack_entry *top = XNEW (arch_stack_entry);
+
+ top->name = cpu_arch_name;
+ if (cpu_sub_arch_name)
+ top->sub_name = xstrdup (cpu_sub_arch_name);
+ else
+ top->sub_name = NULL;
+ top->flags = cpu_arch_flags;
+ top->isa = cpu_arch_isa;
+ top->isa_flags = cpu_arch_isa_flags;
+ top->flag_code = flag_code;
+ top->stackop_size = stackop_size;
+ top->no_cond_jump_promotion = no_cond_jump_promotion;
+
+ top->prev = arch_stack_top;
+ arch_stack_top = top;
+
+ (void) restore_line_pointer (e);
+ demand_empty_rest_of_line ();
+ return;
+ }
+
+ if (strcmp (string, "pop") == 0)
{
- char *s;
- int e = get_symbol_name (&s);
- const char *string = s;
- unsigned int j = 0;
- i386_cpu_flags flags;
+ const arch_stack_entry *top = arch_stack_top;
- if (strcmp (string, "default") == 0)
+ if (!top)
+ as_bad (_(".arch stack is empty"));
+ else if (top->flag_code != flag_code
+ || top->stackop_size != stackop_size)
+ {
+ static const unsigned int bits[] = {
+ [CODE_16BIT] = 16,
+ [CODE_32BIT] = 32,
+ [CODE_64BIT] = 64,
+ };
+
+ as_bad (_("this `.arch pop' requires `.code%u%s' to be in effect"),
+ bits[top->flag_code],
+ top->stackop_size == LONG_MNEM_SUFFIX ? "gcc" : "");
+ }
+ else
+ {
+ arch_stack_top = top->prev;
+
+ cpu_arch_name = top->name;
+ free (cpu_sub_arch_name);
+ cpu_sub_arch_name = top->sub_name;
+ cpu_arch_flags = top->flags;
+ cpu_arch_isa = top->isa;
+ cpu_arch_isa_flags = top->isa_flags;
+ no_cond_jump_promotion = top->no_cond_jump_promotion;
+
+ XDELETE (top);
+ }
+
+ (void) restore_line_pointer (e);
+ demand_empty_rest_of_line ();
+ return;
+ }
+
+ if (strcmp (string, "default") == 0)
+ {
+ if (strcmp (default_arch, "iamcu") == 0)
+ string = default_arch;
+ else
{
- if (strcmp (default_arch, "iamcu") == 0)
- string = default_arch;
+ static const i386_cpu_flags cpu_unknown_flags = CPU_UNKNOWN_FLAGS;
+
+ cpu_arch_name = NULL;
+ free (cpu_sub_arch_name);
+ cpu_sub_arch_name = NULL;
+ cpu_arch_flags = cpu_unknown_flags;
+ if (flag_code == CODE_64BIT)
+ {
+ cpu_arch_flags.bitfield.cpu64 = 1;
+ cpu_arch_flags.bitfield.cpuno64 = 0;
+ }
else
{
- static const i386_cpu_flags cpu_unknown_flags = CPU_UNKNOWN_FLAGS;
+ cpu_arch_flags.bitfield.cpu64 = 0;
+ cpu_arch_flags.bitfield.cpuno64 = 1;
+ }
+ cpu_arch_isa = PROCESSOR_UNKNOWN;
+ cpu_arch_isa_flags = cpu_arch[flag_code == CODE_64BIT].enable;
+ if (!cpu_arch_tune_set)
+ {
+ cpu_arch_tune = cpu_arch_isa;
+ cpu_arch_tune_flags = cpu_arch_isa_flags;
+ }
+
+ j = ARRAY_SIZE (cpu_arch) + 1;
+ }
+ }
+
+ for (; j < ARRAY_SIZE (cpu_arch); j++)
+ {
+ if (strcmp (string + (*string == '.'), cpu_arch[j].name) == 0
+ && (*string == '.') == (cpu_arch[j].type == PROCESSOR_NONE))
+ {
+ if (*string != '.')
+ {
+ check_cpu_arch_compatible (string, cpu_arch[j].enable);
- cpu_arch_name = NULL;
+ cpu_arch_name = cpu_arch[j].name;
free (cpu_sub_arch_name);
cpu_sub_arch_name = NULL;
- cpu_arch_flags = cpu_unknown_flags;
+ cpu_arch_flags = cpu_arch[j].enable;
if (flag_code == CODE_64BIT)
{
cpu_arch_flags.bitfield.cpu64 = 1;
@@ -2826,173 +2931,71 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED)
cpu_arch_flags.bitfield.cpu64 = 0;
cpu_arch_flags.bitfield.cpuno64 = 1;
}
- cpu_arch_isa = PROCESSOR_UNKNOWN;
- cpu_arch_isa_flags = cpu_arch[flag_code == CODE_64BIT].enable;
+ cpu_arch_isa = cpu_arch[j].type;
+ cpu_arch_isa_flags = cpu_arch[j].enable;
if (!cpu_arch_tune_set)
{
cpu_arch_tune = cpu_arch_isa;
cpu_arch_tune_flags = cpu_arch_isa_flags;
}
-
- j = ARRAY_SIZE (cpu_arch) + 1;
+ pre_386_16bit_warned = false;
+ break;
}
- }
- else if (strcmp (string, "push") == 0)
- {
- arch_stack_entry *top = XNEW (arch_stack_entry);
- top->name = cpu_arch_name;
- if (cpu_sub_arch_name)
- top->sub_name = xstrdup (cpu_sub_arch_name);
- else
- top->sub_name = NULL;
- top->flags = cpu_arch_flags;
- top->isa = cpu_arch_isa;
- top->isa_flags = cpu_arch_isa_flags;
- top->flag_code = flag_code;
- top->stackop_size = stackop_size;
- top->no_cond_jump_promotion = no_cond_jump_promotion;
+ if (cpu_flags_all_zero (&cpu_arch[j].enable))
+ continue;
- top->prev = arch_stack_top;
- arch_stack_top = top;
+ flags = cpu_flags_or (cpu_arch_flags, cpu_arch[j].enable);
- (void) restore_line_pointer (e);
- demand_empty_rest_of_line ();
- return;
- }
- else if (strcmp (string, "pop") == 0)
- {
- const arch_stack_entry *top = arch_stack_top;
-
- if (!top)
- as_bad (_(".arch stack is empty"));
- else if (top->flag_code != flag_code
- || top->stackop_size != stackop_size)
+ if (!cpu_flags_equal (&flags, &cpu_arch_flags))
{
- static const unsigned int bits[] = {
- [CODE_16BIT] = 16,
- [CODE_32BIT] = 32,
- [CODE_64BIT] = 64,
- };
-
- as_bad (_("this `.arch pop' requires `.code%u%s' to be in effect"),
- bits[top->flag_code],
- top->stackop_size == LONG_MNEM_SUFFIX ? "gcc" : "");
+ extend_cpu_sub_arch_name (string + 1);
+ cpu_arch_flags = flags;
+ cpu_arch_isa_flags = flags;
}
else
- {
- arch_stack_top = top->prev;
-
- cpu_arch_name = top->name;
- free (cpu_sub_arch_name);
- cpu_sub_arch_name = top->sub_name;
- cpu_arch_flags = top->flags;
- cpu_arch_isa = top->isa;
- cpu_arch_isa_flags = top->isa_flags;
- no_cond_jump_promotion = top->no_cond_jump_promotion;
-
- XDELETE (top);
- }
+ cpu_arch_isa_flags
+ = cpu_flags_or (cpu_arch_isa_flags, cpu_arch[j].enable);
(void) restore_line_pointer (e);
demand_empty_rest_of_line ();
return;
}
+ }
- for (; j < ARRAY_SIZE (cpu_arch); j++)
- {
- if (strcmp (string + (*string == '.'), cpu_arch[j].name) == 0
- && (*string == '.') == (cpu_arch[j].type == PROCESSOR_NONE))
- {
- if (*string != '.')
- {
- check_cpu_arch_compatible (string, cpu_arch[j].enable);
-
- cpu_arch_name = cpu_arch[j].name;
- free (cpu_sub_arch_name);
- cpu_sub_arch_name = NULL;
- cpu_arch_flags = cpu_arch[j].enable;
- if (flag_code == CODE_64BIT)
- {
- cpu_arch_flags.bitfield.cpu64 = 1;
- cpu_arch_flags.bitfield.cpuno64 = 0;
- }
- else
- {
- cpu_arch_flags.bitfield.cpu64 = 0;
- cpu_arch_flags.bitfield.cpuno64 = 1;
- }
- cpu_arch_isa = cpu_arch[j].type;
- cpu_arch_isa_flags = cpu_arch[j].enable;
- if (!cpu_arch_tune_set)
- {
- cpu_arch_tune = cpu_arch_isa;
- cpu_arch_tune_flags = cpu_arch_isa_flags;
- }
- pre_386_16bit_warned = false;
- break;
- }
-
- if (cpu_flags_all_zero (&cpu_arch[j].enable))
- continue;
-
- flags = cpu_flags_or (cpu_arch_flags,
- cpu_arch[j].enable);
-
- if (!cpu_flags_equal (&flags, &cpu_arch_flags))
- {
- extend_cpu_sub_arch_name (string + 1);
- cpu_arch_flags = flags;
- cpu_arch_isa_flags = flags;
- }
- else
- cpu_arch_isa_flags
- = cpu_flags_or (cpu_arch_isa_flags,
- cpu_arch[j].enable);
- (void) restore_line_pointer (e);
- demand_empty_rest_of_line ();
- return;
- }
- }
-
- if (startswith (string, ".no") && j >= ARRAY_SIZE (cpu_arch))
- {
- /* Disable an ISA extension. */
- for (j = 0; j < ARRAY_SIZE (cpu_arch); j++)
- if (cpu_arch[j].type == PROCESSOR_NONE
- && strcmp (string + 3, cpu_arch[j].name) == 0)
+ if (startswith (string, ".no") && j >= ARRAY_SIZE (cpu_arch))
+ {
+ /* Disable an ISA extension. */
+ for (j = 0; j < ARRAY_SIZE (cpu_arch); j++)
+ if (cpu_arch[j].type == PROCESSOR_NONE
+ && strcmp (string + 3, cpu_arch[j].name) == 0)
+ {
+ flags = cpu_flags_and_not (cpu_arch_flags, cpu_arch[j].disable);
+ if (!cpu_flags_equal (&flags, &cpu_arch_flags))
{
- flags = cpu_flags_and_not (cpu_arch_flags,
- cpu_arch[j].disable);
- if (!cpu_flags_equal (&flags, &cpu_arch_flags))
- {
- extend_cpu_sub_arch_name (string + 1);
- cpu_arch_flags = flags;
- cpu_arch_isa_flags = flags;
- }
- (void) restore_line_pointer (e);
- demand_empty_rest_of_line ();
- return;
+ extend_cpu_sub_arch_name (string + 1);
+ cpu_arch_flags = flags;
+ cpu_arch_isa_flags = flags;
}
- }
-
- if (j == ARRAY_SIZE (cpu_arch))
- as_bad (_("no such architecture: `%s'"), string);
- *input_line_pointer = e;
+ (void) restore_line_pointer (e);
+ demand_empty_rest_of_line ();
+ return;
+ }
}
- else
- as_bad (_("missing cpu architecture"));
+
+ if (j == ARRAY_SIZE (cpu_arch))
+ as_bad (_("no such architecture: `%s'"), string);
+
+ *input_line_pointer = e;
no_cond_jump_promotion = 0;
if (*input_line_pointer == ','
&& !is_end_of_line[(unsigned char) input_line_pointer[1]])
{
- char *string;
- char e;
-
++input_line_pointer;
- e = get_symbol_name (&string);
+ e = get_symbol_name (&s);
+ string = s;
if (strcmp (string, "nojumps") == 0)
no_cond_jump_promotion = 1;
--
2.43.0

160
SOURCES/i686-AVX10.1-part-3.patch
Unescape View File

@ -0,0 +1,160 @@
diff -rup fred/gas/config/tc-i386.c binutils-2.41/gas/config/tc-i386.c
--- fred/gas/config/tc-i386.c 2023-12-07 10:00:21.013005830 +0000
+++ binutils-2.41/gas/config/tc-i386.c 2023-12-07 10:00:28.037015037 +0000
@@ -1053,8 +1053,8 @@ static const arch_entry cpu_arch[] =
SUBARCH (xsavec, XSAVEC, ANY_XSAVEC, false),
SUBARCH (xsaves, XSAVES, ANY_XSAVES, false),
SUBARCH (aes, AES, ANY_AES, false),
- SUBARCH (pclmul, PCLMUL, ANY_PCLMUL, false),
- SUBARCH (clmul, PCLMUL, ANY_PCLMUL, true),
+ SUBARCH (pclmul, PCLMULQDQ, ANY_PCLMULQDQ, false),
+ SUBARCH (clmul, PCLMULQDQ, ANY_PCLMULQDQ, true),
SUBARCH (fsgsbase, FSGSBASE, FSGSBASE, false),
SUBARCH (rdrnd, RDRND, RDRND, false),
SUBARCH (f16c, F16C, ANY_F16C, false),
@@ -1861,7 +1861,7 @@ cpu_flags_match (const insn_template *t)
|| (sse2avx && !i.prefix[DATA_PREFIX]))
&& (!x.bitfield.cpuaes || cpu.bitfield.cpuaes)
&& (!x.bitfield.cpugfni || cpu.bitfield.cpugfni)
- && (!x.bitfield.cpupclmul || cpu.bitfield.cpupclmul))
+ && (!x.bitfield.cpupclmulqdq || cpu.bitfield.cpupclmulqdq))
match |= CPU_FLAGS_ARCH_MATCH;
}
else if (x.bitfield.cpuavx512f)
diff -rup fred/opcodes/i386-gen.c binutils-2.41/opcodes/i386-gen.c
--- fred/opcodes/i386-gen.c 2023-12-07 10:00:22.092007244 +0000
+++ binutils-2.41/opcodes/i386-gen.c 2023-12-07 10:00:28.038015039 +0000
@@ -79,7 +79,7 @@ static const dependency isa_dependencies
{ "AMDFAM10",
"K8|FISTTP|SSE4A|ABM|MONITOR" },
{ "BDVER1",
- "GENERIC64|FISTTP|Rdtscp|MONITOR|CX16|LAHF_SAHF|XOP|ABM|LWP|SVME|AES|PCLMUL|PRFCHW" },
+ "GENERIC64|FISTTP|Rdtscp|MONITOR|CX16|LAHF_SAHF|XOP|ABM|LWP|SVME|AES|PCLMULQDQ|PRFCHW" },
{ "BDVER2",
"BDVER1|FMA|BMI|TBM|F16C" },
{ "BDVER3",
@@ -87,7 +87,7 @@ static const dependency isa_dependencies
{ "BDVER4",
"BDVER3|AVX2|Movbe|BMI2|RdRnd|MWAITX" },
{ "ZNVER1",
- "GENERIC64|FISTTP|Rdtscp|MONITOR|CX16|LAHF_SAHF|AVX2|SSE4A|ABM|SVME|AES|PCLMUL|PRFCHW|FMA|BMI|F16C|Xsaveopt|FSGSBase|Movbe|BMI2|RdRnd|ADX|RdSeed|SMAP|SHA|XSAVEC|XSAVES|ClflushOpt|CLZERO|MWAITX" },
+ "GENERIC64|FISTTP|Rdtscp|MONITOR|CX16|LAHF_SAHF|AVX2|SSE4A|ABM|SVME|AES|PCLMULQDQ|PRFCHW|FMA|BMI|F16C|Xsaveopt|FSGSBase|Movbe|BMI2|RdRnd|ADX|RdSeed|SMAP|SHA|XSAVEC|XSAVES|ClflushOpt|CLZERO|MWAITX" },
{ "ZNVER2",
"ZNVER1|CLWB|RDPID|RDPRU|MCOMMIT|WBNOINVD" },
{ "ZNVER3",
@@ -97,7 +97,7 @@ static const dependency isa_dependencies
{ "BTVER1",
"GENERIC64|FISTTP|MONITOR|CX16|LAHF_SAHF|Rdtscp|SSSE3|SSE4A|ABM|PRFCHW|Clflush|FISTTP|SVME" },
{ "BTVER2",
- "BTVER1|AVX|BMI|F16C|AES|PCLMUL|Movbe|Xsaveopt|PRFCHW" },
+ "BTVER1|AVX|BMI|F16C|AES|PCLMULQDQ|Movbe|Xsaveopt|PRFCHW" },
{ "286",
"186" },
{ "386",
@@ -132,7 +132,7 @@ static const dependency isa_dependencies
"XSAVE" },
{ "AES",
"SSE2" },
- { "PCLMUL",
+ { "PCLMULQDQ",
"SSE2" },
{ "FMA",
"AVX" },
@@ -307,7 +307,7 @@ static bitfield cpu_flags[] =
BITFIELD (Xsave),
BITFIELD (Xsaveopt),
BITFIELD (AES),
- BITFIELD (PCLMUL),
+ BITFIELD (PCLMULQDQ),
BITFIELD (FMA),
BITFIELD (FMA4),
BITFIELD (XOP),
diff -rup fred/opcodes/i386-init.h binutils-2.41/opcodes/i386-init.h
--- fred/opcodes/i386-init.h 2023-12-07 10:00:22.092007244 +0000
+++ binutils-2.41/opcodes/i386-init.h 2023-12-07 10:00:51.260045479 +0000
@@ -432,7 +432,7 @@
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
-#define CPU_PCLMUL_FLAGS \
+#define CPU_PCLMULQDQ_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
@@ -1791,7 +1791,7 @@
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
-#define CPU_ANY_PCLMUL_FLAGS \
+#define CPU_ANY_PCLMULQDQ_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
diff -rup fred/opcodes/i386-opc.h binutils-2.41/opcodes/i386-opc.h
--- fred/opcodes/i386-opc.h 2023-12-07 10:00:22.093007246 +0000
+++ binutils-2.41/opcodes/i386-opc.h 2023-12-07 10:00:28.038015039 +0000
@@ -121,8 +121,8 @@ enum
CpuXsaveopt,
/* AES support required */
CpuAES,
- /* PCLMUL support required */
- CpuPCLMUL,
+ /* PCLMULQDQ support required */
+ CpuPCLMULQDQ,
/* FMA support required */
CpuFMA,
/* FMA4 support required */
@@ -374,7 +374,7 @@ typedef union i386_cpu_flags
unsigned int cpuxsave:1;
unsigned int cpuxsaveopt:1;
unsigned int cpuaes:1;
- unsigned int cpupclmul:1;
+ unsigned int cpupclmulqdq:1;
unsigned int cpufma:1;
unsigned int cpufma4:1;
unsigned int cpuxop:1;
diff -rup fred/opcodes/i386-opc.tbl binutils-2.41/opcodes/i386-opc.tbl
--- fred/opcodes/i386-opc.tbl 2023-12-07 10:00:22.093007246 +0000
+++ binutils-2.41/opcodes/i386-opc.tbl 2023-12-07 10:00:28.038015039 +0000
@@ -1448,15 +1448,15 @@ vaesdeclast, 0x66df, VAES, Modrm|Vex256|
vaesenc, 0x66dc, VAES, Modrm|Vex256|Space0F38|VexVVVV|VexWIG|NoSuf, { RegYMM|Unspecified|BaseIndex, RegYMM, RegYMM }
vaesenclast, 0x66dd, VAES, Modrm|Vex256|Space0F38|VexVVVV|VexWIG|NoSuf, { RegYMM|Unspecified|BaseIndex, RegYMM, RegYMM }
-// PCLMUL
+// PCLMULQDQ
<pclmul:cpu:attr, $avx:AVX|:Vex128|VexW0|SSE2AVX|VexVVVV, $sse::>
-pclmulqdq<pclmul>, 0x660f3a44, <pclmul:cpu>PCLMUL, Modrm|<pclmul:attr>|NoSuf, { Imm8|Imm8S, RegXMM|Unspecified|BaseIndex, RegXMM }
-pclmullqlqdq<pclmul>, 0x660f3a44/0x00, <pclmul:cpu>PCLMUL, Modrm|<pclmul:attr>|NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM }
-pclmulhqlqdq<pclmul>, 0x660f3a44/0x01, <pclmul:cpu>PCLMUL, Modrm|<pclmul:attr>|NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM }
-pclmullqhqdq<pclmul>, 0x660f3a44/0x10, <pclmul:cpu>PCLMUL, Modrm|<pclmul:attr>|NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM }
-pclmulhqhqdq<pclmul>, 0x660f3a44/0x11, <pclmul:cpu>PCLMUL, Modrm|<pclmul:attr>|NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM }
+pclmulqdq<pclmul>, 0x660f3a44, <pclmul:cpu>PCLMULQDQ, Modrm|<pclmul:attr>|NoSuf, { Imm8|Imm8S, RegXMM|Unspecified|BaseIndex, RegXMM }
+pclmullqlqdq<pclmul>, 0x660f3a44/0x00, <pclmul:cpu>PCLMULQDQ, Modrm|<pclmul:attr>|NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM }
+pclmulhqlqdq<pclmul>, 0x660f3a44/0x01, <pclmul:cpu>PCLMULQDQ, Modrm|<pclmul:attr>|NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM }
+pclmullqhqdq<pclmul>, 0x660f3a44/0x10, <pclmul:cpu>PCLMULQDQ, Modrm|<pclmul:attr>|NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM }
+pclmulhqhqdq<pclmul>, 0x660f3a44/0x11, <pclmul:cpu>PCLMULQDQ, Modrm|<pclmul:attr>|NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM }
// GFNI
@@ -1771,13 +1771,13 @@ vaesenclast, 0x66dd, AVX|AES, Modrm|Vex|
vaesimc, 0x66db, AVX|AES, Modrm|Vex|Space0F38|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM, RegXMM }
vaeskeygenassist, 0x66df, AVX|AES, Modrm|Vex|Space0F3A|VexWIG|NoSuf, { Imm8, Unspecified|BaseIndex|RegXMM, RegXMM }
-// PCLMUL + AVX
+// PCLMULQDQ + AVX
-vpclmulqdq, 0x6644, AVX|PCLMUL, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-vpclmullqlqdq, 0x6644/0x00, AVX|PCLMUL, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-vpclmulhqlqdq, 0x6644/0x01, AVX|PCLMUL, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-vpclmullqhqdq, 0x6644/0x10, AVX|PCLMUL, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
-vpclmulhqhqdq, 0x6644/0x11, AVX|PCLMUL, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
+vpclmulqdq, 0x6644, AVX|PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
+vpclmullqlqdq, 0x6644/0x00, AVX|PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
+vpclmulhqlqdq, 0x6644/0x01, AVX|PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
+vpclmullqhqdq, 0x6644/0x10, AVX|PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
+vpclmulhqhqdq, 0x6644/0x11, AVX|PCLMULQDQ, Modrm|Vex|Space0F3A|VexVVVV|VexWIG|NoSuf|ImmExt, { Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM }
// GFNI + AVX

1121
SOURCES/i686-AVX10.1-part-4.patch
View File

File diff suppressed because it is too large Load Diff

3092
SOURCES/i686-AVX10.1-part-5.patch
View File

File diff suppressed because it is too large Load Diff

39749
SOURCES/i686-AVX10.1-part-6.patch
View File

File diff suppressed because it is too large Load Diff

4528
SPECS/binutils.spec
View File

File diff suppressed because it is too large Load Diff
Write Preview
Loading…
Cancel
Save