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106 lines
4.4 KiB
106 lines
4.4 KiB
3 years ago
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From d249a8128806d08285eeda00b2a35b62a22236f4 Mon Sep 17 00:00:00 2001
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From: Andreas Arnez <arnez@linux.ibm.com>
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Date: Thu, 26 Mar 2020 17:14:49 +0100
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Subject: [PATCH 8/8] Add IBM z15 support
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Add support for specifying "IBMz15" as target architecture.
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---
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CONFIG/include/atlconf.h | 8 ++++----
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CONFIG/src/atlcomp.txt | 4 ++++
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CONFIG/src/backend/archinfo_linux.c | 1 +
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CONFIG/src/probe_comp.c | 1 +
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include/atlas_prefetch.h | 2 +-
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5 files changed, 11 insertions(+), 5 deletions(-)
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diff --git a/CONFIG/include/atlconf.h b/CONFIG/include/atlconf.h
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index 3828fdb..382601f 100644
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--- a/CONFIG/include/atlconf.h
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+++ b/CONFIG/include/atlconf.h
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@@ -25,11 +25,11 @@ enum ARCHFAM {AFOther=0, AFPPC, AFSPARC, AFALPHA, AFX86, AFIA64, AFMIPS,
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* Corei3EP: v3 Haswell, E5-26XX
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* Corei4: skylake
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*/
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-#define NMACH 63
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+#define NMACH 64
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static char *machnam[NMACH] =
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{"UNKNOWN", "PPCG4", "PPCG5", "POWER3", "POWER4", "POWER5",
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"POWER6", "POWER7", "POWER8", "POWERe6500",
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- "IBMz9", "IBMz10", "IBMz196", "IBMz12", "IBMz13", "IBMz14",
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+ "IBMz9", "IBMz10", "IBMz196", "IBMz12", "IBMz13", "IBMz14", "IBMz15",
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"x86x87", "x86SSE1", "x86SSE2", "x86SSE3",
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"P5", "P5MMX", "PPRO", "PII", "PIII", "PM", "CoreSolo",
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"CoreDuo", "Core2Solo", "Core2", "Corei1", "Corei2", "Corei3",
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@@ -42,7 +42,7 @@ static char *machnam[NMACH] =
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"ARM64xgene1", "ARM64a53", "ARM64a57"};
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enum MACHTYPE {MACHOther, PPCG4, PPCG5, IbmPwr3, IbmPwr4, IbmPwr5,
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IbmPwr6, IbmPwr7, IbmPwr8, Pwre6500,
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- IbmZ9, IbmZ10, IbmZ196, IbmZ12, IbmZ13, IbmZ14, /* s390(x) */
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+ IbmZ9, IbmZ10, IbmZ196, IbmZ12, IbmZ13, IbmZ14, IbmZ15,
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x86x87, x86SSE1, x86SSE2, x86SSE3, /* generic targets */
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IntP5, IntP5MMX, IntPPRO, IntPII, IntPIII, IntPM, IntCoreS,
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IntCoreDuo, IntCore2Solo, IntCore2, IntCorei1, IntCorei2,
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@@ -82,7 +82,7 @@ enum MACHTYPE {MACHOther, PPCG4, PPCG5, IbmPwr3, IbmPwr4, IbmPwr5,
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#define MachIsARM64(mach_) \
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( (mach_) >= ARM64xg && || (mach_) <= ARM64a57)
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#define MachIsS390(mach_) \
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- ( (mach_) >= IbmZ9 && (mach_) <= IbmZ14 )
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+ ( (mach_) >= IbmZ9 && (mach_) <= IbmZ15 )
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static char *f2c_namestr[5] = {"UNKNOWN","Add_", "Add__", "NoChange", "UpCase"};
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diff --git a/CONFIG/src/atlcomp.txt b/CONFIG/src/atlcomp.txt
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index 2cfacc2..acb2c83 100644
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--- a/CONFIG/src/atlcomp.txt
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+++ b/CONFIG/src/atlcomp.txt
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@@ -254,6 +254,10 @@ MACH=IBMz14 OS=ALL LVL=1000 COMPS=smc,dmc,skc,dkc,icc,xcc,gcc
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'gcc' '-march=z14 -mtune=z14 -O2'
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MACH=IBMz14 OS=ALL LVL=1000 COMPS=f77
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'gfortran' '-march=z14 -mtune=z14 -O2'
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+MACH=IBMz15 OS=ALL LVL=1000 COMPS=smc,dmc,skc,dkc,icc,xcc,gcc
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+ 'gcc' '-march=arch13 -mtune=arch13 -O2'
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+MACH=IBMz15 OS=ALL LVL=1000 COMPS=f77
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+ 'gfortran' '-march=arch13 -mtune=arch13 -O2'
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#
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# Windows defaults ; need to make SSE/SSE2 arch dep.
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#
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diff --git a/CONFIG/src/backend/archinfo_linux.c b/CONFIG/src/backend/archinfo_linux.c
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index ed6f476..934a005 100644
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--- a/CONFIG/src/backend/archinfo_linux.c
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+++ b/CONFIG/src/backend/archinfo_linux.c
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@@ -337,6 +337,7 @@ enum MACHTYPE ProbeArch()
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else if (strstr(res, "2827") || strstr(res, "2828")) mach = IbmZ12;
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else if (strstr(res, "2964") || strstr(res, "2965")) mach = IbmZ13;
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else if (strstr(res, "3906") || strstr(res, "3907")) mach = IbmZ14;
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+ else if (strstr(res, "8561") || strstr(res, "8562")) mach = IbmZ15;
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else mach = IbmZ14; /* looks risky to me, but IBM folks did it */
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free(res);
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}
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diff --git a/CONFIG/src/probe_comp.c b/CONFIG/src/probe_comp.c
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index 857ea82..88bb25e 100644
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--- a/CONFIG/src/probe_comp.c
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+++ b/CONFIG/src/probe_comp.c
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@@ -1208,6 +1208,7 @@ void GetBestGccVers(enum OSTYPE OS, enum MACHTYPE arch,
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case IbmZ12:
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case IbmZ13:
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case IbmZ14:
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+ case IbmZ15:
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case IntCorei3:
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case IntCorei4:
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case IntCorei2:
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diff --git a/include/atlas_prefetch.h b/include/atlas_prefetch.h
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index fa426ac..583f19d 100644
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--- a/include/atlas_prefetch.h
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+++ b/include/atlas_prefetch.h
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@@ -156,7 +156,7 @@
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#define ATL_L2LS 64
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#elif defined(ATL_ARCH_IBMz196) || defined(ATL_ARCH_IBMz10) || \
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defined(ATL_ARCH_IBMzEC12) || defined(ATL_ARCH_IBMz13) || \
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- defined(ATL_ARCH_IbmZ14)
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+ defined(ATL_ARCH_IbmZ14) || defined(ATL_ARCH_IbmZ15)
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#define ATL_pfl1R(mem) __builtin_prefetch(mem, 0, 3)
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#define ATL_pfl1W(mem) __builtin_prefetch(mem, 1, 3)
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#define ATL_GOT_L1PREFETCH
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--
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2.23.0
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