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216 lines
7.7 KiB
216 lines
7.7 KiB
From 50840e01d05a466a1dfbc219e49233834e5d7ed0 Mon Sep 17 00:00:00 2001
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From: Yang Zhong <yang.zhong@intel.com>
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Date: Wed, 16 Feb 2022 22:04:29 -0800
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Subject: [PATCH 07/24] x86: Grant AMX permission for guest
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RH-Author: Paul Lai <plai@redhat.com>
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RH-MergeRequest: 176: Enable KVM AMX support
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RH-Commit: [7/13] 437578191f61139ca710cc7045ab38eb0d05eae2
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RH-Bugzilla: 1916415
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RH-Acked-by: Cornelia Huck <cohuck@redhat.com>
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RH-Acked-by: Igor Mammedov <imammedo@redhat.com>
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RH-Acked-by: Paolo Bonzini <pbonzini@redhat.com>
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Kernel allocates 4K xstate buffer by default. For XSAVE features
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which require large state component (e.g. AMX), Linux kernel
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dynamically expands the xstate buffer only after the process has
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acquired the necessary permissions. Those are called dynamically-
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enabled XSAVE features (or dynamic xfeatures).
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There are separate permissions for native tasks and guests.
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Qemu should request the guest permissions for dynamic xfeatures
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which will be exposed to the guest. This only needs to be done
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once before the first vcpu is created.
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KVM implemented one new ARCH_GET_XCOMP_SUPP system attribute API to
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get host side supported_xcr0 and Qemu can decide if it can request
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dynamically enabled XSAVE features permission.
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https://lore.kernel.org/all/20220126152210.3044876-1-pbonzini@redhat.com/
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Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
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Signed-off-by: Yang Zhong <yang.zhong@intel.com>
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Signed-off-by: Jing Liu <jing2.liu@intel.com>
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Message-Id: <20220217060434.52460-4-yang.zhong@intel.com>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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(cherry picked from commit 19db68ca68a78fa033a21d419036b6e416554564)
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Signed-off-by: Paul Lai <plai@redhat.com>
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---
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target/i386/cpu.c | 7 +++++
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target/i386/cpu.h | 4 +++
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target/i386/kvm/kvm-cpu.c | 12 ++++----
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target/i386/kvm/kvm.c | 57 ++++++++++++++++++++++++++++++++++++++
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target/i386/kvm/kvm_i386.h | 1 +
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5 files changed, 75 insertions(+), 6 deletions(-)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index 0453c27c9d..c19b51ea32 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -6027,6 +6027,7 @@ static void x86_cpu_enable_xsave_components(X86CPU *cpu)
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CPUX86State *env = &cpu->env;
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int i;
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uint64_t mask;
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+ static bool request_perm;
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if (!(env->features[FEAT_1_ECX] & CPUID_EXT_XSAVE)) {
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env->features[FEAT_XSAVE_COMP_LO] = 0;
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@@ -6042,6 +6043,12 @@ static void x86_cpu_enable_xsave_components(X86CPU *cpu)
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}
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}
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+ /* Only request permission for first vcpu */
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+ if (kvm_enabled() && !request_perm) {
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+ kvm_request_xsave_components(cpu, mask);
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+ request_perm = true;
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+ }
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+
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env->features[FEAT_XSAVE_COMP_LO] = mask;
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env->features[FEAT_XSAVE_COMP_HI] = mask >> 32;
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}
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diff --git a/target/i386/cpu.h b/target/i386/cpu.h
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index e1dd8b9555..58676390e6 100644
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--- a/target/i386/cpu.h
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+++ b/target/i386/cpu.h
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@@ -549,6 +549,10 @@ typedef enum X86Seg {
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#define XSTATE_ZMM_Hi256_MASK (1ULL << XSTATE_ZMM_Hi256_BIT)
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#define XSTATE_Hi16_ZMM_MASK (1ULL << XSTATE_Hi16_ZMM_BIT)
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#define XSTATE_PKRU_MASK (1ULL << XSTATE_PKRU_BIT)
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+#define XSTATE_XTILE_CFG_MASK (1ULL << XSTATE_XTILE_CFG_BIT)
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+#define XSTATE_XTILE_DATA_MASK (1ULL << XSTATE_XTILE_DATA_BIT)
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+
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+#define XSTATE_DYNAMIC_MASK (XSTATE_XTILE_DATA_MASK)
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#define ESA_FEATURE_ALIGN64_BIT 1
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diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c
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index 86ef7b2712..bdc967c484 100644
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--- a/target/i386/kvm/kvm-cpu.c
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+++ b/target/i386/kvm/kvm-cpu.c
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@@ -84,7 +84,7 @@ static void kvm_cpu_max_instance_init(X86CPU *cpu)
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static void kvm_cpu_xsave_init(void)
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{
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static bool first = true;
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- KVMState *s = kvm_state;
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+ uint32_t eax, ebx, ecx, edx;
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int i;
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if (!first) {
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@@ -100,11 +100,11 @@ static void kvm_cpu_xsave_init(void)
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ExtSaveArea *esa = &x86_ext_save_areas[i];
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if (esa->size) {
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- int sz = kvm_arch_get_supported_cpuid(s, 0xd, i, R_EAX);
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- if (sz != 0) {
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- assert(esa->size == sz);
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- esa->offset = kvm_arch_get_supported_cpuid(s, 0xd, i, R_EBX);
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- esa->ecx = kvm_arch_get_supported_cpuid(s, 0xd, i, R_ECX);
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+ host_cpuid(0xd, i, &eax, &ebx, &ecx, &edx);
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+ if (eax != 0) {
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+ assert(esa->size == eax);
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+ esa->offset = ebx;
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+ esa->ecx = ecx;
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}
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}
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}
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diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
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index a668f521ac..b5d98c4361 100644
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--- a/target/i386/kvm/kvm.c
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+++ b/target/i386/kvm/kvm.c
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@@ -17,6 +17,7 @@
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#include "qapi/error.h"
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#include <sys/ioctl.h>
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#include <sys/utsname.h>
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+#include <sys/syscall.h>
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#include <linux/kvm.h>
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#include "standard-headers/asm-x86/kvm_para.h"
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@@ -347,6 +348,7 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function,
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struct kvm_cpuid2 *cpuid;
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uint32_t ret = 0;
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uint32_t cpuid_1_edx;
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+ uint64_t bitmask;
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cpuid = get_supported_cpuid(s);
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@@ -404,6 +406,25 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function,
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if (!has_msr_arch_capabs) {
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ret &= ~CPUID_7_0_EDX_ARCH_CAPABILITIES;
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}
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+ } else if (function == 0xd && index == 0 &&
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+ (reg == R_EAX || reg == R_EDX)) {
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+ struct kvm_device_attr attr = {
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+ .group = 0,
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+ .attr = KVM_X86_XCOMP_GUEST_SUPP,
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+ .addr = (unsigned long) &bitmask
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+ };
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+
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+ bool sys_attr = kvm_check_extension(s, KVM_CAP_SYS_ATTRIBUTES);
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+ if (!sys_attr) {
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+ warn_report("cannot get sys attribute capabilities %d", sys_attr);
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+ }
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+
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+ int rc = kvm_ioctl(s, KVM_GET_DEVICE_ATTR, &attr);
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+ if (rc == -1 && (errno == ENXIO || errno == EINVAL)) {
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+ warn_report("KVM_GET_DEVICE_ATTR(0, KVM_X86_XCOMP_GUEST_SUPP) "
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+ "error: %d", rc);
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+ }
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+ ret = (reg == R_EAX) ? bitmask : bitmask >> 32;
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} else if (function == 0x80000001 && reg == R_ECX) {
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/*
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* It's safe to enable TOPOEXT even if it's not returned by
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@@ -5054,3 +5075,39 @@ bool kvm_arch_cpu_check_are_resettable(void)
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{
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return !sev_es_enabled();
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}
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+
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+#define ARCH_REQ_XCOMP_GUEST_PERM 0x1025
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+
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+void kvm_request_xsave_components(X86CPU *cpu, uint64_t mask)
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+{
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+ KVMState *s = kvm_state;
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+ uint64_t supported;
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+
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+ mask &= XSTATE_DYNAMIC_MASK;
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+ if (!mask) {
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+ return;
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+ }
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+ /*
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+ * Just ignore bits that are not in CPUID[EAX=0xD,ECX=0].
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+ * ARCH_REQ_XCOMP_GUEST_PERM would fail, and QEMU has warned
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+ * about them already because they are not supported features.
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+ */
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+ supported = kvm_arch_get_supported_cpuid(s, 0xd, 0, R_EAX);
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+ supported |= (uint64_t)kvm_arch_get_supported_cpuid(s, 0xd, 0, R_EDX) << 32;
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+ mask &= supported;
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+
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+ while (mask) {
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+ int bit = ctz64(mask);
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+ int rc = syscall(SYS_arch_prctl, ARCH_REQ_XCOMP_GUEST_PERM, bit);
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+ if (rc) {
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+ /*
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+ * Older kernel version (<5.17) do not support
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+ * ARCH_REQ_XCOMP_GUEST_PERM, but also do not return
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+ * any dynamic feature from kvm_arch_get_supported_cpuid.
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+ */
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+ warn_report("prctl(ARCH_REQ_XCOMP_GUEST_PERM) failure "
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+ "for feature bit %d", bit);
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+ }
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+ mask &= ~BIT_ULL(bit);
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+ }
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+}
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diff --git a/target/i386/kvm/kvm_i386.h b/target/i386/kvm/kvm_i386.h
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index a978509d50..4124912c20 100644
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--- a/target/i386/kvm/kvm_i386.h
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+++ b/target/i386/kvm/kvm_i386.h
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@@ -52,5 +52,6 @@ bool kvm_hyperv_expand_features(X86CPU *cpu, Error **errp);
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uint64_t kvm_swizzle_msi_ext_dest_id(uint64_t address);
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bool kvm_enable_sgx_provisioning(KVMState *s);
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+void kvm_request_xsave_components(X86CPU *cpu, uint64_t mask);
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#endif
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--
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2.35.3
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